Patents Examined by Binh C. Tat
  • Patent number: 11501051
    Abstract: A memory device includes at least one bit line, at least one word line, and at least one memory cell comprising a capacitor and a transistor. The transistor has a gate terminal coupled to the word line, a first terminal, and a second terminal. The capacitor has a first end coupled to the first terminal of the transistor, a second end coupled to the bit line, and an insulating material between the first end and the second end. The insulating material is configured to break down under a predetermined break-down voltage or higher applied between the first end and the second end.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: November 15, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Meng-Sheng Chang, Chia-En Huang, Chien-Ying Chen
  • Patent number: 11494186
    Abstract: The present disclosure describes a digital signal processing (DSP) block that includes a plurality of columns of weight registers and a plurality of inputs configured to receive a first plurality of values and a second plurality of values. The first plurality of values is stored in the plurality of columns of weight registers after being received. Additionally, the DSP block includes a plurality of multipliers configured to simultaneously multiply each value of the first plurality of values by each value of the second plurality of values.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: November 8, 2022
    Assignee: Intel Corporation
    Inventors: Martin Langhammer, Dongdong Chen, Jason R. Bergendahl
  • Patent number: 11489355
    Abstract: A battery pack (2000) includes a secondary battery (2020), a sensor (2040), and a control device (2060). The secondary battery (2020) supplies electric power to a flying object (10). The sensor (2040) outputs a measurement value related to a force applied to the secondary battery (2020) or a periphery of the secondary battery. The control device (2060) has a determination unit (2062). The determination unit (2062) determines a danger level of the secondary battery (2020) based on the measurement value of the sensor (2040).
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: November 1, 2022
    Assignee: Envision AESC Energy Devices Ltd.
    Inventor: Hiroshi Sasaki
  • Patent number: 11489360
    Abstract: A wireless charging circuit, a wireless charging method, a wireless charging system and a mobile terminal are provided. The wireless charging circuit includes: an acquisition unit that acquires voltage information of a battery in the mobile terminal; a charging control unit that obtains the voltage information of the battery, and determine current information of the battery according to the voltage information during a charging process of the battery; a first communication unit that transmits the voltage information and the current information of the battery to an external wireless charging device; a receiving unit that generates a charging Direct Current (DC) by inducing an electrical signal generated by the external wireless charging device according to the voltage information and the current information of the battery; and a switching unit configured to, when the switching unit is an on state, input the charging DC into the battery through the acquisition unit.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: November 1, 2022
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventor: Zhitao Ding
  • Patent number: 11481536
    Abstract: A method includes the following operations: receiving design rule violations of a first layout; classifying, according to first chip features of the first layout, a first violation of the design rule violations into a first class of predefined classes; generating a first vector array for at least one of the first chip features of the first layout, that is associated with the first violation; selecting, according to the first vector array, first operations from pre-stored operations; generating a second layout based on the first layout and the first operations.
    Type: Grant
    Filed: December 8, 2020
    Date of Patent: October 25, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Yi-Lin Chuang, Song Liu, Pei-Pei Chen, Heng-Yi Lin, Shih-Yao Lin, Chin-Hsien Wang
  • Patent number: 11482886
    Abstract: One or more disclosed embodiments relate to a wireless charging transmitter and a wireless power transfer method. The wireless charging transmitter includes a first charging pad including a first wireless power circuit, a second charging pad including a second wireless power circuit, and a controller configured to, in response to detection of a first electronic device being placed on the first charging pad, transfer power at a first designated wireless power level via the first wireless power circuit, in response to detection of a second electronic device being placed on the second charging pad, transmit a first command for decreasing power transferred to the first electronic device, and transfer, upon receipt of a first request for power at a second designated wireless power level from the first electronic device in response to the first command, the power at the second designated wireless power level via the first and second wireless power circuits.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: October 25, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yunjeong Noh, Dongzo Kim, Mincheol Ha, Kwangseob Kim, Kihyun Kim, Jihye Kim, Kyungmin Lee, Wooram Lee, Yongsang Yun
  • Patent number: 11455452
    Abstract: The present disclosure provides a method for adjusting implant parameter conditions in semiconductor processing by wafer and by wafer zone using in-line measurements from previous operations and a feed-forward computer model. The feed-forward model is based on a sensitivity map of in-line measured data and its effect of electrical performance. Feed-forward computer models that adjust implant parameters by wafer and by zone improve both wafer-to-wafer and within wafer electrical uniformity in semiconductor devices.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: September 27, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Mahalingam Nandakumar, Murlidhar Bashyam, Alwin Tsao, Douglas Newman
  • Patent number: 11449116
    Abstract: Various implementations described herein refer to a method for providing a cell layout with a power grid distribution network. The method may include analyzing porosity of the cell layout to identify blocked tracks and unblocked tracks. The method may include marking the unblocked tracks as available sites for stitching power rails of the cell layout to the power grid distribution network. The method may include generating a porosity report for the cell layout, and the porosity report may list the available sites as modifiable to enhance power grid porosity of the cell layout.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: September 20, 2022
    Assignee: Arm Limited
    Inventors: Soutani Bala Venkatanaga Durga Prasad, Denil Das Kolady, Anand Dhanalakshmi Ramdass
  • Patent number: 11451068
    Abstract: Systems, methods, and computer-readable media are disclosed for battery-specific adjustments to maximum battery voltage. In one embodiment, an example device may include a battery, at least one memory that stores computer-executable instructions, and at least one processor. The device may be configured to determine a first value indicative of a first length of time the battery was at a first voltage and a first temperature, determine a second value indicative of a second length of time the battery was at a second voltage and a second temperature, determine that a sum of the first value and the second value satisfies a first threshold, and cause a maximum output voltage value to be reduced from a first maximum output voltage value to a second maximum output voltage value.
    Type: Grant
    Filed: August 26, 2019
    Date of Patent: September 20, 2022
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Ramez Nachman, Bryan Holmdahl, Don Brunnett, Benjamin Thomas Gaide
  • Patent number: 11451089
    Abstract: A charger for charging a device to be inductively charged is described, comprising an excitation coil made of an electrical conductor wound around a toroidal core to excite a magnetic field inside the toroidal core, the toroidal core having an air-gap between two end-faces of the toroidal core, wherein the two end-faces are facing each other, and the winding density of the excitation coil along the toroidal length of the toroidal core is higher in the vicinity of the respective end-faces as compared to the remaining parts of the toroidal core.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: September 20, 2022
    Assignee: Oticon A/S
    Inventors: Alessandro De Masi, Lars Pinnerup Frederiksen, Jens Troelsen, Lars Riemer
  • Patent number: 11451490
    Abstract: VLSI layouts of generalized multi-stage and pyramid networks for broadcast, unicast and multicast connections are presented using only horizontal and vertical links with spacial locality exploitation. The VLSI layouts employ shuffle exchange links where outlet links of cross links from switches in a stage in one sub-integrated circuit block are connected to inlet links of switches in the succeeding stage in another sub-integrated circuit block so that said cross links are either vertical links or horizontal and vice versa. Furthermore the shuffle exchange links are employed between different sub-integrated circuit blocks so that spatially nearer sub-integrated circuit blocks are connected with shorter links compared to the shuffle exchange links between spatially farther sub-integrated circuit blocks. In one embodiment the sub-integrated circuit blocks are arranged in a hypercube arrangement in a two-dimensional plane.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: September 20, 2022
    Assignee: Konda Technologies Inc.
    Inventor: Venkat Konda
  • Patent number: 11443097
    Abstract: A system and method for fixing DRC violations includes receiving a layout pattern having a design rule check (DRC) violation therein, determining that the layout pattern is an inlier based upon a comparison of the layout pattern with a plurality of previously analyzed layout patterns. The comparison may be performed by an anomaly detection algorithm. The system and method may also include selecting a recipe from a pool of recipes previously applied to the plurality of previously analyzed layout patterns for fixing the DRC violation in the layout clip upon determining that the layout pattern is an inlier.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: September 13, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yu-Chen Huang, Heng-Yi Lin, Yi-Lin Chuang
  • Patent number: 11437848
    Abstract: Provided are a wireless charging device, a device to-be-charged, a method for controlling charging. The wireless charging device includes a wireless transmitting circuit, a transmitting coil, and a control circuit. The transmitting coil includes multiple pairs of joints, and transmitting-coil turns defined by each pair of joints is different. The control circuit is configured to select one of the multiple pairs of joints to be electrically coupled with the wireless transmitting circuit.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: September 6, 2022
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Shiming Wan, Jialiang Zhang
  • Patent number: 11431182
    Abstract: A resource statistics collection method and apparatus, and a terminal are provided. The method includes: recording a process running on a terminal at each of at least two time points; for each of the time points, obtaining at least one hardware resource invoked by the process running at the time point; obtaining a process set including processes running at the at least two time points; and obtaining, according to the hardware resource invoked by the process in the process set, information about the at least one hardware resource occupied by an application associated with the process in the process set. In embodiments of the present invention, statistics collection is performed per process, so that information about the hardware resource occupied by each application of the terminal can be obtained, and a statistical granularity is relatively fine.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: August 30, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Junwei Gou, Zhishan Zhuang, Chi Zhang, Zhonglin Xia
  • Patent number: 11429776
    Abstract: A fault rules engine generates a plurality of fault rules files. Each of the fault rules files is associated with a respective cell type of a plurality of cell types in an integrated circuit (IC) design, and each fault rules file of the plurality of fault rules files can include data quantifying a nominal delay for a given two-cycle test pattern of a set of two-cycle test patterns and data quantifying a delta delay for the given two-cycle test pattern corresponding to a given candidate defect of a plurality of candidate defects for a given cell type in the IC design. An IC test engine generates cell-aware test patterns based on the plurality of fault rules files to test a fabricated IC chip that is based on the IC design for defects corresponding to a subset of the plurality of candidate defects characterized in the plurality of fault rules files.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: August 30, 2022
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Arvind Chokhani, Joseph Michael Swenton, Santosh Subhaschandra Malagi
  • Patent number: 11416665
    Abstract: A power rail design method is disclosed that includes the steps outlined below. A plurality of power rails and a plurality of power domains corresponding thereto in an integrated circuit design file are identified. A design rule check for a plurality of circuit units in the integrated circuit design file is performed to retrieve a plurality of non-violating circuit regions that correspond to the power rails in each of the power domains. The power rails corresponding to at least part of the plurality of non-violating circuit regions in the integrated circuit design file are widened to occupy at least part of the non-violating circuit regions for the plurality of power rails.
    Type: Grant
    Filed: October 22, 2020
    Date of Patent: August 16, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Cheng-Chen Huang, Yun-Ru Wu, Hsin-Chang Lin, Shu-Yi Kao, Chih-Chan Chen, Chia-Jung Hsu, Li-Yi Lin
  • Patent number: 11418049
    Abstract: Example charging methods are described. One example method includes determining that a second electronic device is wirelessly connected with a first electronic device. The first electronic device is charged using the second electronic device, in a wireless charging receiving mode of the first electronic device, when the second electronic device is a wireless charging cradle device. Charging current is provided to the second electronic device, in a wireless charging cradle mode of the first electronic device, when the second electronic device is a wireless charging receiving device. The first electronic device can be used both as a wireless charging receiving device to receive electric energy provided by a wireless charging cradle device, and as a wireless charging cradle device to provide charging current to a second electronic device.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: August 16, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Renjun Dai
  • Patent number: 11411425
    Abstract: The present disclosure relates to a wireless charging device capable of efficiently charging one or more user terminals by performing a tilt function with respect to a portion where the user terminal is held. According to an embodiment of the present disclosure, the wireless charging device include a first body, a depression defined in the first body, a terminal holder that is coupled to an inner surface at both sides of the depression using a hinge and rotates with respect to the first body, a wireless charger disposed in the terminal holder, a second body connected to the first body and inclined with respect to the first body, and a display provided in the second body.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: August 9, 2022
    Assignee: LG ELECTRONICS INC.
    Inventors: Hwanyong Kim, Kyunghwan Kim, Hyoung Seok Kim, Gyunghwan Yuk, Seong Hun Lee
  • Patent number: 11409934
    Abstract: In accordance with various embodiments and aspects of the invention, systems and methods are disclosed that can automatically find the best legal configuration that will be optimal with respect to a given set of requirements or metrics, such as: area, timing, and power. A designer defines the metrics or requirements, which represent the functional needs. A designer typically selects a set of parameters from a group of parameters available to user, which are user selectable parameters. The best parameters, from which the user can select parameters, are identified, and provided to the user. A constraint solver module ensures all rules are enforced and finds all legal parameters that fulfil the user intent. The constraint solver module generates configurations that meet the requirements and are legal configurations.
    Type: Grant
    Filed: December 26, 2020
    Date of Patent: August 9, 2022
    Assignee: ARTERIS, INC.
    Inventors: Federico Angiolini, Khaled Labib
  • Patent number: 11403453
    Abstract: A method including obtaining verified values of a characteristic of a plurality of patterns on a substrate produced by a device manufacturing process; obtaining computed values of the characteristic using a non-probabilistic model; obtaining values of a residue of the non-probabilistic model based on the verified values and the computed values; and obtaining an attribute of a distribution of the residue based on the values of the residue. Also disclosed herein are methods of computing a probability of defects on a substrate produced by the device manufacturing process, and of obtaining an attribute of a distribution of the residue of a non-probabilistic model.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: August 2, 2022
    Assignee: ASML Netherlands B.V.
    Inventors: Lin Lee Cheong, Bruno La Fontaine, Marc Jurian Kea, Yasri Yudhistira, Maxime Philippe Frederic Genin