Abstract: A method of forming a side contact in a semiconductor device wherein a first insulating layer, first conductive and second insulating layer are formed over a substrate, and a contact hole through these layers exposes a portion of the substrate and a side edge of the first conductive layer. A refractory metal layer being formed in the contact hole, such that the natural oxide layer is changed into a conductive material by reaction with the refractory metal layer during a subsequent process step.

Abstract: A method for growing a single crystal III-V compound semiconductor layer, in which grown by vapor deposition on a first single crystal III-V compound semiconductor layer including at least Ga and N is a second single crystal III-V compound semiconductor layer different from the first layer and including at least Ga and N, comprises the steps of: growing a buffer layer other than single crystal and having substantially the same composition as that of the second layer by vapor deposition on the first layer; and growing the second layer on the buffer layer. A method for growing a single crystal AlGaN layer on a single crystal GaN layer by vapor deposition, comprises the steps of: growing a buffer layer of a III-V compound semiconductor including at least Ga and N on the single crystal GaN layer by vapor deposition; and growing the single crystal AlGaN layer on the buffer layer by vapor deposition.

Abstract: A process for forming vertical contacts in the manufacture of integrated circuits, and devices so manufactured. The process eliminates the need for precise mask alignment and allows the etch of the contact hole to be controlled independent of the etch of the interconnect trough. The process includes the steps of: forming an insulating layer on the surface of a substrate; forming an etch stop layer on the surface of the insulating layer; forming an opening in the etch stop layer; etching to a first depth through the opening in the etch stop layer and into the insulating layer to form an interconnect trough; forming a photoresist mask on the surface of the etch stop layer and in the trough; and continuing to etch through the insulating layer until reaching the surface of the substrate to form a contact hole. The above process may be repeated one or more times during the formation of multi-level metal integrated circuits.

Abstract: A semiconductor photosensitive element comprises first and second photosensitive regions. The first photosensitive region is different from the second photosensitive region in its structure and thereby the first photosensitive region has photoelectric conversion characteristic and frequency characteristic which are different from those of the second photosensitive region.

Abstract: An antifuse structure is formed between two metal contacts in which a thin oxide layer is formed on the first or bottom metal, a shallow via is provided oxide layer and a layer of amorphous silicon is deposited over the thin oxide and into the shallow via without leaving the usual furrows in the amorphous silicon and thereby eliminating the step coverage problems of cusps forming in the subsequently applied second or top metal.

Abstract: A method for fabricating a metal wire of semiconductor devices is provided and comprises the steps of: depositing a barrier metal layer on an insulating film and subjecting the barrier metal layer to SF.sub.6 plasma treatment; forming an aluminum metal layer, a reflection-preventive layer and a photoresist film pattern on the surface of the barrier metal layer, in order; etching the reflection-preventive layer, the aluminum metal layer and the barrier metal layer to form a metal wire, with the photoresist film pattern serving as an etch mask; and removing the photoresist film pattern. The SF.sub.6 plasma treatment leaves no residue on the insulating film 2 during etching, as silicon nodule grows a little on the barrier metal layer when the aluminum metal layer is deposited thereon.

Abstract: A method for preparing an oxide dielectric thin film, for use in a dielectric thin film device, is described. Briefly, a film forming chamber is heated, and a thin film of dielectric, about 200 nm thick, is formed by sputtering or another deposition method. After the film is formed, evacuation of the film forming chamber is suspended, and oxygen gas is introduced into the chamber. The film is oxidized after its formation by maintaining the film in the oxygen atmosphere for a period of time, which can include cooling steps. The resulting dielectric thin film has excellent dielectric properties, such as a high dielectric constant and great dielectric strength.

Abstract: A process for fabricating a nonvolatile semiconductor memory device has one transistor and one ferroelectric capacitor electrically connected to each other by a contact plug, which comprising forming a transistor; forming an inter-layer insulating film, at least an upper surface portion thereof being a titanium oxide film; forming a capacitor lower electrode; and forming a capacitor insulating film and a capacitor upper electrode, wherein the lower electrode forming step comprises: depositing a titanium nitride film and a platinum film on the titanium oxide film; etching the platinum film with a first etching gas adapted to suppress deposition of substances including platinum; and etching the titanium nitride film with a second etching gas having a high etching selectivity to the titanium oxide film.

Abstract: This invention gives birth to a semiconductor laser device which is equipped with a semiconductor substrate, a laser active layer with a first bandgap energy overlying the preceding semiconductor substrate, and a p-type cladding layer and an n-type cladding layer between which the preceding active layer is interposed. In addition, the referenced p-type cladding layer has a second bandgap energy exceeding 1.35 eV and remaining greater than the first bandgap energy. Direct bonding technique is adopted for fabricating the semiconductor laser device in question in place of epitaxial growth technique, because the cladding layer and active layer differ in lattice constant.

Abstract: A method for fabricating a color solid-state image sensor having a plurality of photoelectric conversion regions includes the steps of respectively forming a magenta color filter layer, a yellow color filter layer, and a cyan color filter layer over three photoelectric conversion regions of the plurality of photoelectric conversion regions; and implanting ions into the magenta and cyan color filter layers, thereby reducing transmittivity of blue composition of light which passes the magenta and cyan color filter layers.

Abstract: A process is provided for forming a transistor gate conductor having an etch stop arranged at a depth below its upper surface such that the lateral width of the gate conductor above the etch stop may be exclusively narrowed to provide for reduction of transistor channel length. A masking layer, i.e., photoresist, patterned above the gate conductor is isotropically etched so as to minimize its lateral width prior to etching the gate conductor. Portions of the gate conductor not protected by the photoresist may be etched from above the etch stop to define a new pair of opposed sidewall surfaces for the upper portion of the gate conductor. The lateral width of the upper portion of the gate conductor thus may be reduced to a smaller dimension than that of conventional gate conductors. The gate conductor is subjected to an anisotropic etch in which portions of the gate conductor not protected by the narrowed photoresist are etched down to the etch stop.

Abstract: A method is provided for producing, with high reproducibility, an SOI substrate which is flat and high in quality, and simultaneously for achieving resources saving and reduction in cost through recycling of a substrate member. For accomplishing this, a porous-forming step is performed forming a porous Si layer on at least a surface of an Si substrate and a large porosity layer forming step is performed for forming a large porosity layer in the porous Si layer. This large porosity layer forming step is performed by implanting ions into the porous Si layer with a given projection range or by changing current density of anodization in said porous-forming step. At this time, a non-porous single-crystal Si layer is epitaxial-grown on the porous Si layer. Thereafter, the surface of the porous Si layer and a support substrate are bonded together, and then separation is performed at the porous Si layer with the large porosity. Subsequently, selective etching is performed to remove the porous Si layer.

Abstract: Stacked quantum well light emitting diodes include a plurality of stacked active layers of indium gallium nitride, separated by barrier layers of aluminum gallium nitride or aluminum indium gallium nitride, wherein the ratios of indium to gallium differ in at least two of the stacked active layers. Preferably, the differing ratios of indium to gallium are selected to produce emission wavelengths from the stacked active layers, such that the emission wavelengths are combined to produce white light. Controlled amounts of hydrogen gas are introduced into a reaction chamber during formation of indium gallium nitride or aluminum indium gallium nitride to produce high quality indium gallium nitride or aluminum indium gallium nitride which incorporate large percentages of indium and possesses excellent optical and surface properties.

Abstract: A method of growing an oxide film in which the upper surface of a semiconductor substrate is cleaned and the semiconductor substrate is dipped into an acidic solution to remove any native oxide from the upper surface. The substrate is then directly transferred from the acidic solution to an oxidation chamber. The oxidation chamber initially contains an inert ambient maintained at a temperature of less than approximately 500.degree. C. The transfer is accomplished without substantially exposing the substrate to oxygen thereby preventing the formation of a native oxide film on the upper surface of the substrate. Thereafter, a fluorine terminated upper surface is formed on the semiconductor substrate. The temperature within the chamber is then ramped from the first temperature to a second or oxidizing temperature if approximately 700.degree. C. to 850.degree. C. The presence of the fluorine terminated upper surface substantially prevents oxidation of the semiconductor substrate during the temperature ramp.

Abstract: A wiring formed on a substrate is oxidized and the oxide is used as a mask for forming source and drain impurity regions of a transistor, or as a material for insulating wirings from each other, or as a dielectric of a capacitor. Thickness of the oxide is determined depending on purpose of the oxide.In a transistor adapted to be used in an active-matrix liquid-crystal display, the channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.

Abstract: A resist mask is formed on an electrode mainly made of aluminum. An anodic oxide film is formed on the electrode excluding the masked region by performing anodization in an electrolyte. A contact hole can easily be formed in the masked region because the anodic oxide film is not formed there. By removing a portion of the gate electrode which corresponds to an opening in forming a contact electrode, the gate electrode can be divided at the same time as the contact electrode is formed.

Abstract: Disclosed is an improved stacked capacitor with rounded corners for increasing capacitor breakdown voltage, and a method of constructing the same. The preferred method comprises rounding corners of a container-shaped bottom electrode. In particular, sharp corners of a pre-fabricated conductive silicon container are exposed to an ammonium hydroxide/peroxide mixture. The slow etching effect of the clean rounds angled surfaces thereby minimizing the high field effects usually associated with corners and other angled surfaces. Reducing such field effects by reducing or eliminating sharp corners helps prevent breakdown of the capacitor structure dielectric. Where the conductive container includes a rough layer, such as hemispherical grained silicon, the invention provides the additional advantage of separating individual hemispherical grains, thus allowing later deposition of a uniformly thick dielectric layer.

Abstract: A nitrogen-group III compound semiconductor satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0 and x=y=0, and a method for producing the same comprising the steps of forming a zinc oxide (ZnO) intermediate layer on a sapphire substrate, forming a nitrogen-group III semiconductor layer satisfying the formula Al.sub.x Ga.sub.y In.sub.1-x-y N, inclusive of x=0, y=0 and x=y=0 on the intermediate ZnO layer, and separating the intermediate ZnO layer by wet etching with an etching liquid only for the ZnO layer.

Abstract: A method for fabricating wiring of a semiconductor device, which includes a first step for depositing an insulating film on a semiconductor substrate, and forming contact holes by selectively etching the insulating film, a second step for forming a barrier layer on the insulating film and the substrate, a third step for forming a first aluminum alloy layer on the barrier layer, a fourth step for forming a second aluminum alloy layer containing germanium on the first aluminum alloy layer, and a fifth step for forming an aluminum alloy wiring by annealing the substrate on which the first and the second aluminum alloy layers are formed, whereby making it possible to obtain the wiring of a semiconductor device capable of flowing at a low temperature which is the characteristic of Al--Ge wiring and capable of improving the characteristic of the electromigration of the wiring.

Abstract: A desirable impurity, such as reactive gases and inert gases, is safely introduced into a substrate/oxide interface during high pressure thermal oxidation. Desirable impurities include chlorine, fluorine, bromine, iodine, astatine, nitrogen, nitrogen trifluoride, and ammonia. In one embodiment, the desirable impurity is introduced into a processing chamber prior to the high pressure oxidation step. Then, the temperature is brought to or maintained at an oxidation temperature. In another embodiment, the desirable impurity is introduced into the processing chamber after the high pressure oxidation step, while the temperature is still sufficiently high for oxidation. In yet another embodiment, the desirable impurity is introduced into the processing chamber both before and after the high pressure oxidation step.