Patents Examined by Christopher A Daley
  • Patent number: 11541832
    Abstract: The present invention provides a vehicle bus-based communication method and apparatus, a computer device and a storage medium. The vehicle bus-based communication method includes: monitoring data flows transmitted through a vehicle bus by vehicle electronic control units; determining undetected data flows in to-be-obtained data flows when the monitoring reaches a first time length; broadcasting data flow obtaining requests through the vehicle bus, the data flow obtaining requests specifying queries for the undetected data flows; and obtaining data flows that are fed back through the vehicle bus in response to the data flow obtaining requests. When data flows of a vehicle are obtained through a vehicle bus, data flows on the vehicle bus are first obtained in a monitoring manner, thereby ensuring data flow obtaining efficiency.
    Type: Grant
    Filed: June 12, 2020
    Date of Patent: January 3, 2023
    Assignee: AUTEL INTELLIGENT TECHNOLOGY CORP., LTD.
    Inventors: Yun Jiang, Songsong Qu
  • Patent number: 11537322
    Abstract: A method includes, responsive to receiving a modified first reservation command from a storage controller, identifying, by a storage drive, a first range of storage based on a first range identifier of the modified reservation command. The method also includes granting, by the storage drive, a reservation for access to the storage drive on behalf of a first host controller by associating the reservation for the first range with a second range of storage.
    Type: Grant
    Filed: October 7, 2020
    Date of Patent: December 27, 2022
    Assignee: Pure Storage, Inc.
    Inventors: Gordon James Coleman, Roland Dreier, Peter E. Kirkpatrick
  • Patent number: 11539548
    Abstract: CAN bus drive slew rate control is used to suppress ringing using bus impedance matching that is only activated during and shortly after the bus driver unit transitions from driving the bus “dominant” to “recessive”. In one embodiment a bus impedance matching unit is a differential input and differential output operational trans-conductance amplifier (OTA). The differential OTA absorbs or provides the ringing current based on bus differential voltage. In another embodiment a bus impedance matching unit is a back-to-back connected RON regulated transistor pair together with a gate control related circuit. Where the total RON is equal to the CAN bus characteristic impedance.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: December 27, 2022
    Assignee: Microchip Technology Incorporated
    Inventor: Jiong Ou
  • Patent number: 11525970
    Abstract: Microelectronic package communication is described using radio interfaces connected through wiring. One example includes a system board, an integrated circuit chip, and a package substrate mounted to the system board to carry the integrated circuit chip, the package substrate having conductive connectors to connect the integrated circuit chip to external components. A radio on the package substrate is coupled to the integrated circuit chip to modulate the data onto a carrier and to transmit the modulated data. A radio on the system board receives the transmitted modulated data and demodulates the received data, and a cable interface is coupled to the system board radio to couple the received demodulated data to a cable.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: December 13, 2022
    Assignee: Intel Corporation
    Inventors: Shawna Liff, Adel A. Elsherbini, Telesphor Kamgaing, Sasha N. Oster, Gaurav Chawla
  • Patent number: 11520297
    Abstract: Methods and apparatus relating to enhancing diagnostic capabilities of computing systems by combining variable patrolling Application Program Interface (API) and comparison mechanism of variables are described. In one embodiment, a first processor core executes a first instance of a workload to generate a first set of safety variables. A second processor core executes a second instance of the workload to generate a second set of safety variables. A third processor core generates a signal in response to comparison of the first set of safety variables and the second set of safety variables. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: March 29, 2019
    Date of Patent: December 6, 2022
    Assignee: Intel Corporation
    Inventors: Rajesh Banginwar, Ramkumar Jayaraman, Nabajit Deka, Riccardo Mariani
  • Patent number: 11513848
    Abstract: In an embodiment, a system includes rate limiter circuits corresponding to various agents that issue transactions in a virtual channel. At least one agent may be identified as a critical agent, and different rate limits (e.g., lower limits) may be selected for other agents when the critical agent is on than when the critical agent is off (e.g., higher limits).
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: November 29, 2022
    Assignee: Apple Inc.
    Inventors: Per H. Hammarlund, Liran Fishel, Roman Gindin
  • Patent number: 11500676
    Abstract: An agent application manages a response time relating to a communication between a manager and the agent application. The agent application executes processing according to a request from the manager by using a plurality of threads, a number of the plurality of threads being a threshold value or less, transmits, to the manager, data indicating a result of the processing executed by the agent application, and performs an adjustment to decrease the threshold value based on a change in response time in a plurality of response times corresponding to a plurality of instances of communications performed between the agent application and the manager.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: November 15, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventor: Toshiyuki Nakazawa
  • Patent number: 11500793
    Abstract: According to one embodiment, a memory system includes a first chip and a second chip. The second chip is bonded with the first chip. The memory system includes a semiconductor memory device and a memory controller. The semiconductor memory device includes a memory cell array, a peripheral circuit, and an input/output module. The memory controller is configured to receive an instruction from an external host device and control the semiconductor memory device via the input/output module. The first chip includes the memory cell array. The second chip includes the peripheral circuit, the input/output module, and the memory controller.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: November 15, 2022
    Assignee: Kioxia Corporation
    Inventors: Kenji Sakaue, Toshiyuki Furusawa, Shinya Takeda
  • Patent number: 11494325
    Abstract: A communication module for a user of a serial bus. The communication module is configured to receive a first message stream, encompassing a multitude of messages, via a first interface, and to provide a respective message of the first message stream as a message of a second message stream, as a function of a configuration state and as a function of at least one property of the respective message of the first message stream, via a second interface.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: November 8, 2022
    Assignee: Robert Bosch GmbH
    Inventors: Ramona Jung, Arthur Mutter, Thomas Enderle
  • Patent number: 11489694
    Abstract: A device for a serial bus system. The device includes a receiver for receiving a signal from a bus of the bus system, in which bus system at least one first communication phase and one second communication phase are used for exchanging messages between user stations of the bus system. For a message, the bus states of the signal received from the bus in the first communication phase are different from bus states of the signal received in the second communication phase. The receiver is designed to generate a digital signal from the signal received from the bus and to output the signal to a communication control device which evaluates data contained in the digital signal. The receiver uses a first reception threshold and a second reception threshold in each of the communication phases for generating the digital signal, and the second reception threshold has a negative voltage value.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: November 1, 2022
    Assignee: Robert Bosch GmbH
    Inventors: Arthur Mutter, Steffen Walker
  • Patent number: 11481118
    Abstract: The present disclosure describes apparatuses and methods for storage media programming with adaptive write buffer release. In some aspects, a media write manager of a storage media system stores, to a write buffer, data received from a host interface. The media write manager determines parity information for the data stored to the write buffer and then releases the write buffer on completion of determining the parity information for the data. The media write manager may then write at least a portion of the data to storage media after the write buffer is released. By releasing the write buffer of the storage media system after determining the parity information, the write buffer is freed more quickly, which may result in improved write buffer utilization and increased write throughput of the storage media system.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: October 25, 2022
    Assignee: Marvell Asia PTE, Ltd.
    Inventors: Steven A. Klein, Viet-Dzung Nguyen, Gregory Burd
  • Patent number: 11481261
    Abstract: Ensuring the fair utilization of system resources using workload based, time-independent scheduling, including: determining whether an amount of available system resources in the storage system has reached a predetermined reservation threshold; and responsive to determining that the amount of available system resources in the storage system has reached the predetermined reservation threshold: determining whether one or more entities in the storage system have utilized system resources in excess of their fair share by a predetermined threshold during one or more time-independent periods; and responsive to determining that one or more entities in the storage system have utilized system resources in excess of their fair share by the predetermined threshold during the time-independent period, limiting the one or more entities from issuing additional I/O requests to the storage system.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: October 25, 2022
    Assignee: PURE STORAGE, INC.
    Inventors: Yuval Frandzel, Kiron Vijayasankar
  • Patent number: 11481341
    Abstract: A method, computer program product, and computing system for defining a token pool size for a storage system token pool associated with a storage system. An input/output (IO) processing load for the storage system may be determined. The token pool size for the storage system token pool associated with the storage system may be dynamically adjusted based upon, at least in part, one or more changes in the IO processing load determined for the storage system.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: October 25, 2022
    Assignee: EMC IP HOLDING COMPANY, LLC
    Inventors: Maher Kachmar, Philippe Armangau, Michael P. Wahl, Vamsi Vankamamidi, Yubing Wang, Christopher Seibel, Christopher J. Jones, James Vega McCoy
  • Patent number: 11481305
    Abstract: An information handling system includes an analysis block configured to obtain monitoring results from a monitoring data repository, to analyze the monitoring results to identify at least one monitoring gap, and to provide a monitoring gap result identifying the at least one monitoring gap. A machine learning recommender produces a recommendation to reduce the monitoring gap, and a user interface displays the recommendation.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: October 25, 2022
    Assignee: Dell Products L.P.
    Inventors: Rodrigo Mohr, Rafael Mohr, Douglas Torgo Fabretti, Mauricio Rissi
  • Patent number: 11474962
    Abstract: A method for initializing a bus system for a process plant includes: installing an administrative bus participant and a second bus participant at respective installation sites in the process plant; storing a list of at least two installation sites of bus participants in the administrative bus participant; connecting the administrative bus participant and the second bus participant to each other across a data bus; prompting an identification sensor of the second bus participant with an identification prompt; after detection of the identification prompt by the identification sensor, sending an identification signal identifying the second bus participant to the administrative bus participant; and after receiving the identification signal identifying the second bus participant, matching up the second bus participant with an installation site of the at least two installation sites contained in the stored list.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: October 18, 2022
    Assignee: KROHNE Messtechnik GmbH
    Inventor: Christoph Spiegel
  • Patent number: 11461264
    Abstract: A method and system for flexible deployment and easy CPLD management of a backplane are provided. An EEPROM module is added on a backplane; a connection configuration mode of a hard disk backplane and a motherboard controller is stored in the EEPROM module; and a CPLD reads connection relationship information from the EEPROM by means of I2C so as to perform a lighting function and other similar control functions. In addition, by means of adding a connection of a BMC management module on a motherboard to the EEPROM module, when the configuration is changed, a BMC directly upgrades the stored information in the EEPROM module by means of an I2C bus without needing to disassemble a machine. In the method and system, only two pins of the CPLD need to be occupied, without needing to consider that more CPLD pins are required for more complex configurations.
    Type: Grant
    Filed: October 31, 2019
    Date of Patent: October 4, 2022
    Assignee: INSPUR SUZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventor: Chuanzhen Tang
  • Patent number: 11460820
    Abstract: A mobile CAN-Bus control system is provided, in which a CAN-Bus based machinery converts CAN control signals to a data stream based on a communication schema. At least a portion of the converted data stream includes an index lookup identifier, which, together with a locally stored index loop table, permits the receiving device to extract the control signal. The data stream, which is compatible with communication protocols such as Bluetooth™ and/or Wi-Fi, is transmitted to a mobile controller, which in turn parses the data stream and translates it into useable data points based on a locally stored index lookup table. The mobile controller may upload the received data stream to a server for data storage and retrieval, and is capable of remotely accessing the CAN-Bus based system to modify system parameter values and bumping them to the CAN-Bus system to achieved desired operational state of the machinery.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: October 4, 2022
    Assignee: FLO-DRAULIC CONTROLS LTD.
    Inventor: Chris Passmore
  • Patent number: 11455269
    Abstract: An interface circuit that facilitates communicating information between a first system and a second system comprises a first group of ports, a second group of ports, and routing circuitry. The first group of ports is configured to be electrically coupled to the first system. The second group of ports is configured to be electrically coupled to the second system. The routing circuitry is electrically coupled to the first group of ports and the second group of ports. The routing circuitry is configured to facilitate communicating first information applied to a first port of the first group of ports to a pair of ports of the second group of ports. The routing circuitry is further configured to facilitate communicating second information between the pair of ports of the second group of ports and a pair of ports of the first group of ports when a particular signal is applied to a particular port of the second group of ports.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: September 27, 2022
    Assignee: Appleton Grp LLC
    Inventors: Neil Jingo Samson Valmonte, Alexander Karl Martin Manuel, John Perloe Martinez Sotto, Billy Jay Yap Pagsuyoin
  • Patent number: 11455013
    Abstract: An example device can include a computing device having a first portion of a pogo pin connector coupled thereto and a mount having a second portion of the pogo pin connector coupled thereto to receive the first portion of the pogo pin connector. The mount can be communicatively coupled to a hub for receiving signals sent from the computing device, and the signals can be communicated from the computing device to the hub via the pogo pin connector in response to engagement of the first portion with the second portion.
    Type: Grant
    Filed: July 19, 2018
    Date of Patent: September 27, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kenneth Chan, Jose Ticy Lo, Simon Wong
  • Patent number: 11451412
    Abstract: A device of the present invention incorporates a data block, received from a Communication Module (CM) connected via an interface, into a frame of a specific format in which a preamble for data synchronization is placed at a head, and transmits the frame to the bus while taking only a data block formed in compliance with an arbitrary Communication Protocol (CP) from a series of frames of the specific format that are constituted from signals detected from the bus. When transmitting data to the bus, the device inserts a code indicating the arbitrary CP into a head part of the preamble, and when a signal corresponding to the head part of the preamble detected from the bus is identified as the code indicating the arbitrary CP, it takes a frame with the identified code to transfer a data block within the taken frame to the CM through the interface.
    Type: Grant
    Filed: November 20, 2019
    Date of Patent: September 20, 2022
    Assignee: VSI CORPORATION
    Inventor: Su Won Kang