Abstract: Provided is an electronic package, including: a carrier, an electronic component disposed on the carrier, and an antenna structure, wherein the antenna structure has a plurality of spacing members and at least one wire connected among the spacing members. No additional layout area is required to be formed on a surface of the carrier, such that the objective of miniaturization can be achieved.

Abstract: An acquisition effect of a marine survey measurement can be parameterized as a function of time to define a parameterized acquisition effect and a subsurface effect of the marine survey measurement can be parameterized as a function of position to define a parameterized subsurface effect. The acquisition effect and the subsurface effect can be estimated based on the parameterized acquisition effect and the parameterized subsurface effect to define an estimated acquisition effect and an estimated subsurface effect, respectively. The estimated acquisition effect can be removed from the marine survey measurement.

Abstract: An underfill material enabling voidless packaging and excellent solder bonding properties, and a method for manufacturing a semiconductor device using the same are provided. An underfill material is used which contains an epoxy resin and a curing agent, and a time for a reaction rate to reach 20% at 240° C. calculated by Ozawa method using a differential scanning calorimeter is 2.0 sec or less and a time for the reaction rate to reach 60% is 3.0 sec or more. This enables voidless packaging and excellent solder connection properties.

Abstract: A power system monitoring and control system having a thread-dependent calculation monitoring function is provided. The power system monitoring and control system includes: a display unit displaying screen information; a calculation handling unit executing thread-dependent calculation based on a calculation expression defined in a calculation file, and performing calculation handling for generating calculation result information and thread-dependent calculation execution monitoring information to provide generated information as screen information on the display unit; and a data storage unit storing file information for power system monitoring and control, information on the calculation file, the calculation result information, and the thread-dependent calculation execution monitoring information.

Abstract: The present disclosure relates to an array substrate and the manufacturing method thereof. The array substrate includes a glass substrate. The shading metal layer and the buffering layer are formed on the glass substrate in sequence. The TFT layer is formed on the buffering layer, and the TFT is arranged above the shading metal layer. The insulation layer and the organic layer are formed on the TFT layer in sequence. In addition, the pixel electrode layer connects to the source/drain of the TFT via the first through hole. The touch electrode layer connects to the shading metal layer via the second through hole. The passivation layer is configured between the pixel electrode layer and the touch electrode layer. In this way, the manufacturing process is simplified, and the coupling capacitance between the touch electrode and the signal line may be effectively reduced.

Abstract: Provided is a thin film transistor including an active layer including a first silicon active layer, a second silicon active layer, and an oxide active layer in a space between the first silicon active layer and the second silicon active layer, a gate electrode on the active layer with a gate insulating layer disposed therebetween, and a source electrode and a drain electrode with an interlayer insulating layer disposed between the gate electrode and the source and drain electrodes, the source and drain electrodes being in contact with the first silicon active layer and the second silicon active layer, respectively.

Abstract: A power electronics assembly includes a semiconductor device stack having a wide bandgap semiconductor device, a semiconductor cooling chip thermally coupled to the wide bandgap semiconductor device, and a first electrode electrically coupled to the wide bandgap semiconductor device and positioned between the wide bandgap semiconductor device and the semiconductor cooling chip. The semiconductor cooling chip is positioned between a substrate layer and the wide bandgap semiconductor device. The substrate layer includes a substrate inlet port and a substrate outlet port. An integrated fluid channel system extends between the substrate inlet port and the substrate outlet port and includes a substrate fluid inlet channel extending from the substrate inlet port into the substrate layer, a substrate fluid outlet channel extending from the substrate outlet port into the substrate layer, and one or more cooling chip fluid channels extending into the semiconductor cooling chip.

Abstract: A semiconductor package such as a multi-chip package is disclosed. The semiconductor package may be configured for dual second level interconnection onto a printed circuit board of a host device. Thus, a single semiconductor package may be used on host printed circuit boards having different configurations.

Abstract: A power electronics assembly having a semiconductor device stack having a wide bandgap semiconductor device, a first electrode electrically coupled the wide bandgap semiconductor device, and a second electrode electrically coupled the wide bandgap semiconductor device. A substrate layer is coupled to the semiconductor device stack such that the first electrode is positioned between the substrate layer and the wide bandgap semiconductor device. The substrate layer includes a substrate inlet port and a substrate outlet port. An integrated fluid channel system extends between the substrate inlet and outlet ports and includes a substrate fluid inlet channel extending from the substrate inlet port into the substrate layer, a substrate fluid outlet channel extending from the substrate outlet port into the substrate layer, and one or more semiconductor fluid channels extending into the wide bandgap semiconductor device in fluid communication with the substrate fluid inlet and outlet channels.

Abstract: A facility is connected to an electricity utility and includes a plurality of control computer controlled devices and a plurality of devices that is uncontrolled by control computers. An operational status of each of the control computer controlled devices is monitored by a server. The facility has a power meter that provides data representing actual power consumption to the server which is connected via a network to the control computer. The server is configured to determine power consumption of each device in the plurality of controlled devices from operational status data and power consumption data.

Abstract: A method for fabricating a shallow trench isolation (STI) structure comprises the following steps. A silane-base precursor having a volumetric flowrate of 500 to 750 sccm and a nitrogen-base precursor having a volumetric flowrate of 300 to 600 sccm are introduced and mixed under a first pressure ranging from 0.5 to 1.5 torr at a first temperature ranging from 30 to 105 centigrade to deposit a flowable dielectric layer in a trench of a substrate. Then, ozone gas and oxygen gas are introduced and mixed under a second pressure ranging from 300 to 650 torr at a second temperature ranging from 50 to 250 centigrade to treat the flowable dielectric layer, wherein a volumetric flowrate ratio of ozone gas and oxygen gas ranges from 1:1 to 3:1. A method for fabricating a FinFET is provided.

Abstract: There is provided a trench-gate type semiconductor device that can prevent breakdown of a gate insulating film caused by a displacement current flowing into a protective diffusion layer at a portion of a trench underlying a gate electrode at a turn-off time and simultaneously improves a current density by narrowing a cell pitch. The semiconductor device has a gate electrode 7 embedded into a trench 5 penetrating a base region 3. The gate electrode 7 is disposed into a lattice shape in a planar view, and a protective diffusion layer 13 is formed in a drift layer 2a at the portion underlying thereof. At least one of blocks divided by the gate electrode 7 is a protective contact region 20 on which the trench 5 is entirely formed. A protective contact 21 for connecting the protective diffusion layer 13 at a bottom portion of the trench 5 and a source electrode 9 is disposed on the protective contact region 20.

Abstract: A foldable display device comprises a display panel; and a backplate on a surface of the display panel, the backplate including a folding region and unfolding regions at both sides of the folding region, the backplate including at least two opening patterns in the folding region that are different from each other.

Abstract: A machinery health monitoring module processes machine vibration data based on vibration signals and provides the machine vibration data to a distributed control system. A distributed control system operator computer executes a software user interface that filters relevant configuration parameters based on a selected machine measurement type so that only those parameters that are applicable to the selected measurement type appear on the user interface screen. Further, configuration parameters for individual measurement values within the measurement type are made available only when a particular measurement value is selected for acquisition. This greatly simplifies the information that is displayed on the configuration user interface.

Abstract: One embodiment of the present disclosure includes a method for processing seismic data comprising the steps of receiving data representing seismic energy gathered from a formation by a plurality of seismic receivers, wherein the data include primary and multiple data. A copy of the received data is created and compensated to reduce amplitude attenuation effects due to transmission and absorption losses. A multiple prediction algorithm is applied to the received and compensated data to obtain a multiple data prediction. The multiple data prediction is subtracted from the received data to obtain primary data. The primary data is processed to reduce attenuation effects in the received data.

Abstract: A silicon carbide semiconductor device includes a silicon carbide semiconductor substrate; a nickel silicide film provided on a surface of the silicon carbide semiconductor substrate and functioning as an ohmic contact; and an extraction electrode contacting the ohmic contact on a side different from a silicon carbide semiconductor substrate side. The silicon carbide semiconductor substrate side of the ohmic contact is mainly formed from a NiSi phase and an extraction electrode side thereof is mainly formed from a Ni2Si phase. The ohmic contact includes carbon on the silicon carbide semiconductor substrate and includes no carbon on the extraction electrode side.

Abstract: Deformable conductive contacts are provided. A plurality of deformable contacts on a first substrate may be joined to a plurality of conductive pads on a second substrate during die level or wafer level assembly of microelectronics. Each deformable contact complies to a degree that is related to the amount of joining pressure between the first substrate and the second substrate. Since an individual contact can make the conductive coupling within a range of distances from a target pad, an array of the deformable contacts provides tolerance and compliance when there is some variation in height of the conductive elements on either side of the join. A flowable underfill may be provided to press the deformable contacts against opposing pads and to permanently join the surfaces at a fixed distance. The deformable contacts may include a wiping feature to clear their target pads for establishing improved metal-to-metal contact or a thermocompression bond.

Abstract: Structures and methods are provided for forming fin structures. A first fin structure is formed on a substrate. A shallow-trench-isolation structure is formed surrounding the first fin structure. At least part of the first fin structure is removed to form a cavity. A first material is formed on one or more side walls of the cavity. A second material is formed to fill the cavity, the second material being different from the first material. At least part of the STI structure is removed to form a second fin structure including the first material and the second material. At least part of the first material that surrounds the second material is removed to fabricate semiconductor devices.

Abstract: The present invention relates to organic light-emitting diodes that include an anode electrode, a transparent cathode electrode, at least one emission layer and at least one organic semiconductor layer, wherein the at least one emission layer and the at least one organic semiconductor layer is arranged between the anode electrode and the transparent cathode electrode and the organic semiconductor layer includes a first zero-valent metal dopant and a first matrix compound wherein the first matrix comprising at least two phenanthrolinyl groups as well as to a method for manufacturing the same.

Abstract: A self-shielded die includes a substrate, an electronic device attached to the substrate, one or more electrical pads disposed on a bottom surface of the substrate, and an electromagnetic interference (EMI) shield formed of at least one electrically conductive material and connected to ground. At least one of the one or more electrical pads is electrically connected to the electronic device. The EMI shield includes a top shield layer, disposed directly on and substantially completely covering a top surface of the substrate opposite the bottom surface of the substrate, and side shield layers substantially completely covering all sides of the substrate, extending between the top surface of the substrate and the bottom surface of the substrate.