Patents Examined by Daborah Chacko-Davis
  • Patent number: 10962876
    Abstract: A method for manufacturing an extreme ultraviolet (EUV) pellicle structure may include preparing a pellicle membrane that includes an intermediate layer structure in which EUV transmission layers and heat dissipation layers are alternately stacked, a first thin layer disposed on a top surface of the intermediate layer structure, and a second thin layer disposed on a bottom surface of the intermediate layer structure and having a heat emissivity lower than that of the first thin layer, and disposing a cooling structure for absorbing heat from the pellicle membrane on an edge sidewall of the pellicle membrane at which the heat dissipation layers are exposed.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: March 30, 2021
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jin Ho Ahn, Jung Hwan Kim, Jung Sik Kim, Dong Gon Woo, Yong Ju Jang
  • Patent number: 10935881
    Abstract: An object is to provide a mask blank for manufacturing a phase shift mask in which a thermal expansion of a phase shift pattern, which is caused when exposure light is radiated onto the phase shift pattern, and displacement of the phase shift pattern are suppressed to be small. A phase shift film has a function of transmitting exposure light from an ArF excimer laser at a transmittance of 2% or higher and 30% or lower and a function of generating a phase difference of 150° or larger and 180° or smaller between the exposure light that has been transmitted through the phase shift film and the exposure light that has passed through air by a distance equal to a thickness of the phase shift film. The phase shift film is formed of a material containing a metal and silicon, and has a structure in which a lower layer and an upper layer are laminated in the stated order from a transparent substrate side.
    Type: Grant
    Filed: July 11, 2016
    Date of Patent: March 2, 2021
    Assignee: HOYA CORPORATION
    Inventors: Takenori Kajiwara, Hiroaki Shishido, Osamu Nozawa
  • Patent number: 10928721
    Abstract: To provide a reflective mask blank for EUV lithography which is excellent in flatness, whereby the deterioration of the overlay accuracy at the time of pattern transfer can be relatively easily corrected, and the deterioration of the overlay accuracy due to the flatness is small.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: February 23, 2021
    Assignee: AGC, Inc.
    Inventor: Yoshiaki Ikuta
  • Patent number: 10915016
    Abstract: Provided is a mask blank (100) for manufacturing a phase shift mask.
    Type: Grant
    Filed: October 26, 2016
    Date of Patent: February 9, 2021
    Assignee: HOYA CORPORATION
    Inventors: Osamu Nozawa, Ryo Ohkubo, Hiroaki Shishido
  • Patent number: 10908498
    Abstract: An optical proximity correction (OPC) method includes preparing basic data for OPC, measuring with a scanning electron microscope (SEM) an after development inspection (ADI) critical dimension (CD) of a photoresist (PR) pattern with respect to a sample, measuring with the SEM an after cleaning inspection (ACI) CD of a wafer pattern formed using the PR pattern, generating CD data of the sample reflecting PR shrinking caused by the SEM measurement by using the measured ADI CD of the PR pattern and the measured ACI CD of the wafer pattern; and generating an OPC model based on the basic data and the CD data of the sample.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: February 2, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Ki-soo Kim, No-young Chung
  • Patent number: 10895805
    Abstract: A method for producing a pellicle according to the one embodiment of the present invention produces a pellicle including a pellicle film and a pellicle frame supporting an outer peripheral portion of the pellicle film. The method includes forming the pellicle film on a substrate, and bonding a pressure-sensitive adhesive sheet, that is elastic and has a pressure-sensitive adhesive force thereof decreased upon receipt of external stimulation, to each of two surfaces of the substrate; making a notch inside a part of the substrate, the part having the pressure-sensitive adhesive sheets bonded thereto; separating a substrate outer peripheral portion outer to the notch of the substrate, in a state where the pressure-sensitive adhesive sheets are bonded to the substrate, to form a pellicle frame; and stimulating the pressure-sensitive adhesive sheets to peel off the pressure-sensitive adhesive sheets.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: January 19, 2021
    Assignees: MITSUI CHEMICALS, INC., TAZMO CO., LTD.
    Inventors: Kazuo Kohmura, Daiki Taneichi, Yosuke Ono, Hisako Ishikawa, Tsuneaki Biyajima, Yasuyuki Sato, Toshiaki Hirota
  • Patent number: 10886063
    Abstract: An electronic-component manufacturing method is for simultaneously manufacturing a plurality of electronic components each including an element body and a conductor. The electronic-component manufacturing method includes the steps of forming laminates to be the plurality of electronic components on a plurality of regions set apart from each other on a surface of a first substrate, releasing the laminates from the plurality of regions, and performing heat treatment to the laminates. The forming the laminates includes a first step of forming element-body patterns on the plurality of regions and a second step of forming conductor patterns on the plurality of regions. The element-body patterns contain a constituent material of the element bodies and are patterned for the plurality of regions. The conductor patterns contain a constituent material of the conductors and are patterned for the plurality of regions.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: January 5, 2021
    Assignee: TDK CORPORATION
    Inventors: Yuya Ishima, Shunji Aoki, Shinichi Kondo, Yasushi Matsuyama, Hajime Azuma, Yusuke Onezawa
  • Patent number: 10884336
    Abstract: A method for fabricating a semiconductor device, includes dividing a pattern region of a desired pattern that is to be formed on a semiconductor substrate into a plurality of sub-regions; calculating combination condition including a shape of illumination light for transferring and a mask pattern obtained by correcting a partial pattern in the sub-region of the desired pattern formed on a mask used during transferring for each of the plurality of sub-regions, to make a dimension error of the partial pattern of each of the plurality of sub-regions smaller when transferred to the semiconductor substrate; and forming the desired pattern by making multiple exposures on the semiconductor substrate in such a way that the partial patterns of the sub-regions divided are sequentially transferred by transferring a pattern to the semiconductor substrate using the combination conditions calculated for each of the sub-regions.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: January 5, 2021
    Assignee: NuFlare Technology, Inc.
    Inventor: Takayuki Abe
  • Patent number: 10877375
    Abstract: A reflection type exposure mask includes a substrate, a reflective layer provided on the substrate, and a light absorption layer provided on the surface of the reflective layer. The light absorption layer includes a first absorber and a second absorber. The first absorber extends in a first direction along the surface of the reflective layer. The second absorber extends in a second direction along the surface of the reflective layer, which intersects with the first direction. The thickness of the second absorber in a third direction which is perpendicular to the surface of the reflective layer is thinner than the thickness of the first absorber in the third direction.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: December 29, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yumi Nakajima
  • Patent number: 10866511
    Abstract: The present disclosure provides a method for lithography patterning in accordance with some embodiments. The method includes forming a photoresist layer over a substrate, wherein the photoresist layer includes a metal-containing chemical; performing an exposing process to the photoresist layer; and performing a first developing process to the photoresist layer using a first developer, thereby forming a patterned resist layer, wherein the first developer includes a first solvent and a chemical additive to remove metal residuals generated from the metal-containing chemical.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Joy Cheng, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 10866504
    Abstract: A lithography mask includes a substrate, a reflective structure disposed over a first side of the substrate, and a patterned absorber layer disposed over the reflective structure. The lithography mask includes a first region and a second region that surrounds the first region in a top view. The patterned absorber layer is located in the first region. A substantially non-reflective material is located in the second region. The lithography mask is formed by forming a reflective structure over a substrate, forming an absorber layer over the reflective structure, defining a first region of the lithography mask, and defining a second region of the lithography mask. The defining of the first region includes patterning the absorber layer. The second region is defined to surround the first region in a top view. The defining of the second region includes forming a substantially non-reflective material in the second region.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chin-Hsiang Lin, Chien-Cheng Chen, Hsin-Chang Lee, Chia-Jen Chen, Pei-Cheng Hsu, Yih-Chen Su, Gaston Lee, Tran-Hui Shen
  • Patent number: 10866516
    Abstract: A photoresist layer is coated over a wafer. The photoresist layer includes a metal-containing material. An extreme ultraviolet (EUV) lithography process is performed to the photoresist layer to form a patterned photoresist. The wafer is cleaned with a cleaning fluid to remove the metal-containing material. The cleaning fluid includes a solvent having Hansen solubility parameters of delta D in a range between 13 and 25, delta P in a range between 3 and 25, and delta H in a range between 4 and 30. The solvent contains an acid with an acid dissociation constant less than 4 or a base with an acid dissociation constant greater than 9.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: An-Ren Zi, Joy Cheng, Ching-Yu Chang
  • Patent number: 10861698
    Abstract: The present disclosure provides a method for semiconductor manufacturing in accordance with some embodiments. The method includes providing a substrate and a patterning layer over the substrate, wherein the substrate includes a plurality of features to receive a treatment process; forming at least one opening in the patterning layer, wherein the plurality of features is partially exposed in the at least one opening; applying a directional etching to expand the at least one opening in a first direction, thereby forming at least one expanded opening; and performing the treatment process to the plurality of features through the at least one expanded opening.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: December 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yu-Tien Shen, Ya-Wen Yeh, Wei-Liang Lin, Ya Hui Chang, Yung-Sung Yen, Wei-Hao Wu, Li-Te Lin, Ru-Gun Liu, Kuei-Shun Chen
  • Patent number: 10859903
    Abstract: An alternating phase-shifting mask (Alt-PSM) comprising a 0° phase portion having a first width and a 180° phase portion having a second width greater than the first width. Example differences between the width of the 180° phase portion and the 0° phase portion may be 10 nm, 15 nm, or 20 nm. An Alt-PSM having phase portions of different widths can have an aerial image intensity transmission graph that is symmetric, for example, at 0.2-0.3 intensity.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: December 8, 2020
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Dan Yu, Aaron Michael Bowser
  • Patent number: 10845698
    Abstract: A mask, a method of forming the same and a method of manufacturing a semiconductor device using the same are disclosed. The mask includes a substrate, a reflective multilayer coating, an absorption layer and an absorption part. The substrate includes a mask image region and a mask frame region, wherein the mask frame region has a mask black border region adjacent to the mask image region. The reflective multilayer coating is disposed over the substrate. The absorption layer is disposed over the reflective multilayer coating. The absorption part is disposed in the reflective multilayer and the absorption layer in the mask black border region.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: November 24, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chiang Tu, Chun-Lang Chen, Shih-Hao Yang, Jheng-Yuan Chen
  • Patent number: 10834828
    Abstract: A method for forming passive electrical devices that includes depositing a photo reactive layer over a sidewall of a via that extends through a printed circuit board; inserting a light pipe having a mask configured to provide a passive electronic device geometry within the via to an entire depth of the via; and exposing the photo reactive layer to radiation provided by the light pipe to provide a pattern having the passive electronic device geometry on the sidewall of the via.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: November 10, 2020
    Assignee: International Business Machines Corporation
    Inventors: Gerald Bartley, Darryl Becker, Matthew Doyle, Mark Jeanson
  • Patent number: 10825684
    Abstract: Provided is a material composition and method for that includes providing a substrate and forming a resist layer over the substrate. In various embodiments, the resist layer includes a multi-metal complex including an extreme ultraviolet (EUV) absorption element and a bridging element. By way of example, the EUV absorption element includes a first metal type and the bridging element includes a second metal type. In some embodiments, an exposure process is performed to the resist layer. After performing the exposure process, the exposed resist layer is developed to form a patterned resist layer.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: November 3, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shu-Hao Chang, Chien-Chih Chen, Kuo-Chang Kau, Jeng-Horng Chen, Pi-Yeh Chia, Chi-Ren Chen, Ying-Chih Lin
  • Patent number: 10818779
    Abstract: An IC manufacturing method includes forming first mandrels and second mandrels over a substrate; and forming first spacers on sidewalls of the first mandrels and second spacers on sidewalls of the second mandrels. Each of the first and second spacers has a loop structure with two curvy portions connected by two lines. The method further includes removing the first and second mandrels; and removing the curvy portions from each of the first spacers without removing the curvy portions from the second spacers. The second spacers are used for monitoring variations of the IC fabrication processes.
    Type: Grant
    Filed: July 19, 2019
    Date of Patent: October 27, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Che Tseng, Chen-Yuan Wang, Wilson Hsieh, Yi-Hung Lin, Chung-Li Huang
  • Patent number: 10816891
    Abstract: A method of manufacturing a mask includes depositing an end-point layer over a light transmitting substrate, depositing a phase shifter over the end-point layer, depositing a hard mask layer over the phase shifter, and removing a portion of the hard mask layer and a first portion of the phase shifter to expose a portion of the end-point layer. The end-point layer and the light transmitting substrate are transparent to a predetermined wavelength.
    Type: Grant
    Filed: April 6, 2017
    Date of Patent: October 27, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hao-Ming Chang, Chien-Hung Lai, Cheng-Ming Lin, Hsuan-Wen Wang, Min-An Yang, S. C. Hsu, Shao-Chi Wei, Yuan-Chih Chu
  • Patent number: 10782608
    Abstract: A method for preparing a photomask blank comprising a transparent substrate and a chromium-containing film contiguous thereto involves the step of depositing the chromium-containing film by sputtering a metallic chromium target having an Ag content of up to 1 ppm. When a photomask prepared from the photomask blank is repeatedly used in patternwise exposure to ArF excimer laser radiation, the number of defects formed on the photomask is minimized.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: September 22, 2020
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Yukio Inazuki, Kouhei Sasamoto, Tsutomu Yuri