Abstract: A data processing apparatus capable of operating in a plurality of modes includes a technique for automatically determining the proper mode from user inputs. This invention is most applicable to small hand held or desk top data processing apparatuses which operate in one mode like a calculator and which include provisions for entering, editing and running computer programs in a higher order language. User inputs, such as those from an ordinary keyboard, are stored in an input buffer memory until an end-of-entry key is actuated. Depending upon the nature of the end-of-entry key and the particular set of keyboard entries stored in the input buffer memory, the apparatus automatically determines the required mode for processing the data in the input buffer, enters that selected mode and peforms the function required by the input characters.

Abstract: A word processing system operates either in a normal display mode or in a layout display mode. In the normal display mode, characters are displayed on a display screen in a size suited for recognizing the contents. In the layout display mode, a full page layout is displayed through the use of symbols which are smaller than the characters in the normal display mode. In a preferred mode, 2.times.3 character positions are included in a block which corresponds to one character size of the normal display mode.

Abstract: A data processing system in which a process having a low priority may be interrupted by a process having a higher priority and in which an interrupted process ceases its current operation immediately the interrupt occurs, a mechanism by which the higher priority interrupting process finishes the interrupted operation of the lower priority process before commencing its own next operation.

Abstract: The unauthorized reading of program words stored in a memory of a dating processing system is counteracted by supplying the unauthorized reader with nuisance data from a data source instead of program words from the memory. In order to determine whether the memory is being read by an unauthorized reader or by a data processor unit of the system for the execution of the program, use is made of the sequence in which the data processor unit reads the program words from the memory. This sequence deviates from the sequence in which the program words are stored in the memory. Additional information is added to each program word stored in the memory, said additional information containing an indication of a subsequent program word to be read by the data processor unit.

Abstract: A bus control system in which priority for the use of a bus is set in the order of an I/O device, a hardware operation unit and a data processing unit so that the use of the bus by the data processing unit is suppressed during the continuous processing operation of the hardware operation unit in order to allow high speed processing of the hardware operation unit and to allow interruption by the I/O device to permit the use of bus with higher priority without stopping the processing of the higher priority I/O device.

Abstract: A program run-away supervisory circuit for a microcomputer which generates a run signal each time prescribed steps are executed in a re-circulating program includes run signal discriminating frequency is above a predetermined frequency and below a preselected frequency, such that the predetermined frequency is greater than the preselected frequency.

Abstract: The present invention is the designation of one of the processors in the system as the master processor with the roll of resetting the other processors after a software crash. When a system software crash occurs, the master processor provides a reset signal that is automatically conveyed to each of the other processors to synchronize the return of the other processors back to the normal state of operation.

Abstract: Each of a plurality of stored pointers identifies and accesses one of a plurality of hardware registers in a central processing unit (CPU). Each pointer is associated with and corresponds to one of a limited number of general purpose registers addressable by various fields in a program instruction of the data processing system. At least one program instruction calls for transfer of data from a particular main storage location to a general purpose register (GPR) identified by a field in the program instruction. The GPR identified as the destination for the data is renamed by assigning a pointer value to provide access to one of the plurality of associated hardware registers. A subsequent load instruction involving the same particular main storage location determines if the data from the previous load instruction is still stored in one of the hardware registers and determines the associated pointer value.

Abstract: The combination of dictionary driven hyphenation, specialized algorithmic hyphenation and intelligent blank insertion provides improved right margin justification capability in a text processing system. When hyphenation is required for right margin justification, the system compares the word to be hyphenated to a prestored dictionary of words containing hyphenation points. When the word to be hyphenated matches one of the dictionary words the hyphenation points are retrieved and the word is split at the right margin. If the word to be hyphenated does not match one of the dictionary words, then a specialized list of prestored hyphenated suffixes and prestored statistical character digrams are compared to the word to determine the appropriate hyphenation points. Once the word has been split, the system searches the line for sets of predetermined words which may be separated from other words in the sentence by adding space to the line with a minimum of aesthetic distortion.

Abstract: An interfacing system for selectably interfacing signals to a computer, or other control apparatus such as a numerical control system, from either of alternative transducers which provide position indicative signals differing in format. A system according to the invention is useful for interfacing signals to a control system from either a resolver or an encoder and includes a digital counter whose output count, irrespective of the transducer type, is indicative of the monitored object's position. A data latch connected between the control or receiving instrumentation and the counter holds a count at an appropriate time and then provides a transfer of the position indicative count to the receiving instrumentation. Circuitry is included for automatically causing the counter to function as a reversing counter or as a reference counter, depending on the type of transducer signals to be interfaced.

Abstract: A central processing unit is cascade-connected with a plurality of I/O units, and a bus interconnecting them comprises a plurality of data lines for transmitting a control command signal, an address signal and a data signal on a time shared basis, a plurality of tag lines, each transmitting a tag signal indicating which one of the signals is provided on the data lines, and a clock line for transmitting a clock signal for these signals.

Abstract: The operation of a document distribution network having one or more input work stations, a linking network with one or more nodes and one or more output work stations, is controlled by a job control sheet. The job control sheet is partitioned into a plurality of control zones. Each zone contains dedicated marked sense information for controlling the input work stations, the network nodes and the output work stations. The input work station includes a marked sense recognition device which coacts with the job control sheet to identify the presence or absence of the control zones. Marked sense information which is associated with the input station control zones is extracted and utilized to control the input work station. The marked sense information which is associated with network nodes control zone is encoded and transmitted with identifying marks to the network nodes for further processing.

Abstract: Apparatus for quickly sorting a succession of data words on the basis of the value of a specific parameter associated with each data word has a memory divided into M blocks of N storage locations each. A counting device includes a counter for each block, the content of each counter addressing the locations within the corresponding block. During a write operation an input data word and associated parameter are applied to an input, and the value of the parameter is used as a block address; prior to this happening the count in the counter associated with the relevant block is incremented by one. Also present is a priority determining device which, during a read operation, addresses, under the control of all counts in the counting device which indicate a number of data words other than zero in the relevant block, the block of highest priority thereamong, the locations in this block again being addressed by the corresponding counter.

Abstract: A working data store simultaneously serves as a FIFO buffer and operating memory. A portion of the FIFO buffer is reallocated for use as an operating memory as processing needs arise.

Abstract: An apparatus for decoding and synchronizing data wherein only logic ZERO data bits are received as electronic pulses, each pulse alternating in opposite directions and wherein logic ONE data bits are received as no pulse. The synchronization logic includes a counter which is delayed a count of binary ONE if the logic ZERO data bit is received late, and the counter is advanced a count of binary ONE if the logic ZERO data bit is received early.

Abstract: A method for conversion of digital computer source code software to operate in a system foreign to that from which the software originated. A library is created in which each entry incorporates the name of a code statement, or macro, which may require conversion and expanded code statements which may be selected to replace the macro. Each expanded code statement may be accompanied by one or more parametric triplets, each of which corresponds to a parameter within the expanded code and expresses a condition under which the expanded code is bypassed depending on the presence or absence of the parameter in any source code statement containing the macro. The source code statements are examined serially and any statement containing no macro entered in the library is passed to an output file, while any macro is replaced by any expanded code from the dictionary for which no bypass condition is satisfied.

Abstract: A method for correlating in a digital data acquisition system the time sequence of a group of events at locations remote from the master station. The method corrects the time tags on the events record for the signal transmission time between the master and remote stations and also takes into account the turnaround time at the remote station.

Abstract: A method for compressing and expanding binary coded alphanumeric information is practiced in conjunction with a memory wherein user transparent, coded bytes are stored at address locations assigned to recognized permutations of the alphanumeric information. Information, stored in a plurality of input registers, is compressed by generating a memory address based upon the input information or using the input information directly as an address, and then determining from the memory whether or not the permutation represented by the information in the input registers is recognized. If recognized, a coded word is read from the memory which is representative of the permutation and is transmitted. Compression of the units of information per units of code used is achieved by reaccessing the memory with an indexed address generated from the contents stored in additional ones of the input registers or by addressing separate memory modules.

Abstract: A Data Exchange Subsystem comprising a data bus for transferring data signals, a load for normally maintaining a logical one signal on the data bus, a number of data receivers operatively connected to the data bus for sensing the logic state of the data signal, and a number of data transmitters operatively connected to the data bus for driving their respective data onto the bus. The data transmitter utilize open collector output buffers to force the data signal to a logical zero in response to corresponding data provided to the respective data transmitters, thereby collectively forming a "wired-and" structure, providing the Data Exchange Subsystem with an inherent data conflict resolving capability that may be utilized in data-dependent operations such as data masking.

Abstract: An electronic memoranda device especially suitable for the retrieval of stored data with low energy consumption is provided. In the electronic memoranda device, days, times, and schedules, and the like, are stored in a data memory. At regular intervals a key portion of these stored times is compared with a key portion of a current time signal outputted from a timekeeping circuit. When the key portion of time data read out from the data memory coincides with the corresponding portion of the currently outputted timekeeping signal, the entire data stored in memory is scanned for coincidence with the complete timekeeping signal. Coincident data is outputted for display. When the initial survey of the memory indicates that no data is stored corresponding to the key current time unit provided by the timekeeping circuit, the inspection operation of the memory is interrupted until the occurrence of the next time unit wherein inspection of the memory is repeated.