Patents Examined by Dmitriy Yemelyanov
-
Patent number: 11715813Abstract: A light emitting diode (LED) structure includes a semiconductor template having a template top-surface, an active quantum well (QW) structure formed over the semiconductor template, and a p-type layer. The p-type layer has a bottom-surface that faces the active QW and the template top-surface. The bottom-surface includes a recess sidewall. The recess sidewall of the p-type layer is configured for promoting injection of holes into the active QW structure through a QW sidewall of the active QW structure.Type: GrantFiled: May 19, 2021Date of Patent: August 1, 2023Assignee: GOOGLE LLCInventors: Benjamin Leung, Miao-Chan Tsai
-
Patent number: 11711896Abstract: An electronic device is provided, the electronic device includes a driving substrate, the driving substrate includes a plurality of circular grooves and a plurality of rectangular grooves, a plurality of disc-shaped light-emitting units, at least one disc-shaped light-emitting unit is disposed in at least one circular groove, and the at least one disc-shaped light-emitting unit includes an alignment element positioned on a top surface of the at least one disc-shaped light-emitting unit, a diameter of the at least one disc-shaped light-emitting unit is defined as R, a diameter of the alignment element is defined as r, a width of at least one rectangular groove among the rectangular grooves is defined as w, and a height of the at least one rectangular groove is defined as H, and the at least one disc-shaped light-emitting unit and the at least one rectangular groove satisfy the condition of (R+r)/2>(w2+H2)1/2.Type: GrantFiled: December 3, 2020Date of Patent: July 25, 2023Assignee: InnoLux CorporationInventor: Chun-Hsien Lin
-
Patent number: 11699615Abstract: A semiconductor on insulator multilayer structure is provided. The multilayer comprises a high resistivity single crystal semiconductor handle substrate, an optionally relaxed semiconductor layer comprising silicon, germanium, or silicon germanium, an optional polycrystalline silicon layer, a dielectric layer, and a single crystal semiconductor device layer.Type: GrantFiled: August 25, 2021Date of Patent: July 11, 2023Assignee: GlobalWafers Co., Ltd.Inventors: Igor Peidous, Lu Fei, Jeffrey L. Libbert, Andrew M. Jones, Alex Usenko, Gang Wang, Shawn George Thomas, Srikanth Kommu
-
Patent number: 11682747Abstract: An embodiment discloses an ultraviolet light emitting element including: a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer, an active layer disposed between the first conductive semiconductor layer and the second conductive semiconductor layer, and an etched region in which the first conductive semiconductor layer is exposed; a first insulating layer disposed on the light emitting structure and including a first hole which exposes a portion of the etched region; a first electrode electrically connected to the first conductive semiconductor layer; and a second electrode electrically connected to the second conductive semiconductor layer, wherein the light emitting structure includes an intermediate layer regrown on the first conductive semiconductor layer exposed in the first hole, the first electrode is disposed on the intermediate layer, the etched region includes a first etched region disposed at an inner side and a second etched region dispType: GrantFiled: February 18, 2021Date of Patent: June 20, 2023Assignee: Photon Wave Co.. Ltd.Inventors: Youn Joon Sung, Seung Kyu Oh, Jae Bong So, Gil Jun Lee, Won Ho Kim, Tae Wan Kwon, Eric Oh, Il Gyun Choi, Jin Young Jung
-
Patent number: 11658261Abstract: A method of manufacturing a nitride semiconductor device includes: forming a first semiconductor layer containing Al, Ga, and N and having a first thickness by doping a p-type impurity; forming a second semiconductor layer over the first semiconductor layer without doping an n-type impurity and without doping a p-type impurity, the second semiconductor layer containing Al and N and having a second thickness; and heat treating the first semiconductor layer and the second semiconductor layer. The second thickness is less than the first thickness. T band gap energy of the second semiconductor layer is greater than a band gap energy of the first semiconductor layer. After the heat treating of the first semiconductor layer and the second semiconductor layer, the second semiconductor layer contains the p-type impurity by diffusion of the p-type impurity from the first semiconductor layer.Type: GrantFiled: December 15, 2020Date of Patent: May 23, 2023Assignee: NICHIA CORPORATIONInventors: Masahiro Noguchi, Hideyuki Gono
-
Patent number: 11652193Abstract: A light-emitting diode device is provided. First and second green conversion materials are respectively configured to convert a blue light emitted from a blue light-emitting diode to generate a first green light with a first wavelength range and a first wavelength FWHM, and a second green light with a second wavelength range and a second wavelength FWHM. The second wavelength FWHM is smaller than the first wavelength FWHM. A lower bound of the first wavelength range is smaller than a lower bound of the second wavelength range, and an upper bound of the second wavelength range is greater than an upper bound of the first wavelength range. An output light emitted from the light-emitting diode device has a spectral characteristic of less than 50% of TÜV Rheinland and more than 90% of wide color gamut.Type: GrantFiled: October 29, 2020Date of Patent: May 16, 2023Assignee: Lextar Electronics CorporationInventors: Yi-Ting Tsai, Hung-Chia Wang, Chia-Chun Hsieh, Hung-Chun Tong, Yu-Chun Lee, Tzong-Liang Tsai
-
Patent number: 11637223Abstract: An LED device includes an epitaxial layered structure, a current spreading layer, a first insulating layer and a reflective structure. The current spreading layer is formed on a surface of the epitaxial layered structure. The first insulating layer is formed over the current spreading layer, and is formed with at least one first through hole to expose the current spreading layer. The reflective structure is formed on the first insulating layer, extends into the first through hole, and contacts with the current spreading layer. The current spreading layer is formed with at least one opening structure to expose the surface of the epitaxial layered structure.Type: GrantFiled: October 6, 2020Date of Patent: April 25, 2023Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Xiaoliang Liu, Anhe He, Kang-wei Peng, Su-hui Lin, Ling-yuan Hong, Chia-hung Chang
-
Patent number: 11631782Abstract: A method for etching a semiconductor structure (110) is provided, the semiconductor structure comprising a sub-surface quantum structure (30) of a first III-V semiconductor material,beneath a surface layer (31) of a second III-V semiconductor material having a charge carrier density of less than 5×1017 cm?3. The sub-surface quantum structure may comprise, for example, a quantum well, or a quantum wire, or a quantum dot. The method comprises the steps of exposing the surface layer to an electrolyte (130), and applying a potential difference between the first III-V semiconductor material and the electrolyte, to electrochemically etch the sub-surface quantum structure (30) to form a plurality of nanostructures, while the surface layer (31) is not etched. A semiconductor structure, uses thereof, and devices incorporating such semiconductor structures are further provided.Type: GrantFiled: January 25, 2019Date of Patent: April 18, 2023Assignee: CAMBRIDGE ENTERPRISE LIMITEDInventors: Rachel A. Oliver, Tongtong Zhu, Yingjun Liu, Peter Griffin
-
Patent number: 11626540Abstract: A semiconductor light-emitting element includes: an n-type semiconductor layer; an active layer; a p-side contact electrode made of Rh; a p-side electrode covering layer made of Ti or TiN that covers the p-side contact electrode; a first protective layer made of SiO2 or SiON that covers an upper surface and a side surface of the p-side electrode covering layer in a portion different from that of a first p-side pad opening; a second protective layer made of Al2O3 that covers the first protective layer, a side surface of a p-side semiconductor layer, and a side surface of the active layer in a portion different from that of a second p-side pad opening; and a p-side pad electrode that is in contact with the p-side electrode covering layer in the first p-side pad opening and the second p-side pad opening.Type: GrantFiled: September 4, 2020Date of Patent: April 11, 2023Assignee: NIKKISO CO., LTD.Inventors: Noritaka Niwa, Tetsuhiko Inazu
-
Patent number: 11626531Abstract: A semiconductor body and a method for producing a semiconductor body are disclosed. In an embodiment a semiconductor body includes a p-conducting region, wherein the p-conducting region has at least one barrier zone and a contact zone, wherein the barrier zone has a first magnesium concentration and a first aluminum concentration, wherein the contact zone has a second magnesium concentration and a second aluminum concentration, wherein the first aluminum concentration is greater than the second aluminum concentration, wherein the first magnesium concentration is at least ten times less than the second magnesium concentration, wherein the contact zone forms an outwardly exposed surface of the semiconductor body, and wherein the barrier zone adjoins the contact zone, and wherein the semiconductor body is based on a nitride compound semiconductor material.Type: GrantFiled: August 24, 2018Date of Patent: April 11, 2023Assignee: OSRAM OLED GMBHInventors: Massimo Drago, Alexander Frey, Joachim Hertkorn, Ingrid Koslow
-
Patent number: 11626352Abstract: A semiconductor device includes a semiconductor element, a mount portion, and a sintered metal bond. The semiconductor element includes a body and an electrode pad. The body has an obverse surface facing forward in a first direction and a reverse surface facing rearward in the first direction. The electrode pad covers the element reverse surface. The mount portion supports the semiconductor element. The sintered metal bond electrically bonds the electrode pad and the mount portion. The sintered metal bond includes a first rear edge and a first front edge spaced forward in the first direction from the first rear edge. The electrode pad includes a second rear edge and a second front edge spaced forward in the first direction from the second rear edge. The first front edge of the metal bond is spaced rearward in the first direction from the second front edge of the pad.Type: GrantFiled: July 25, 2018Date of Patent: April 11, 2023Assignee: ROHM CO., LTD.Inventor: Motoharu Haga
-
Patent number: 11626548Abstract: A method for transferring electroluminescent structures onto a face, referred to as the accommodating face, of an accommodating substrate. The accommodating face is moreover provided with interconnections intended to individually address each of the structures. The electroluminescent structures are initially formed on a supporting substrate and are separated by tracks. It is then proposed in the present invention to form reflective walls, vertically above the tracks, which comprise a supporting polymer (the second polymer) supporting a metal film on its sides. Such an arrangement of reflective walls makes it possible to reduce the stresses exerted on the electroluminescent structures during the transfer method according to the present invention. Moreover, the reflective walls, within the meaning of the present invention, may be produced on all the electroluminescent structures resting on a supporting substrate.Type: GrantFiled: December 17, 2018Date of Patent: April 11, 2023Assignees: ALEDIA, COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVESInventors: Marion Volpert, Vincent Beix, François Levy, Mario Ibrahim, Fabrice De Moro
-
Patent number: 11626532Abstract: A method for forming a light emitting diode (LED) uses aluminum-based material layers and oxidation during the LED formation. In some embodiments, the method may include forming an n-type layer of the LED on a substrate, forming at least one sidewall restriction layer of the LED on the substrate with the sidewall restriction layer comprising an aluminum-based material, forming a quantum well layer of the LED on the substrate, forming a p-type layer of the LED on the substrate, exposing the substrate to water vapor, and heating the substrate to oxidize at least an outer portion of the electron blocking layer. The aluminum-based material may include aluminum indium nitride or aluminum gallium arsenide.Type: GrantFiled: January 6, 2021Date of Patent: April 11, 2023Assignee: APPLIED MATERIALS, INC.Inventor: Shiva Rai
-
Patent number: 11621371Abstract: An epitaxial structure, a preparation method thereof, and a light-emitting diode (LED) are provided. The epitaxial structure includes a sapphire substrate, a GaN layer, a defect exposure layer, and a defect termination layer stacked in sequence.Type: GrantFiled: September 30, 2019Date of Patent: April 4, 2023Assignee: CHONGQING KONKA PHOTOELECTRIC TECHNOLOGY RESEARCH INSTITUTE CO., LTD.Inventor: Shungui Yang
-
Patent number: 11621367Abstract: A light-emitting diode (LED) device includes a light-emitting layer having a core-shell structure that comprises a first semiconductor layer, an active layer, and a second semiconductor layer; a passivation layer formed to cover at least a portion of a side surface and a portion of an upper surface of the second semiconductor layer; a first electrode formed on a portion of the passivation layer that is located on a side surface of the light-emitting layer, the first electrode electrically connected to the first semiconductor layer and including a reflective material; and a second electrode formed on a portion of the passivation layer that is located on an upper surface of the light-emitting layer, the second electrode contacting a portion of the upper surface of the second semiconductor layer that is exposed.Type: GrantFiled: July 20, 2020Date of Patent: April 4, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Junsik Hwang, Kyungwook Hwang
-
Patent number: 11605769Abstract: A light emitting element includes: a semiconductor layered structure; a first electrically insulating film covering surfaces of the semiconductor layered structure and defining a first opening in each of a first region and a second region of a first semiconductor layer, and defining a second opening in a portion above a second semiconductor layer; a first electrode electrically connected to the first semiconductor layer through each first opening; a second electrode electrically connected to the second semiconductor layer through the second opening; a first terminal located on the first electrode and electrically connected to the first electrode; a second terminal located on the second electrode and electrically connected to the second electrode; and a metal member located on a portion of the first electrically insulating film located over the second semiconductor layer and electrically insulated from the first terminal and the second terminal.Type: GrantFiled: July 16, 2021Date of Patent: March 14, 2023Assignee: NICHIA CORPORATIONInventor: Hiroaki Kageyama
-
Patent number: 11600750Abstract: A display device may include: a substrate; first and second electrode on the substrate; light emitting element between the first and second electrodes; a barrier structure on the substrate and including a first surface, a second surface, and a third surface; a light conversion layer on the barrier structure; and a passivation layer on the light conversion layer. A first space defined by the second and third surfaces may be between the substrate and the barrier structure. A second space defined by the first and second surfaces may be between the barrier structure and the passivation layer. The first and second spaces may be alternately located in the first direction. The light emitting element may be in the first space. The light conversion layer may be in the at least one second space.Type: GrantFiled: April 23, 2020Date of Patent: March 7, 2023Assignee: Samsung Display Co., Ltd.Inventors: Kwang Soo Bae, Beom Soo Park, Min Jeong Oh, Young Je Cho
-
Patent number: 11588039Abstract: A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.Type: GrantFiled: November 25, 2019Date of Patent: February 21, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Chan-hyeong Lee, Hoon-joo Na, Sung-in Suh, Min-woo Song, Byoung-hoon Lee, Hu-yong Lee, Sang-jin Hyun
-
Patent number: 11569413Abstract: A method includes: introducing a gas including gallium, an ammonia gas, and a gas including a p-type impurity to a reactor and forming a first p-type nitride semiconductor layer on a first light-emitting layer in a state in which the reactor has been heated to a first temperature; lowering a temperature of the reactor from the first temperature to a second temperature; introducing an ammonia gas with a first flow rate to the reactor and increasing the temperature of the reactor from the second temperature to a third temperature; and introducing a gas including gallium, an ammonia gas with a second flow rate, and a gas including an n-type impurity to the reactor, and forming a second n-type nitride semiconductor layer on the first p-type nitride semiconductor layer in a state in which the reactor has been heated to the third temperature.Type: GrantFiled: December 10, 2020Date of Patent: January 31, 2023Assignee: NICHIA CORPORATIONInventor: Seiichi Hayashi
-
Patent number: 11552083Abstract: Examples of an integrated circuit with a contacting gate structure and a method for forming the integrated circuit are provided herein. In some examples, an integrated circuit device includes a memory cell that includes a plurality of fins and a gate extending over a first fin of the plurality of fins and a second fin of the plurality of fins. The gate includes a gate electrode that physically contacts the first fin and a gate dielectric disposed between the gate electrode and the second fin. In some such examples, the first fin includes a source/drain region and a doped region that physically contacts the gate electrode.Type: GrantFiled: June 15, 2020Date of Patent: January 10, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventor: Jhon Jhy Liaw