Patents Examined by Donald Griffin
  • Patent number: 5191508
    Abstract: A process for producing a ceramic igniter comprising forming a slot in a green igniter body prior to densification and inserting into the slot an electrically non-conductive material is described. In addition, a ceramic igniter containing a slot insert produced by the process of the invention is disclosed. The inventon is particularly directed to single and double hairpin-shaped igniters.
    Type: Grant
    Filed: May 18, 1992
    Date of Patent: March 2, 1993
    Assignee: Norton Company
    Inventors: Scott R. Axelson, John T. Vayda
  • Patent number: 5191510
    Abstract: A ferroelectric capacitor for a ferroelectric memory device includes a substrate, a silicon dioxide layer, a palladium adhesion layer, a bottom electrode of platinum, a metal or an alloy, a ferroelectric material and a top electrode of platinum, a metal or an alloy.
    Type: Grant
    Filed: April 29, 1992
    Date of Patent: March 2, 1993
    Assignee: Ramtron International Corporation
    Inventor: Maria Huffman
  • Patent number: 5191509
    Abstract: A trench capacitor structure suitable for inclusion in integrated circuit devices and method for forming the same provides increased electrode surface area and capacitance by means of a textured surface of one of the capacitor electrodes. The textured surface is achieved by differentially etching grain boundaries of a doped polysilicon layer or by direct deposition of hemispherical grain polysilicon to form the electrode. Additional capacitance and contact area can be obtained by additional etching of the trench bottom prior to electrode deposition and dielectric growth.
    Type: Grant
    Filed: December 11, 1991
    Date of Patent: March 2, 1993
    Assignee: International Business Machines Corporation
    Inventor: Duen-Shun Wen
  • Patent number: 5189593
    Abstract: An integrated-distributed-resistive-capacitive network (100) having a high dielectric electronically-tunable semiconductor integrated capacitor. The network (100) also includes a resistive layer (126) formed on the high dielectric semiconductor integrated capacitor, to provide the distributed resistance of the network (100). External contact to the resistive portion of the network (100) is provided via a plurality of contact terminals (122A and 122B) which are coupled to the resistive layer (126).
    Type: Grant
    Filed: November 4, 1991
    Date of Patent: February 23, 1993
    Assignee: Motorola, Inc.
    Inventor: Leng H. Ooi
  • Patent number: 5189457
    Abstract: Apparatus 10 for processing photosensitive sheets in a tank 12 having a developer solution comprises a gas distributor 14 having a single gas distribution means 16 with at least two independent gas inlet lines 18,20 for providing a gas to the distributor 14. In another preferred embodiment, the gas distributor has independent first and second gas distribution means 26,28. In this embodiment, gas distributor 14 may be substantially star shaped and comprise a plurality of closed ended gas dispensing ducts 30 emanating from a common hub 32. In still another preferred embodiment, the gas distributor 14 is a substantially square shaped member comprising a plurality of closed ended dispensing ducts 30 alternatingly arranged in the same plane of member 31. The dispensing ducts 30 have a plurality of spaced openings 25 for emitting gas into the processing solution. In an alternative embodiment, an in-line check valve 36 prevents solution from flooding the gas distributor 14.
    Type: Grant
    Filed: January 28, 1992
    Date of Patent: February 23, 1993
    Assignee: Eastman Kodak Company
    Inventors: Ronald P. Schlee, Jeffrey L. Hall
  • Patent number: 5189595
    Abstract: Improved, edge compensated capacitors and a method for making the same are presented. The present invention arranges individual cells of capacitors and uses passive dummy cells so as to achieve a ratio between the length of the exposed perimeters of the cells of the two capacitors that is equal to the desired capacitance ratio between the two capacitors. By doing so, the edge shrinkage effects on both cells are taken into account, and accurate capacitor ratios are maintained. In one embodiment of the invention the number of intersections between exposed edges of the cells of the two capacitors are also adjusted to conform to the capacitor ratio to achieve additional edge shrinkage compensation.
    Type: Grant
    Filed: February 19, 1992
    Date of Patent: February 23, 1993
    Assignee: Silicon Systems, Inc.
    Inventor: James Dunkley
  • Patent number: 5189592
    Abstract: An electrical filter including a first electrode; a second electrode; a dielectric means connected between the first electrode and the second electrode; and a resilient coupling providing an electrical connection between the dielectric means and each of the first and second electrodes and permitting relative motion therebetween. The resilient coupling prevents fracture of the dielectric means.
    Type: Grant
    Filed: December 23, 1991
    Date of Patent: February 23, 1993
    Inventor: George M. Kauffman
  • Patent number: 5189591
    Abstract: A capacitive pressure transducer is made of aluminosilicate glass or any other glass having a low thermal coefficient.
    Type: Grant
    Filed: June 12, 1992
    Date of Patent: February 23, 1993
    Assignee: Allied-Signal Inc.
    Inventor: Anthony J. Bernot
  • Patent number: 5189594
    Abstract: A capacitor used in a semiconductor integrated circuit, in which lower electrode 31, a ferroelectric film 33, and an upper electrode in the form of a comb are formed on the source region 13a of a field-effect transistor 10 in the stated order, to form a ferroelectric capacitor which is apparently made of a plurality of capacitors small in area which are connected in parallel to one another. Thereby, the capacitor for a semiconductor integrated circuit can store a sufficient amount of signal charge, and is short in switching time.
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: February 23, 1993
    Assignee: Rohm Co., Ltd.
    Inventor: Kazuhiro Hoshiba
  • Patent number: 5187637
    Abstract: A high voltage capacitor structure for integrated circuits or the like. The capacitor includes a provision for equalizing charge when multiple capacitors are series coupled. Charge is equalized by a SiN layer overlaying, and in contact with one terminal of, the capacitor. A ground ring surrounds the capacitor structure and is also overlayed by, and in contact with, the SiN layer.
    Type: Grant
    Filed: February 14, 1992
    Date of Patent: February 16, 1993
    Assignee: AT&T Bell Laboratories
    Inventor: Milton L. Embree
  • Patent number: 5187636
    Abstract: Si regions separated from a Si-rich SiO.sub.2 film are nitrided to provide a film mainly consisting of SiO.sub.2 regions an Si.sub.3 N.sub.4 regions to be used for constituting a dielectric device or a capacitor.
    Type: Grant
    Filed: April 21, 1992
    Date of Patent: February 16, 1993
    Assignee: Rohm Co., Ltd.
    Inventor: Hironobu Nakao
  • Patent number: 5187639
    Abstract: A monomolecularfilm which can be used as a dielectric film is obtained on a substrate surface. For example, an aluminum foil electrode substrate having a natural oxide film is obtained by chemically adsorbing a chlorosilane-based surface active material comprising a fluorocarbon chain to the substrate. It is possible in this invention to have a pre-treatment as follows in lieu of using the natural oxide layer: forming an electrolytic oxidated layer by electrolytic oxidation of the metallic film, or bonding a thin oxide layer such as SiO.sub.2, Al.sub.2 O.sub.3 being several hundred nanometers in thickness to the surface metallic film by spatter deposition, thus obtaining an excellent capacitor. A capacitor can be obtained by deposition of the aluminum layer on the surface bilayer laminated film.
    Type: Grant
    Filed: June 11, 1992
    Date of Patent: February 16, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazufumi Ogawa, Mamoru Soga, Norihisa Mino
  • Patent number: 5187638
    Abstract: The present invention introduces an effective way to produce a thin film capacitor utilizing a high dielectric constant material for the cell dielectric through the use of a single transition metal, such as Molybdenum, for a bottom plate electrode which oxidizes to form a highly conducting oxide. Using Molybdenum, for example, will make a low resistive contact to the underlying silicon since Molybdenum reacts with silicon to form MoSix with low (<500 .mu..OMEGA.-cm) bulk resistance. In addition, Mo/MoSix is compatible with present ULSI process flow or fabricating DRAMs and the like.
    Type: Grant
    Filed: July 27, 1992
    Date of Patent: February 16, 1993
    Assignee: Micron Technology, Inc.
    Inventors: Gurtej S. Sandhu, Pierre Fazan
  • Patent number: 5187649
    Abstract: A solid electrolytic capacitor comprises a valve metal member having a dielectric oxide film and a conductive underlying layer formed on the member in this order, and a conductive polymer film formed on the layer. The conductive polymer film is formed by electrolytic polymerization of a polymerizable monomer contained in an aqueous solution containing a support electrolyte and a phosphate. By the presence of the phosphate in the aqueous solution, phosphate ions dissociated from the phosphate are adsorbed on the dielectric film during the course of the electrolytic polymerization. Thus, the humidity resistance of the dielectric oxide film is improved, resulting in improvements in the capacitance and loss of the capacitor under high temperature and high humidity conditions. A fabrication method of the capacitor is also described.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: February 16, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuo Kudoh, Masao Fukuyama, Toshikuni Kojima, Norishige Nanai
  • Patent number: 5187640
    Abstract: A capacitive power supply for powering a portable electrical device, such as a radiotelephone. The capacitive power supply is comprised of capacitors stacked vertically in a series connection of capacitive values capable of generating currents of levels great enough to power a radiotelephone for an extended period of time.
    Type: Grant
    Filed: October 12, 1990
    Date of Patent: February 16, 1993
    Assignee: Motorola, Inc.
    Inventors: Michael P. Metroka, Rolland R. Hackbart
  • Patent number: 5187650
    Abstract: Solid electrolytic capacitors comprise a valve metal member having a dielectric oxide film and a conductive underlying layer formed on the member in this order, and a conductive polymer film formed on the layer. The conductive polymer film is formed by electrolytic polymerization of a polymerizable monomer contained in a system containing the monomer and a support electrolyte consisting of a compound having at least one nitro group. By this, high temperature stability of the capacitor is significantly improved. Alternatively, the electrolytic polymerization may be effected in a system which comprises a monomer, a support electrolyte and a phenol or phenoxide derivative having at least one nitro group. Methods for fabricating such capacitors are also described.
    Type: Grant
    Filed: April 14, 1992
    Date of Patent: February 16, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuo Kudoh, Masao Fukuyama, Toshikuni Kojima, Norishige Nanai
  • Patent number: 5185689
    Abstract: A capacitor (11) is formed overlying a dielectric layer (34). A conductive layer (36) is formed overlying the dielectric layer (34). An optional barrier layer (16) is formed to electrically connect and isolate the conductive layer (36) from a first electrode region (20) which has a ruthenate portion. A dielectric layer (22) is formed overlying the first ruthenate electrode region (20) to form a capacitor dielectric. A second electrode region (24) is formed overlying the dielectric layer (22). An optional barrier layer (28) is formed overlying the electrode region (24). A conductive layer (32) is formed overlying the optional barrier layer (28) and makes electric contact to the electrode region (24). A dielectric layer (30) is formed to electrically isolate the capacitor (11).
    Type: Grant
    Filed: April 29, 1992
    Date of Patent: February 9, 1993
    Assignee: Motorola Inc.
    Inventor: Papu D. Maniar
  • Patent number: 5185690
    Abstract: A high dielectric sheet material comprises a monolayer of spaced high dielectric chips (e.g., ceramic single layer capacitor or SLC chips) which have been located or placed within spaced openings or windows formed in a dielectric spacer sheet. Top and bottom conductive sheets, preferably metallic foil sheets, are adhesively placed in intimate mechanical and electrical contact with the respective top and bottom external surfaces of the chips and dielectric spacer sheet. An adhesive is interposed between the metallic foil sheets and the dielectric spacer sheet (filled with high dielectric chips) such that the adhesive material holds the substrate together without interfering with electrical contact between the high dielectric chips and top and bottom foil sheets. This is preferably accomplished through the use of roughened surfaces formed on both the foil sheets and external high dielectric chips.
    Type: Grant
    Filed: October 16, 1991
    Date of Patent: February 9, 1993
    Inventor: Mark L. Miller
  • Patent number: 5184286
    Abstract: A process for manufacturing tantalum capacitors in which microwave energy is used to sinter a tantalum powder compact in order to achieve higher surface area and improved dielectric strength. The process comprises cold pressing tantalum powder with organic binders and lubricants to form a porous compact. After removal of the organics, the tantalum compact is heated to 1300.degree. to 2000.degree. C. by applying microwave radiation. Said compact is then anodized to form a dielectric oxide layer and infiltrated with a conductive material such as MnO.sub.2. Wire leads are then attached to form a capacitor to said capacitor is hermetically packaged to form the finished product.
    Type: Grant
    Filed: March 18, 1992
    Date of Patent: February 2, 1993
    Assignee: Martin Marietta Energy Systems, Inc.
    Inventors: Robert J. Lauf, Cressie E. Holcombe, Norman L. Dykes
  • Patent number: 5184287
    Abstract: According to this invention, a chip type solid electrolytic capacitor includes a capacitor element, an insulating sheathing resin layer, two anode terminals, and a cathode terminal. The capacitor element is obtained by sequentially forming an oxide film, a solid electrolytic layer, and a cathode conductive layer on an anode body consisting of a valve metal in which anode leads are extracted from two opposite end faces. The insulating sheathing resin layer is coated on an entire outer surface except for both anode lead extraction end faces and a predetermined portion of one surface. The two anode terminals are formed on both the anode lead extraction end faces and peripheral portions thereof. The cathode terminal is formed on the cathode conductive layer exposed from said insulating sheathing resin layer.
    Type: Grant
    Filed: June 9, 1992
    Date of Patent: February 2, 1993
    Assignee: NEC Corporation
    Inventor: Hiromichi Taniguchi