Abstract: Examples described herein relate to a software and hardware optimization that manages scenarios where a write operation to a register is less than an entirety of the register. A compiler detects instructions that make partial writes to the same register, groups such instructions, and provides hints to hardware of the partial write. The execution unit combines the output data for grouped instructions and updates the destination register as single write instead of multiple separate partial writes.

Abstract: A method of operating a tile-based graphics processor that can use one of plural different rendering tile sizes is disclosed. The tile-based graphics processor includes a rasteriser that can rasterise primitives in a hierarchical manner. A patch size at which to begin the hierarchical testing of primitives in the rasteriser is selected based on the rendering tile size that is to be used. This can reduce the overall number of tests performed to rasterise primitives without impacting the correct functioning of the hierarchical rasterisation process.

Abstract: A data processing system includes a producer processor that produces a sequence of data outputs for use by consumer processors of the data processing system. The system also includes a memory for storing a sequence of data outputs produced by the data processor. The data processor encodes data outputs as encoded blocks of data, storing a particular encoded block of a first frame in a first location in the memory and an indication of the first location. The data processor stores a corresponding encoded block of a second data output in a second location and updates the indication to the second location.

Abstract: A graphics processing unit (GPU) or other apparatus includes a plurality of shader engines. The apparatus also includes a first front end (FE) circuit and one or more second FE circuits. The first FE circuit is configured to schedule geometry workloads for the plurality of shader engines in a first mode. The first FE circuit is configured to schedule geometry workloads for a first subset of the plurality of shader engines and the one or more second FE circuits are configured to schedule geometry workloads for a second subset of the plurality of shader engines in a second mode. In some cases, a partition switch is configured to selectively connect the first FE circuit or the one or more second FE circuits to the second subset of the plurality of shader engines depending on whether the apparatus is in the first mode or the second mode.

Abstract: A GPU is generally configured to detect changes in the rate of frame generation that can result from, for example, changes in the complexity of the frames being generated. In response to detecting the change in the rate of frame generation, the GPU identifies a corresponding change in the refresh rate that would be required to fully synchronize the refresh rate with the rate of frame generation. If the change in the refresh rate falls outside the boundaries of a specified or dynamically generated window, the GPU limits the change in refresh rate to the corresponding boundary.

Abstract: An apparatus including a memory storing instructions and a control unit executing the instructions is provided. The control unit is configured to send signals to display first and second indicators on a display device. The control unit is further configured to receive first and second user inputs and, in response to the received inputs, to send signals to change a display state of the first indicator according to the first input. The control unit is further configured to send signals to change a display state of the second indicator according to the second input and initiate an operation to be performed based on a combination of the first and second inputs.

Abstract: A graphics processing unit having multiple groups of processor cores for rendering graphics data for allocated tiles and outputting the processed data to regions of a memory resource. Scheduling logic allocates sets of tiles to the groups of processor cores to perform a first render, and at a time when at least one of the groups has not completed processing its allocated sets of one or more tiles as part of the first render, allocates at least one set of tiles for a second render to one of the other groups of processor cores for processing. Progress indication logic indicates progress of the first render, indicating regions of the memory resource for which processing for the first render has been completed. Progress check logic checks the progress indication in response to a request for access to a region of the memory resource as part of the second render and enables access that region of the resource in response to an indication that processing for the first render has been completed for that region.

Abstract: A mobile sensor apparatus includes a capture device for capturing vehicle movements of the vehicle and an interface for transmitting data relating to the vehicle movements to a head-worn visual output device. A display system includes the mobile sensor apparatus and the head-worn visual output device.

Abstract: A computer including a subdividing section subdividing image data into plural subdivided image data, a control section that causes each of plural cores included a first processing unit to execute in parallel tasks on the subdivided image data, the tasks enabled for processing according to their precedence dependency relationship, a registration section that, if a task is executable by a second processing unit asynchronously with respect to the first processing unit, register a finish detection task to detect completion of the task on the second processing unit in a list after causing a core of the first processing unit to execute an execution instruction task instructing execution of the task on the second processing unit, and a determination section that accesses the list and to determine whether or not there is a completed finish detection task.

Abstract: A method and system for objectively tracking and analyzing the social and emotional activity of a patient using an augmented reality computing device is provided. A patient is permitted to manually manipulate a target object in the physical world while viewing an augmented version showing a unique animated character representing either an abstract language, emotions, or social skills, depending on the module. The present system tracks and records the active face and the time spent on the active face, where the active face is the face upon which the patient's focus is automatically estimated, through calculation, to be trained upon. An observer views the session, the data recorded, and an automatically generated graphical representation of the data, which permits the observer to speak to patient regarding the character or scene rendered on the face which is determined to be the active face, helping the student engage in the session.

Abstract: An image processing apparatus of the technique of this disclosure includes processing units, storage units, a control unit, dividing units which divide image data, and combining units which combine image data. The control unit specifies processing for which image data is divided according to a status of use of the storage units. The control unit causes one of the image processing units to process one of parts of image data divided based on a dividing position, combines the processed part of image data with the other part of image data, causes the other of the image processing units to process the other of parts of image data, the other of parts of image data being not processed by the one of the image processing units, and combines the processed part of image data with the one part of image data.

Abstract: Disclosed herein are systems and methods for detecting when geometry shaders output a constant amount of data and writing the data into an output stream buffer. In one aspect, an exemplary method comprises gathering information about a number of block executions associated with the received data, analyzing the gathered information to determine whether constant or variable amount of data is generated for at least one of: a stream output or a rasterization, and when the constant amount of data is generated for the stream output, writing the generated data directly into a stream output buffer, and when the constant amount of data is generated for the rasterization, writing the generated data into a rasterization buffer either directly or through a use of an intermediate index buffer.

Abstract: An image signal processor for generating a converted image based on a raw image includes processing circuitry configured to store data corresponding to a plurality of lines of a received image in a line buffer, perform an image processing operation by filtering the data stored in the line buffer based on at least one filter, and divide the raw image into a plurality of sub-images and request the plurality of sub-images from a memory in which the raw image is stored, such that the plurality of sub-images are sequentially received by the line buffer, a width of each of the plurality of sub-images being less than a width of the line buffer, and the plurality of sub-images being parallel to each other.

Abstract: Managing data for transportation is provided via storing data at a host device, where the data is processed and encapsulated into transport units having a maximum size. The data is divided and processed into processed portions of varying size. The processed portions are stored sequentially into an output buffer to form the transport units, with a potential start field space left between each processed portion. A set of processed portions stored in the output buffer is determined based on sizes of the processed portions, the set starting after a previous actual start field where the set has a size less than the maximum size and a potential start field space after a last of the processed portions in the set is replaced by an actual start field to define the set. Sets of processed portions delimited by actual start fields may then be output.

Abstract: In a method of operating a display device supporting a variable frame mode, frame data are received during a constant active period of a frame period including the active period and a variable blank period, the received frame data are written to a frame memory in the active period, the received frame data are outputted to a data driver in the active period to display an image based on the received frame data, a time of the variable blank period is counted, and, when the time of the variable blank period reaches a predetermined threshold blank time, the frame data stored in the frame memory are outputted to the data driver in the variable blank period to display an image based on the frame data stored in the frame memory.

Abstract: An operating method of a display driving integrated circuit (DDIC) includes correcting first image data using correction data in a first operating mode. The first image data is received from a processor via an interface, and the correction data is stored in a first memory included in the DDIC. The method further includes storing second image data received from the processor in the first memory in response to a mode switching signal controlling the DDIC to switch to a second operating mode, and displaying the second image data on a display panel in the second operating mode.

Abstract: The present invention discloses a method for real-time rendering of giga-pixel images. Image data are subject to offline pre-processing, and then are subject to data decoding and redirection through a decoding module. A corresponding scheduling strategy is determined according to different image inputs, and rendering is executed by a renderer. The present invention may realize the real-time rendering of a giga-pixel panoramic view in a conventional display device, to greatly reduce the resource allocated for rendering of giga-pixel images. The present invention may render an image originally requiring a 40G or more video memory capacity on a common video card with a 1G-4G video memory capacity.

Abstract: Embodiments described herein are generally directed to conservative rasterization pipeline configurations that allow EarlyZ to be enabled for conservative rasterization.

Abstract: A photo filter (e.g., artistic) light field effect system comprises an eyewear device that includes a frame, a temple connected to a lateral side of the frame, and a depth-capturing camera. Execution of programming by a processor configures the photo filter light field effect system to apply a photo filter selection to: (i) a left raw image or a left processed image to create a left photo filter image, and (ii) a right raw image or a right processed image to create a right photo filter image. The photo filter light field effect system generates, a photo filter light field effect image with an appearance of a spatial rotation or movement, by blending together the left photo filter image and the right photo filter image based on a left image disparity map and a right image disparity map.

Abstract: A three-dimensional model creator creates individual models indicative of individual shapes of at least two objects from an integrated model created based on data obtained by imaging or measuring the objects together. The three-dimensional model creator creates a plurality of division models by dividing the integrated model with extension planes obtained by extending surfaces that define the integrated model, identifies two-dimensional regions in which the objects exist individually, based on the obtained data, tags the division models based on projections of the division models and the two-dimensional regions, and creates the individual models of the objects from the tagged division models.