Patents Examined by Douglas M Menz
  • Patent number: 10978495
    Abstract: An array substrate includes an electrostatic shielding layer disposed on a substrate, an isolating layer covering the electrostatic shielding layer, gate lines, data lines, and thin film transistors. The gate lines, the data lines, and the thin film transistors are disposed on the isolating layer. An orthographic projection of a pattern of the electrostatic shielding layer on the substrate covers an orthographic projection of at least one of a pattern of the gate lines, a pattern of the data lines, and a pattern of the thin film transistors on the substrate.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: April 13, 2021
    Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pei Wang, Hyunjin Kim, Kai Zhang, Dawei Shi, Wentao Wang
  • Patent number: 10971618
    Abstract: A miller, a non-transitory computer-readable medium, and a method for milling a multi-layered object. The method may include milling each structural element of an array of structural elements that are spaced apart from each other by gaps to provide the milled structural elements, wherein each milled structural element has a flat upper surface, wherein prior the milling each one of the structural elements of the array has a flat upper surface of a certain width, wherein the certain width is of a nanometric scale. The milling of each structural element of the array may include scanning a defocused ion beam of the certain width along a longitudinal axis of the structural element. A current intensity of the defocused ion beam decreases with a distance from a middle of the defocused ion beam.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: April 6, 2021
    Assignee: Applied Materials Israel Ltd.
    Inventors: Ron Davidescu, Yehuda Zur
  • Patent number: 10971473
    Abstract: According to one embodiment, a semiconductor device includes a substrate, first stacked components, second stacked components, and a coating resin. The first stacked components include first chips and are stacked on a surface of the substrate. The second stacked components include second chips and are stacked on the surface. The coating resin covers the surface, the first stacked components, and the second stacked components. A first top surface of a second farthest one of the first chips away from the surface differs in position in a first direction from a second top surface of second farthest one of the second chips away from the surface.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: April 6, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Yoshiyuki Kosaka
  • Patent number: 10971356
    Abstract: Various methods and structures for fabricating a semiconductor structure. The semiconductor structure includes in a top layer of a semiconductor stack a semiconductor contact located according to a first horizontal pitch. A first metallization layer is disposed directly on the top layer and includes a metallization contact located according to a second horizontal pitch, the second horizontal pitch being different from the first horizontal pitch such that the location of the metallization contact is vertically mismatched from the location of the semiconductor contact. A second metallization layer is disposed directly on the first metallization layer. The second metallization layer includes a super viabar structure that forms an electrical interconnect, in the second metallization layer, between the semiconductor contact in the top layer of the semiconductor stack and the metallization contact in the first metallization layer.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: April 6, 2021
    Assignee: International Business Machines Corporation
    Inventors: Su Chen Fan, Hsueh-Chung Chen, Yann Mignot, James J. Kelly, Terence B. Hook
  • Patent number: 10964766
    Abstract: A transparent emissive device is provided. The device may include one or more OLEDs having an anode, a cathode, and an organic emissive layer disposed between the anode and the cathode. In some configurations, the OLEDs may be non-transparent. The device may also include one or more locally transparent regions, which, in combination with the non-transparent OLEDs, provides an overall device transparency of 5% or more.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: March 30, 2021
    Assignee: Universal Display Corporation
    Inventor: Michael Hack
  • Patent number: 10943877
    Abstract: A semiconductor device may include at least one semiconductor chip, an encapsulant encapsulating the at least one semiconductor chip, a first power terminal connected to the at least one semiconductor chip within the encapsulant, and a second power terminal electrically connected to the first power terminal via the at least one semiconductor chip within the encapsulant.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: March 9, 2021
    Assignee: DENSO CORPORATION
    Inventor: Takanori Kawashima
  • Patent number: 10937803
    Abstract: According to one embodiment, a semiconductor storage device includes a stacked body, a first semiconductor layer extending in the stacked body, a first charge storage layer disposed between the plurality of first conductor layers and the first semiconductor layer, a second conductor layer disposed above the stacked body, a second semiconductor layer extending through the second conductor layer, a third conductor layer disposed between the second semiconductor layer and the second conductor layer, a first insulator layer disposed above the third conductor layer, and a second insulator layer including a first portion disposed between the second semiconductor layer and the third conductor layer and a second portion disposed between the second semiconductor layer and the first insulator layer. A diameter of the second insulator layer is larger in the second portion than in the first portion.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: March 2, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki Kashima, Kohei Nyui, Kotaro Fujii, Hiroyuki Yamasaki
  • Patent number: 10937704
    Abstract: A method includes depositing a first conductive material on a first-type channel stack and a second-type channel stack, the first conductive material having a first workfunction, the first conductive material being formed between multiple layers of both the first-type channel stack and the second-type channel stack. The method further includes partially removing the first conductive material from the second-type channel stack such that the first conductive material remains between the multiple layers of both the first-type channel stack and the second-type channel stack and fully removing the first conductive material from the second-type channel stack.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: March 2, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuo-Cheng Chiang, Chung-Wei Hsu, Lung-Kun Chu, Jia-Ni Yu, Chih-Hao Wang, Mao-Lin Huang
  • Patent number: 10937988
    Abstract: An organic EL display panel includes a substrate, a plurality of pixel electrodes disposed in a matrix pattern over the substrate, a first current feeding auxiliary electrode layer disposed to extend in a column or row direction in at least one of gaps between adjacent ones of the pixel electrodes over the substrate, a second current feeding auxiliary electrode layer that contains aluminum as a main constituent and is disposed to be superposed on the first current feeding auxiliary electrode layer, a plurality of light emitting layers disposed on the plurality of pixel electrodes, and a common electrode layer disposed continuously to cover the first current feeding auxiliary electrode layer and the second current feeding auxiliary electrode layer as well as an upper side of the plurality of light emitting layers.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: March 2, 2021
    Assignee: JOLED INC.
    Inventors: Masaki Nishimura, Hiroyuki Ajiki, Shuhei Yada, Yasuharu Shinokawa
  • Patent number: 10923555
    Abstract: An organic light-emitting apparatus includes a substrate including an active area, a dead area, and a pad area, a display unit disposed in the active area and including thin-film transistors, pixel electrodes, and a portion of a common electrode, a first voltage supply unit disposed on the dead and pad areas and electrically contacting the common electrode, a second voltage supply unit overlapping the common electrode, and spaced apart and electrically insulated therefrom, and an insulating layer disposed between the common electrode and the second voltage supply unit, in which a portion of the common electrode that overlaps the first voltage supply unit is closer to the pad area than that of a portion of the common electrode that overlaps the second voltage supply unit, and an end portion of the insulating layer contacts an end portion of the first voltage supply unit adjacent to the active area.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: February 16, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Hyejin Shin
  • Patent number: 10921618
    Abstract: An optical modulating device may include a plurality of quantum dot (QD)-containing layers having QDs and a plurality of refractive index change layers. The QD-containing layers may be disposed between the refractive index change layers, respectively. The optical modulating device may be configured to modulate light-emission characteristics of the plurality of QD-containing layers. At least two of the QD-containing layers may have different central emission wavelengths. At least two of the plurality of refractive index change layers may include different materials or have different carrier densities.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: February 16, 2021
    Assignees: SAMSUNG ELECTRONICS CO., LTD., CALIFORNIA INSTITUTE OF TECHNOLOGY
    Inventors: Duhyun Lee, Ruzan Sokhoyan, Yu-Jung Lu, Ghazaleh Kafaie Shirmanesh, Harry Atwater, Ragip Pala, Chanwook Baik
  • Patent number: 10923559
    Abstract: A display panel of a portable electronic device and a method for designing the same are provided. A display module includes a display panel, a drive chip and a flexible circuit board. The display panel includes a display area and a non-display area, and the drive chip corresponds to the non-display area of the display panel. The display panel is provided with an electrical connection point for connecting with the flexible circuit board, and the electrical connection point corresponds to a side of the drive chip so as to reduce a height of the non-display area of the display panel. The display panel and the method for designing the display panel are suitable for display panels of various materials, which can reduce the height of the non-display area, improve the integration of the display panel, enhance the portable performance of the electronic device, and maintain a lower manufacturing cost.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: February 16, 2021
    Assignee: Galaxycore Shanghai Limited Corporation
    Inventor: Fuzhong Wang
  • Patent number: 10903167
    Abstract: An electronic package, a packaging substrate, and methods for fabricating the same are disposed. The electronic package includes a circuit structure having a first side and a second side opposing the first side, an electronic component disposed on the first side of the circuit structure, an encapsulation layer formed on the first side of the circuit structure and encapsulating the electronic component, a metal structure disposed on the second side of the circuit structure, and a plurality of conductive elements disposed on the metal structure. The plurality of conductive elements are disposed on the metal structure, rather than disposed on the circuit structure directly. Therefore, the bonding between the conductive elements and the circuit structure is improved, to avoid the plurality of conductive elements from being peeled.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: January 26, 2021
    Assignee: Siliconware Precision Industries Co., Ltd.
    Inventors: Jun-Chang Ding, Hong-Da Chang, Hsi-Chang Hsu
  • Patent number: 10892344
    Abstract: Energy bands of a thin film containing molecular clusters are tuned by controlling the size and the charge of the clusters during thin film deposition. Using atomic layer deposition, an ionic cluster film is formed in the gate region of a nanometer-scale transistor to adjust the threshold voltage, and a neutral cluster film is formed in the source and drain regions to adjust contact resistance. A work function semiconductor material such as a silver bromide or a lanthanum oxide is deposited so as to include clusters of different sizes such as dimers, trimers, and tetramers, formed from isolated monomers. A type of Atomic Layer Deposition system is used to deposit on semiconductor wafers molecular clusters to form thin film junctions having selected energy gaps. A beam of ions contains different ionic clusters which are then selected for deposition by passing the beam through a filter in which different apertures select clusters based on size and orientation.
    Type: Grant
    Filed: May 16, 2018
    Date of Patent: January 12, 2021
    Assignee: STMICROELECTRONICS, INC.
    Inventor: John H. Zhang
  • Patent number: 10886469
    Abstract: A method of manufacturing a display device, including: a stacking step of stacking, on a glass substrate, a sacrificial resin layer, a metal layer, a transparent metal oxide layer, a base material resin layer, and a functional layer including at least one of a pixel circuit-constituting layer driving a plurality of pixels and a color filter layer, in this order; a radiating step of radiating a pulsed light of a xenon flash lamp to the metal layer through the glass substrate and the sacrificial resin layer; and a detaching step of reducing a force of adhesion between the sacrificial resin layer and the metal layer with the pulsed light radiated in the radiating step, and detaching the sacrificial resin layer from the metal layer.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: January 5, 2021
    Assignee: Japan Display Inc.
    Inventors: Hiroshi Kawanago, Kazufumi Watabe
  • Patent number: 10886409
    Abstract: A display backplate and a fabrication method thereof, a display panel and a display device are provided. The display backplate includes: a substrate; a first light shielding layer, provided on the substrate; a first thin film transistor, provided on a side of the first light shielding layer facing away from the substrate, and including a first active layer, a first source electrode, a first drain electrode and a first top-gate electrode; a first layer, including a first semiconductor portion and a first conductor portion, the first semiconductor portion constituting the first active layer; and a third electrode, the first conductor portion being provided between the first light shielding layer and the third electrode. The first light shielding layer and the first conductor portion form a first capacitance, and the third electrode and the first conductor portion form a second capacitance.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: January 5, 2021
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhen Song, Guoying Wang
  • Patent number: 10879123
    Abstract: A method for forming an integrated circuit (IC) package is provided. In some embodiments, a semiconductor workpiece comprising a scribe line, a first IC die, a second IC die, and a passivation layer is formed. The scribe line separates the first and second IC dies, and the passivation layer covers the first and second IC dies. The first IC die comprises a circuit and a pad structure electrically coupled to the circuit. The pad structure comprises a first pad, a second pad, and a bridge. The bridge is within the scribe line and connects the first pad to the second pad. The passivation layer is patterned to expose the first pad, but not the second pad, and testing is performed on the circuit through the first pad. The semiconductor workpiece is cut along the scribe line to individualize the first and second IC dies, and to remove the bridge.
    Type: Grant
    Filed: November 6, 2019
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yueh-Chuan Lee, Chia-Chan Chen, Ching-Heng Liu
  • Patent number: 10879485
    Abstract: An organic light emitting diode display device includes a substrate. A first protective layer is disposed on the substrate. A conductive line is disposed on the first protective layer. A second protective layer is disposed on the conductive line. A first electrode is disposed on the second protective layer. An organic light emitting layer is disposed on the first electrode. A second electrode is disposed on the light emitting layer. The first electrode is symmetric with respect to a center of the conductive line.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: December 29, 2020
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Moojong Kim
  • Patent number: 10873024
    Abstract: The technology of a crossbar array circuit and method of improving thermal shielding are disclosed. An example apparatus includes a bottom wire; a first vertical thermal shielding layer formed on the bottom wire, a bottom electrode formed on the first vertical thermal shielding layer; a filament forming layer formed on the bottom electrode; a top electrode formed on the filament forming layer; a second vertical thermal shielding layer formed on the top electrode; a top wire formed on the second vertical thermal shielding layer, wherein the filament forming layer is configured to form a filament within the filament forming layer when applying a switching voltage upon the filament forming layer, and wherein a material of the first vertical thermal shielding layer and the second vertical thermal shielding layer includes ReOx, RuOx, IrOx, ITO, a combination thereof, or an alloy or doping thereof (with or without other thermally conductive materials).
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 22, 2020
    Inventors: Minxian Zhang, Ning Ge
  • Patent number: 10872848
    Abstract: An embodiment of a semiconductor package includes a leadframe and a mold compound partly encasing the leadframe so that leads protrude from the mold compound and at least two die pads have a surface at a first side of the leadframe which is not covered by the mold compound. A laser module is attached to the surface of the at least two die pads which is not covered by the mold compound. A driver die is attached to the leadframe at a second side of the leadframe opposite the first side so that the laser module and the driver die are disposed in a stacked arrangement, the driver die configured to control the laser module. The driver die is in direct electrical communication with the laser module only through the leadframe and any interconnects which attach the laser module and driver die to the leadframe.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 22, 2020
    Assignee: Infineon Technologies AG
    Inventors: Woon Yik Yong, Andreas Kucher, Chia-Yen Lee, Shao Ping Wan