Abstract: A display device includes: a first main pixel being configured to emit light of a first color, and a second main pixel being configured to emit light of a second color; and a first auxiliary pixel and a second auxiliary pixel on the second area, the first auxiliary pixel being configured to emit light of the first color, and the second auxiliary pixel being configured to emit light of the second color, wherein a first virtual line passing through a center of an emission area of the first main pixel and a center of an emission area of the first auxiliary pixel is parallel to a first direction, and a second virtual line passing through a center of an emission area of the second main pixel and a center of an emission area of the second auxiliary pixel crosses the first direction.

Abstract: An electronic device may include a display and a sensor under the display. The display may include an array of subpixels for displaying an image to a user of the electronic device. At least a portion of the array of subpixels may be selectively removed in a pixel removal region to improve optical transmittance to the sensor through the display. The pixel removal region may include a plurality of pixel free regions that are devoid of thin-film transistor structures, that are devoid of power supply lines, that have continuous open areas due to rerouted row/column lines, that are partially devoid of touch circuitry, that optionally include dummy contacts, and/or have selectively patterned display layers.

Abstract: A semiconductor device with high storage capacity is provided. The semiconductor device includes first to sixth insulators, first to third conductors, and first to third material layers. The first conductor overlaps with a first insulator and a first material layer. A first region of the first material layer overlaps with a second material layer, a second conductor, a second insulator, and a third insulator. The third material layer is positioned in a region including a second region of the first material layer and top surfaces of the second material layer, the second conductor, the second insulator, and the third insulator; a fourth insulator is positioned over the third material layer; the sixth insulator is positioned over the fourth insulator; and a fifth insulator is positioned over the sixth insulator. The third conductor is positioned over the fifth insulator overlapping with the second region of the first material layer.

Abstract: A display apparatus includes a substrate, a gate electrode overlapping the substrate, and a semiconductor layer positioned between the substrate and the gate electrode. The semiconductor layer includes a first layer and a second layer positioned between the first layer and the gate electrode. A hydrogen content of the first layer is greater than a hydrogen content of the second layer.

Abstract: An organic light-emitting diode display panel and a display device are provided in the present disclosure. The organic light-emitting diode display panel includes a general display region and a light-transmitting display region, wherein the light-transmitting display region corresponds to an under-screen camera placement region; the organic light-emitting diode display panel further includes an array unit and a light-emitting unit disposed on an upper side of the array unit, and the light-emitting unit includes a cathode layer disposed on a surface of the array unit. The cathode layer includes a second cathode portion corresponding to the light-transmitting display region, and a first cathode portion corresponding to the general display region, and the second cathode portion and the first cathode portion are disconnected from each other to connect different voltages respectively.

Abstract: To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.

Abstract: A display panel and a display device are provided. The display panel includes a base substrate and a conductive member, wherein the conductive member is located on the base substrate and includes a first conductive sub-layer, a second conductive sub-layer and a third conductive sub-layer stacked in sequence; the first conductive sub-layer is closer to the base substrate than the third conductive sub-layer; a conductivity of the first conductive sub-layer is smaller than that of the second conductive sub-layer, and a melting point of the third conductive sub-layer is larger than that of the second conductive sub-layer; the second conductive sub-layer includes a first surface close to the first conductive sub-layer and a second surface close to the third conductive sub-layer, the first surface and the second surface are oppositely arranged; the third conductive sub-layer protrudes from the second surface along a width direction of the conductive member.

Abstract: A display substrate and a preparation method thereof, and a display device are provided. The display substrate (200/300/400) includes a display region (201/301/401) and an opening region (2011/3011/4011), the display region (200/300/400) surrounds the opening region (2011/3011/4011), a first barrier wall (2012/3012/4012) is between the display region (201/301/401) and the opening region (2011/3011/4011), and the first barrier wall (2012/3012/4012) surrounds the opening region (2011/3011/4011); the first barrier wall (2012/3012/4012) includes a first metal layer structure, and at least one side surface, surrounding the opening region (2011/3011/4011), of the first metal layer structure includes a recess (2012A/3012A/4012A). The display substrate combines the imaging device with the display region of the display substrate and has a better encapsulation effect.

Abstract: A display device includes a circular display area and a non-display area surrounding the circular display area. The display device may further include a load matcher disposed adjacent to an edge of the circular display area in the circular display area, a pixel disposed in the circular display area, spaced apart from the non-display area by the load matcher, and connected to the load matcher, and a repair pixel disposed adjacent to the edge of the circular display area in the non-display area, and connected to the pixel.

Abstract: A semiconductor device includes a first chip including a substrate and a first interconnection layer formed on a first surface of the substrate; and a second interconnection layer formed on a second surface opposite to the first surface of the substrate. The second interconnection layer includes a first power line to which a first power potential is applied, a second power line to which a second power potential is applied, and a first switch connected between the first power line and the second power line. The first chip includes a first grounding line, a third power line to which the second power potential is applied, and a first region in which the first grounding line and the third power line are disposed. In plan view, the first switch overlaps the first region.

Abstract: A display panel includes: a plurality of pixels in a display area; a plurality of data lines in the display area and extending along a first direction; a plurality of scan lines in the display area and extending along a second direction crossing the first direction; and a scan driver in a peripheral area adjacent to the display area and configured to provide a scan signal to the scan lines, wherein the peripheral area includes a corner area adjacent to a corner of the display area, and a notch area adjacent to the corner area and receding from a side of the peripheral area to form a notch, wherein a distance between the display area and an outer edge of the corner area is larger than a distance between the display area and an outer edge of the notch area.

Abstract: Disclosed are display panels and display devices. The display panel comprises a base layer which includes a first region and a second region having a first sub-region and a second sub-region, first pixels in the first region, and second pixels in the first sub-region. Each of the first and second pixels includes a pixel electrode, an emission layer on the pixel electrode, and a common electrode on the emission layer. The pixel electrode is shifted relative to the emission layer in a direction away from the second sub-region.

Abstract: The present disclosure provides a flexible display screen and a display device. The flexible display screen includes an array substrate and a chip bounding to the array substrate; the chip includes an output end and an input end; a total area of a contact surface between the array substrate and the output end of the chip is equal to a total area of a contact surface between the array substrate and the input end of the chip.

Abstract: The present disclosure relates to a terminal device, a display apparatus, a display panel, and a manufacturing method thereof, which is related to the field of display. The display panel includes a drive back plate, having a light transmitting region and a drive region at least partially surrounding the light transmitting region, wherein the drive region has a plurality of pixel circuits and at least includes first pixel circuits and second pixel circuits; a transfer layer, provided on a side of the drive back plate and including a plurality of layers of mutually insulated lead layers, wherein each of the lead layers includes a plurality of mutually insulated leads; each lead extends from the light transmitting region to the drive region and is connected to one of the first pixel circuits; a light emitting layer, provided on a side of the transfer layer away from the drive back plate.

Abstract: In at least one illustrative embodiment, a field-effect transistor biosensor for detection of a pathogen includes a substrate and a channel formed from a two-dimensional monolayer or few-layer metal chalcogenide that is functionalized with a biorecognition element. The biorecognition element may be an antibody, such as an antibody for the SARS-CoV-2 spike protein. A method for manufacturing the biosensor includes depositing an amorphous two-dimensional material on the substrate with pulsed laser ablation, crystallizing the amorphous two-dimensional material to generate a two-dimensional monolayer coupled to the substrate, and activating a surface of the two-dimensional material with the biorecognition element after crystallizing the amorphous two-dimensional material. The composition of the two-dimensional material may be tuned. The substrate may be photolithographically patterned. Other embodiments are described and claimed.

Abstract: According to one embodiment, a semiconductor memory device includes a substrate expanding in a first direction and a second direction, a plurality of conductive layers arranged in a third direction with a distance therebetween, the conductive layers including a first conductive layer, and each including a first portion and a second portion being arranged with the first portion in the second direction and including a terrace portion provided so as not to overlap an upper conductive layer in the third direction, a first insulating portion provided between the first portions and the second portions, and a first insulating layer arranged with the first portion of the first conductive layer in the second direction with the first insulating portion interposed therebetween.

Abstract: An integrated circuit includes a substrate; and a first conductive line extending parallel to a top surface of the substrate. The first conductive line is a first distance from the substrate. The integrated circuit further includes a second conductive line extending parallel to the top surface of the substrate. The second conductive line is a second distance from the substrate. The integrated circuit further includes a third conductive line extending parallel to the top surface of the substrate. The third conductive line is a third distance from the substrate. The integrated circuit further includes a supervia directly connected to the first conductive line and the third conductive line, wherein a first angle between a sidewall of a lower portion of the supervia and the substrate is different from a second angle between a sidewall of an upper portion of the supervia and the substrate.

Abstract: The current disclosure describes techniques for individually selecting the number of channel strips for a device. The channel strips are selected by defining a three-dimensional active region that include a surface active area and a depth/height. Semiconductor strips in the active region are selected as channel strips. Semiconductor strips contained in the active region will be configured to be channel strips. Semiconductor strips not included in the active region are not selected as channel strips and are separated from source/drain structures by an auxiliary buffer layer.

Abstract: A semiconductor device includes a gate structure including a gate electrode, a gate spacer layer on a side surface of the gate electrode, and a gate capping layer on the gate electrode. Moreover, the semiconductor device includes a source/drain region on at least one side of the gate structure, a contact plug on the source/drain region, and first and second insulating films between the contact plug and the gate structure and defining an air gap. The first insulating film includes a first surface, and a second surface extending from the first surface while forming a first angle. The second insulating film includes a third surface forming a second angle with the first surface of the first insulating film. The second angle is an acute angle narrower than the first angle. The air gap is defined by the first surface, the second surface, and the third surface.

Abstract: Provided is a semiconductor device including: a semiconductor substrate having upper and lower surfaces and throughout which a first-conductivity-type bulk donor is distributed; a first-conductivity-type high concentration region including a center position in a depth direction of the substrate and having a donor concentration higher than a doping concentration of the donors; and an upper surface side oxygen reduction region provided in contact with the upper surface inside the substrate and in which an oxygen chemical concentration decreases as approaching the upper surface. The oxygen chemical concentration distribution may have a maximum value region where the oxygen chemical concentration is 50% or more of the maximum value, a first peak of an impurity chemical concentration may be arranged in an end of the high concentration region in the depth direction, and the peak may be arranged on the upper surface side with respect to or in the maximum value region.