Abstract: A semiconductor package includes a substrate, a semiconductor device over the substrate and a plurality of solder joint structures bonded between the semiconductor device and the substrate, wherein each of the plurality of solder joint structures includes, by weight percent, 2% to 23% of Indium (In).

Abstract: A method includes: disposing a first conductive segment; disposing a first conductive via above the first conductive segment; disposing a first conductive line above the first conductive via; and disposing a second conductive segment electrically coupled to the first conductive line through a third conductive segment, the first conductive segment, and the first conductive via.

Abstract: A phosphor substrate of the present invention is a phosphor substrate having a plurality of light emitting elements mounted on one surface, and includes an insulating substrate, a first electrode group which is disposed on one surface of the insulating substrate and includes a plurality of electrodes bonded to the plurality of light emitting elements, a phosphor layer which is disposed on one surface of the insulating substrate and includes a phosphor in which a light emission peak wavelength, in a case where light emitted by light emitting element is used as excitation light, is in a visible light region, and a second electrode group which is disposed on the other surface of the insulating substrate and includes a plurality of electrodes.

Abstract: A display device includes a display area including a corner portion, a display panel including a non-display area located around the display area, and a cover window disposed on the display panel. The display panel includes a flexible substrate, and a crack propagation prevention pattern including a first organic layer disposed on the flexible substrate and directly contacting the flexible substrate. The intersecting point of a bending line overlaps with the crack propagation prevention pattern in the a thickness direction. In addition, the display device further includes alignment marks which overlap with the bending line.

Abstract: A device includes a substrate including an active region, a gate stack over the active region, and a hard mask over the gate stack. The hard mask includes a capping layer, a buttress layer extending along sidewalls and a bottom of the capping layer, and a liner layer extending along sidewalls and a bottom of the buttress layer. The buttress layer includes a metal oxide material or a metal nitride material.

Abstract: A semiconductor device includes a peripheral circuit structure including a lower substrate, a plurality of circuits formed on the lower substrate, and a plurality of wiring layers connected to the plurality of circuits, an upper substrate covering the peripheral circuit structure and including a through opening, a memory stack structure including a plurality of gate lines, a memory cell contact passing through at least one of the plurality of gate lines to contact one gate line from among the plurality of gate lines, the memory cell contact extending to the peripheral circuit structure through the through opening and being configured to be electrically connected to a first wiring layer from among the plurality of wiring layers, and a plurality of dummy channel structures passing through at least one of the plurality of gate lines to extend to the peripheral circuit structure through the through opening.

Abstract: In a semiconductor package in which a semiconductor substrate is mounted, thermal resistance of the semiconductor substrate is reduced. The semiconductor package includes a semiconductor substrate, an insulating layer, a metal layer, an interposer substrate, a mounting substrate, a signal transmission solder ball, and a solder member. A pad is provided on one surface of the semiconductor substrate. A different surface of the semiconductor substrate is covered with the insulating layer. The metal layer covers the insulating layer. A wire to be connected to the pad is formed on the interposer substrate. The signal transmission solder ball is jointed to the wire and the mounting substrate, and transmits a predetermined electrical signal. The solder member is jointed to the metal layer and the mounting substrate.

Abstract: A light-emitting diode (LED) packaging module includes LED chips, a wiring layer, and an encapsulant component. Each of the LED chips includes a chip first surface, a chip second surface, a chip side surface, and an electrode unit. The wiring layer is disposed on the chip second surfaces of the LED chips, and contacts and is electrically connected to the electrode units. The encapsulant component includes a first encapsulating layer that covers the chip side surface, and a second encapsulating layer that covers the wiring layer. The LED chip has a thickness TA, the first encapsulating layer has a thickness TB, in which TB/TA?1.

Abstract: An electronic device includes a semiconductor die having a first side, an orthogonal second side for mounting to a substrate or circuit board, a conductive terminal on the first side, the conductive terminal having a center that is spaced apart from the second side by a first distance along a direction, and a solder structure extending on the conductive terminal, the solder structure having a center that is spaced apart from the center of the conductive terminal by a non-zero second distance along the direction.

Abstract: A semiconductor package includes a package substrate, first and second bumps on a lower surface of the package substrate, a semiconductor chip on an upper surface of the package substrate, first and second connection patterns on the upper surface of the package substrate, a molding on the upper surface of the package substrate and covering the semiconductor chip, a warpage control layer on the molding, an upper insulating layer on the warpage control layer, a first opening passing through the upper insulating layer and exposing an upper surface of the warpage control layer, a second opening overlapping the first opening in a top view, the second opening passing through the warpage control layer and exposing the first connection pattern, and a third opening passing through the upper insulating layer and exposing the second connection pattern.

Abstract: A novel light-emitting device is provided. A light-emitting device or a display device having high display quality is provided. An electronic device including a display portion with high display quality is provided. Provided is a light-emitting device including a first pixel which includes a first light-emitting element and a light-scattering layer; and a second pixel which includes a second light-emitting element and a first color conversion layer, in which an emission center substance in each of the first light-emitting element and the second light-emitting element is an organic compound, the light-scattering layer includes a first substance that scatters light emitted from the first light-emitting element, the first color conversion layer includes a second substance that emits light by absorbing light emitted from the second light-emitting element, and the first light-emitting element and the second light-emitting element have a microcavity structure.

Abstract: A data storage device including, in one implementation, a number of memory die packages disposed on a substrate within the data storage device. Each memory die package has a die density that includes one or more memory dies. The die density of each memory die package is configured to provide an even thermal distribution across the number of memory die packages. The respective die densities of two memory of the die packages are different from each other.

Abstract: Disclosed herein are microelectronic assemblies including microelectronic components that are coupled together by direct bonding, as well as related structures and techniques. For example, in some embodiments, a microelectronic assembly may include a first microelectronic component and a second microelectronic component coupled to the first microelectronic component by a direct bonding region, wherein the direct bonding region includes at least part of an inductor.

Abstract: Related to is a method for cleaning an in-process wafer. The method includes causing the in-process wafer to be rotated, causing function water to be applied to a surface of the rotated in-process wafer to generate a flowing function water film on the rotated in-process wafer, causing the surface of the in-process wafer to be cleaned by a sonic device for a first period, causing the sonic device to be lifted and/or rotation speed of the rotated in-process wafer to be accelerated to separate the sonic device from the flowing function water film, causing the function water to be applied to the surface of the rotated in-process wafer for a second period after separating the sonic device from the function water film, and causing the surface of the in-process wafer to be dried.

Abstract: A phosphor substrate of the present invention is a phosphor substrate having a plurality of light emitting elements mounted on one surface, and includes an insulating substrate, a first electrode group which is disposed on one surface of the insulating substrate and includes a plurality of electrodes bonded to the plurality of light emitting elements, a phosphor layer which is disposed on one surface of the insulating substrate and includes a phosphor in which a light emission peak wavelength, in a case where light emitted by light emitting element is used as excitation light, is in a visible light region, and a second electrode group which is disposed on the other surface of the insulating substrate and includes a plurality of electrodes.

Abstract: A display module and a display device are provided. The display module includes a display panel, and an anti-reflection film disposed on a light-emitting side of the display panel. The anti-reflection film includes a buffer layer and a function layer disposed on a side of the buffer layer away from the display panel, and a refractive index of the buffer layer is greater than a refractive index of the function layer.

Abstract: In some aspects, the techniques described herein relate to an electronic device including: a substrate; a metallization layer, the metallization layer having: a first surface disposed on the substrate; a second surface opposite the first surface; and a corrosion-prevention implant layer disposed in the metallization layer, the corrosion-prevention implant layer extending from the second surface to a depth from the second surface in the metallization layer, the depth being less than a thickness of the metallization layer; and an electrical connector coupled with the second surface.

Abstract: A 3D memory device includes a memory stack having a memory block. The memory block includes a first memory array structure, a staircase structure, a second memory array structure in a first lateral direction, and a plurality of fingers in a second lateral. The staircase structure includes a staircase zone and a bridge structure adjacent to the staircase zone in the second lateral direction. The 3D memory device also includes a source-select-gate (SSG) cut structure extending in a SSG of the memory stack and between adjacent ones of the plurality of fingers of the memory block. The SSG cut structure is between a first finger and a second finger, the first finger includes a string. The staircase zone includes a staircase conductively connected to memory cells in the string in each of the first memory array structure and the second memory array structure through the bridge structure.

Abstract: A display device is manufactured with five photolithography steps: a step of forming a gate electrode, a step of forming a protective layer for reducing damage due to an etching step or the like, a step of forming a source electrode and a drain electrode, a step of forming a contact hole, and a step of forming a pixel electrode. The display device includes a groove portion which is formed in the step of forming the contact hole and separates the semiconductor layer.

Abstract: A display device may include a substrate including a display area and a non-display area, and pixels provided on the display area. Each pixel includes sub-pixels each including an emission area and a non-emission area. Each of the sub-pixels may include a display element layer including at least one light emitting element that emits light. The display element layer may include a first electrode and a second electrode spaced apart from each other with the light emitting element disposed therebetween, connection lines including a first connection line extending in a row direction of the substrate and electrically connected to the first electrode, and a second connection line extending parallel to the first connection line and connected to the second electrode. Two connection lines having a symmetric structure may be disposed in an area between two sub-pixels adjacent to each other in a column direction of the substrate.