Abstract: A semiconductor package includes a first semiconductor device, a second semiconductor device vertically positioned above the first semiconductor device, and a ground shielded transmission path. The ground shielded transmission path couples the first semiconductor device to the second semiconductor device. The ground shielded transmission path includes a first signal path extending longitudinally between a first end and a second end. The first signal path includes a conductive material. A first insulating layer is disposed over the signal path longitudinally between the first end and the second end. The first insulating layer includes an electrically insulating material. A ground shielding layer is disposed over the insulating material longitudinally between the first end and the second end of the signal path. The ground shielding layer includes a conductive material coupled to ground.

Abstract: A bonding member of a display device, a display module, and a method of fabricating a display device to provide a hole in an active area of the display device includes: providing a bonding member which including a bonding layer, a first protective film disposed on the bonding layer and having a light absorbing pattern, and a second protective film disposed under the bonding layer; attaching a display panel to a surface of the bonding layer by peeling off the second protective film; and forming a through hole extending through the bonding layer, the first protective film and the display panel, in an area where the light absorbing pattern is disposed.

Abstract: An interconnection structure, along with methods of forming such, are described. The interconnection structure includes a first portion of a conductive layer, and the conductive layer includes one or more graphene layers. The first portion of the conductive layer includes a first interface portion and a second interface portion opposite the first interface portion, and each of the first and second interface portion includes a metal disposed between adjacent graphene layers. The structure further includes a second portion of the conductive layer disposed adjacent the first portion of the conductive layer, and the second portion of the conductive layer includes a third interface portion and a fourth interface portion opposite the third interface portion. Each of the third and fourth interface portion includes the metal disposed between adjacent graphene layers. The structure further includes a dielectric material disposed between the first and second portions of the conductive layer.

Abstract: Materials and methods for modifying semiconducting substrate surfaces in order to dramatically change surface energy are provided. Preferred materials include perfluorocarbon molecules or polymers with various functional groups. The functional groups (carboxylic acids, hydroxyls, epoxies, aldehydes, and/or thiols) attach materials to the substrate surface by physical adsorption or chemical bonding, while the perfluorocarbon components contribute to low surface energy. Utilization of the disclosed materials and methods allows rapid transformation of surface properties from hydrophilic to hydrophobic (water contact angle 120° and PGMEA contact angle) 70°. Selective liquiphobic modifications of copper over Si/SiOx, TiOx over Si/SiOx, and SiN over SiOx are also demonstrated.

Abstract: A display apparatus manufacturing method includes preparing a substrate, forming, on the substrate, a display preliminary structure including at least one first electrode, arranging, in a processing chamber, the substrate on which the display preliminary structure is formed, and irradiating ultraviolet rays onto the substrate while maintaining a pressure atmosphere in the processing chamber lower than an atmospheric pressure, forming an intermediate layer on the display preliminary structure, the intermediate layer including an emission layer, and forming a second electrode on the intermediate layer.

Abstract: In a variety of processes for forming electronic devices that use spin-on dielectric materials, properties of the spin-on dielectric materials can be enhanced by curing these materials using plasma doping. For example, hardness and Young's modulus can be increased for the cured material. Other properties may be enhanced. The plasma doping to cure the spin-on dielectric materials uses a mechanism that is a combination of plasma ion implant and high energy radiation associated with the species ionized. In addition, physical properties of the spin-on dielectric materials can be modified along a length of the spin-on dielectric materials by selection of an implant energy and dopant dose for the particular dopant used, corresponding to a selection variation with respect to length.

Abstract: A stretchable display panel includes a stretchable substrate, a plurality of display units, and a wiring portion. The stretchable substrate includes island-shaped areas and hinge areas. Each of the hinge area includes a first hinge area and a second hinge area. The wiring portion at least include a first power line and second power lines. A number of the second power lines disposed in the second hinge area is less than a number of the second power lines disposed in the first hinge area.

Abstract: Semiconductor device structures and methods for manufacturing the same are provided. The semiconductor device structure includes a substrate, a first layer and a second layer. The first layer is disposed on and in contact with the substrate. The first layer includes AlX1Ga(1-X1)N, wherein 0.5?X1<1. The second layer is disposed on and in contact with the first layer. The second layer includes Al, Ga and N.

Abstract: Provided is a display panel. The display panel includes a base layer in which a display area where a plurality of pixels are disposed and a non-display area surrounding the display area are defined; a circuit element layer which is disposed on the base layer; an input sensing layer which is disposed on the circuit element layer; and one or more display signal pads and one or more sensing signal pads which are disposed on a sidewall of each of the base layer, the circuit element layer and the input sensing layer, wherein each of the display signal pads is electrically coupled to a display signal line disposed in the circuit element layer, and each of the sensing signal pads is electrically coupled to an input sensing line disposed in the input sensing layer.

Abstract: A flip chip, a surface light source, and a display device using the surface light source are described. The flip chip comprises a metal grid layer having metal wire grid polarizers which are arranged in parallel; a wafer substrate arranged under the metal wire grid polarizer of the metal grid layer; a N-doped layer and a negative-electrode wire, wherein the N-doped layer and the negative-electrode wire are arranged under the wafer substrate; a quantum well layer arranged under the N-doped layer; a P-doped layer arranged under the quantum well layer; an optical activity material layer arranged under the P-doped layer; a reflecting layer arranged under the optical activity material layer; and a positive-electrode wire arranged under the reflecting layer. The present disclosure improves the light-emitting efficiency of the surface light source in large-angle direction and the visual angle range of the surface light source is expanded.

Abstract: A monolithic, three-dimensional (3D) integrated circuit (IC) device includes a sensing layer, a memory layer, and a processing layer. The sensing layer includes a plurality of carbon nanotube field-effect transistors (CNFETs) that are functionalized with at least 50 functional materials to generate data in response to exposure to a gas. The memory layer stores the data generated by the plurality of CNFETs, and the processing layer identifies one or more components of the gas based on the data generated by the plurality of CNFETs.

Abstract: A solid-state imaging unit according to one embodiment of the present disclosure includes two or more pixels. The pixels each include a photoelectric conversion section, a charge holding section, and a transfer transistor. The charge holding section holds a charge transferred from the photoelectric conversion section. The transfer transistor transfers the charge from the photoelectric conversion section to the charge holding section. The pixels each include two or more light-blocking sections disposed in layers between the light receiving surface and the charge holding section and are different from each other. The two or more light-blocking sections are provided at positions at which the two or more light-blocking sections do not block entry, into the photoelectric conversion section, of the light having entered via the light receiving surface and at which the two or more light-blocking sections do not provide a gap when viewed from the light receiving surface.

Abstract: A method and system for label-free detection of pathogenic and antibiotic resistant bacteria is disclosed. The method includes fabricating a G-FET/peptide device having a synthesized peptide probe capable of recognizing and binding to a bacterial target; performing electric-field assisted binding of at least one bacterial cell of the bacterial target to the G-FET/peptide device; and electrically detecting the binding of the at least one bacterial cell to the G-FET/peptide device.

Abstract: Provided are a semiconductor structure and a manufacturing method thereof. The manufacturing method for the semiconductor structure comprises: providing a substrate, wherein the substrate comprises active regions and isolation regions each located between the adjacent active regions, and each of the active regions comprises corner regions adjacent to the isolation regions; performing a doping process to implant doping ions into the corner regions, wherein the doping ions are configured to slow down an oxidation rate of the corner regions; and performing a removing process to remove the oxidized portion of the substrate after the doping process, wherein during the removing process, a side wall of each of the corner regions is exposed from a structure in the isolation region.

Abstract: Discussed herein is gate spacing in integrated circuit (IC) structures, as well as related methods and components. For example, in some embodiments, an IC structure may include: a first gate metal having a longitudinal axis; a second gate metal, wherein the longitudinal axis of the first gate metal is aligned with a longitudinal axis of the second gate metal; a first gate contact above the first gate metal; a second gate contact above the second gate metal; and an unordered region having an unordered lamellar pattern, wherein the unordered region is coplanar with the first gate contact and the second gate contact.

Abstract: The present disclosure provides a display substrate and a manufacturing method thereof, and a display device. The display substrate includes a plurality of pixel regions, each of the pixel regions including a display region provided with a pixel electrode and a driving region provided with a pixel circuit. The pixel circuit includes at least one pixel transistor having a first electrode and a second electrode which are coupled to an active layer of the at least one pixel transistor through connection vias, respectively. The driving region is further provided with a first plate of a storage capacitor, the first plate is insulated from and overlapped with the first electrode and the second electrode of the pixel transistor in a direction perpendicular to the display substrate, and the first plate is provided with openings at positions corresponding to at least some of the connection vias.

Abstract: Provided is a novel chalcogen-containing organic semiconductor compound having excellent carrier mobility. The compound is represented by Formula (1a) or (1b): [Chem. 1] where in Formulas (1a) and (1b), X represents S, O, or Se, and R1 each independently represents a hydrogen atom, a halogen atom, an alkyl group, an aryl group, an aralkyl group, a pyridyl group, a furyl group, a thienyl group, or a thiazolyl group.

Abstract: Methods for selectively depositing on metallic surfaces are disclosed. Some embodiments of the disclosure utilize a hydrocarbon having at least two functional groups selected from alkene, alkyne, ketone, alcohol, ester, or combinations thereof to form a self-assembled monolayer (SAM) on metallic surfaces.

Abstract: A display apparatus including a display module having flexibility, a glass window disposed on the display module, a protective film including an adhesive layer detachably attached on the glass window, and a protecting layer disposed on the adhesive layer, a cover covering an edge of the glass window and configured to receive the display module, and a protective pattern including an edge adhesive layer attached on an edge of an upper surface of the glass window, and an edge protective layer disposed on the edge adhesive layer, in which an adhesion between the glass window and the edge adhesive layer of the protective pattern is greater than an adhesion between the glass window and the adhesive layer of the protective film.

Abstract: An interconnect structure comprises a first dielectric layer, a first metal layer, a second dielectric layer, a metal via, and a second metal layer. The first dielectric layer is over a substrate. The first metal layer is over the first dielectric layer. The first metal layer comprises a first portion and a second portion spaced apart from the first portion. The second dielectric layer is over the first metal layer. The metal via has an upper portion in the second dielectric layer, a middle portion between the first and second portions of the first metal layer, and a lower portion in the first dielectric layer. The second metal layer is over the metal via. From a top view the second metal layer comprises a metal line having longitudinal sides respectively set back from opposite sides of the first portion of the first metal layer.