Patents Examined by Fred W Detschel
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Patent number: 7386675Abstract: Systems and methods using an excitement protocol enable prediction of which blocks of a resource to prefetch and store in memory. The system maintains a set of excitement values corresponding to the resource being accessed. The system also maintains a threshold. As blocks of the resource are requested, the system updates the set of excitement values. The system compares the excitement level to the threshold to determine whether to prefetch the corresponding resource block.Type: GrantFiled: October 21, 2005Date of Patent: June 10, 2008Assignee: Isilon Systems, Inc.Inventor: Neal T. Fachan
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Patent number: 7383384Abstract: A data storage system including an array of storage devices and a storage controller is provided. The array of storage devices is configured to store information in the form of a plurality of stripes. The storage controller is configured to write a plurality of code words forming each stripe to the array of storage devices. The plurality of code words includes a plurality of data blocks and at least one redundancy block. K sets of parameters, which are generated based on a generator polynomial, are previously provided. The storage controller includes an encoder for generating the redundancy blocks according to the K sets of parameters. Once up to K storage devices in the array of storage devices are failed, the data storage system recovers the failed storage devices based on the K sets of parameters and the other un-failed blocks, wherein K can be larger than two.Type: GrantFiled: August 31, 2005Date of Patent: June 3, 2008Assignee: Promise Technology, Inc.Inventors: Hung-Ming Chien, Sy-Yen Kuo
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Patent number: 7370171Abstract: A method for storing a tracing event including encountering a tracing probe, selecting a probe buffer corresponding to the tracing probe, obtaining a buffer within the probe buffer using a thread identifier corresponding to a thread that encountered the tracing probe, and storing the tracing event in the buffer.Type: GrantFiled: April 26, 2004Date of Patent: May 6, 2008Assignee: Sun Microsystems, Inc.Inventor: Prabahar Jeyaram
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Patent number: 7363439Abstract: The control device is a device which can be connected to an external device that transmits data, comprising a computer program which analyzes data received from the abovementioned external device using data format information related to the format of the data, wherein the abovementioned data format information is stored in a separate location from said computer program.Type: GrantFiled: December 7, 2004Date of Patent: April 22, 2008Assignee: Hitachi, Ltd.Inventors: Atsushi Miyagaki, Dai Taninaka
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Patent number: 7360042Abstract: Items that are in use are maintained in a used item store. Items that are no longer in use are placed in an unused items store. When an item that is not currently in use is requested again, an attempt is made to retrieve the item from the unused item store. Retrieving the item from the unused items store can save a tremendous amount of time since the object does not need to be recalculated again when it is requested. Items may be evicted from the unused item store based on the system resources available. When it has been determined that an item(s) should be evicted, an eviction score is calculated for each unused item. Items are then evicted from the unused item store based on their eviction score. Generally items that are larger in size, took less time to calculate, have not been accessed as frequently, and have not been referenced recently, are the first ones to be evicted from unused items store.Type: GrantFiled: December 20, 2004Date of Patent: April 15, 2008Assignee: Microsoft CorporationInventors: Boaz Chen, Liviu Asnash, Shahar Prish, Silvio Susskind
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Patent number: 7356646Abstract: A memory card is connected to a host using a NAND flash memory interface mode. In addition, the memory card further includes the NAND flash memory as well as a controller. The NAND flash memory uses an interface mode different from that supported by the host. The controller converts the interface mode of the host to the interface mode of the NAND flash memory. Thus a memory card can be made compatible with a host using another interface mode.Type: GrantFiled: December 28, 2004Date of Patent: April 8, 2008Assignee: Samsung Electronics Co., Ltd.Inventor: Kyong-Ae Kim
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Patent number: 7315970Abstract: A semiconductor device able to improve data retaining characteristics and decrease power consumption, further able to realize more unrestricted system without increasing excessive circuits, and having the following: an ALPG receiving a start signal and a mode selection signal to generate commands and addresses with respect to a DRAM circuit with the predetermined patterns in accordance with modes, and outputting an ending signal when ending a pattern generating processing in each of modes; an ECC circuit receiving a start signal and a mode selection signal indicating a parity generation mode to generate a parity based on data read from the DRAM circuit, receiving the start signal and a mode selection signal indicating an error correction mode to perform an error correction with respect to data read from the DRAM circuit based on the parity generated in the parity generation mode and outputting data after correcting; and an interface circuit.Type: GrantFiled: March 14, 2005Date of Patent: January 1, 2008Assignee: Sony CorporationInventors: Tomofumi Arakawa, Hiroaki Kodama, Kazutoshi Inoue
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Patent number: 7313656Abstract: A pre-fetch method for a data storage system having disk drives and a cache memory. The method generates a history as pages are from the disk drives for storage in the cache memory, such history indicating whether a page previous to the requested page is already in the cache memory. The history generation is used during subsequent requests to determine, when a page is again requested, the number of pages that are to be read from the disk drive into the cache memory, the number of pages to be read being determined from the generated history.Type: GrantFiled: December 27, 2004Date of Patent: December 25, 2007Assignee: EMC CorporationInventor: David W. Harvey
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Patent number: 7287145Abstract: A system, apparatus, and method are disclosed for increasing the physical memory size accessible to a processor, at least in part, by reclaiming physical address space typically associated with addresses of a restricted linear address space (i.e., addresses that are otherwise unusable by the processor as system memory). In one embodiment, an exemplary memory controller redirects a linear address associated with a range of addresses to access a reclaimed memory hole. The memory controller includes an address translator configured to determine an amount of restricted addresses and to establish a baseline address identified as a first number being a first integer power of 2. The range of addresses can be located at another address identified as a second number being a second integer power of 2. As such, the address translator translates the linear address into a translated address associated with the reclaimed memory hole based on the baseline address.Type: GrantFiled: December 13, 2004Date of Patent: October 23, 2007Assignee: NVIDIA CorporationInventors: Brad W. Simeral, Sean Jeffrey Treichler, David G. Reed, Roman Surgutchik
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Patent number: 7275139Abstract: A method of securely deleting data from a storage medium includes generating a bitmap that corresponds to unused locations on the storage medium; initiating a background process that wipes the unused locations, where the background process runs asynchronously with a user application; wiping the unused locations; and updating the bitmap to reflect that the unused locations have been wiped. The wiping can also replace data at the unused locations with random sequences, with pseudo-random sequences, with data generated by a secure deletion algorithm, with application data from the user application, or with all zeros. The wiping can also include repeated writing of predetermined sequences to the unused locations. The unused locations correspond to blocks, clusters and/or sectors. The wiping can also replace data at unused locations that represent portions of any of blocks, clusters and sectors. The wiping can also include wiping any metadata associated with files previously stored at any of the unused locations.Type: GrantFiled: December 2, 2004Date of Patent: September 25, 2007Inventors: Alexander G. Tormasov, Serguei M. Beloussov, Maxim V. Tsypliaev, Maxim V. Lyadvinsky
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Patent number: 7275138Abstract: The present invention makes it possible to preserve any and all update data relating to the updating of a storage device. The present invention is devised so that if a first storage device (3S) is updated by writing data into this first storage device, the update data relating to the updating of the first storage device is written into a second storage device (3D). The system (100) comprises an acquisition portion (15) that acquires a use rate of the second storage device and a threshold value for this use rate, an updating stopping portion (7) which judges whether or not the acquired use rate exceeds the threshold value, and which stops the updating of the second storage device if the result of this judgment is affirmative, and an updating-stop canceling portion (8) which cancels the stopping if it is detected that the use rate of the second storage device has decreased after the stopping has been performed.Type: GrantFiled: December 13, 2004Date of Patent: September 25, 2007Assignee: Hitachi, Ltd.Inventor: Nobuyuki Saika