Abstract: A light-emitting device (100) includes a substrate (110), a first electrode (120), an auxiliary electrode (124), an insular conductive layer (126), an insulating layer (170), an organic layer (130), and a second electrode (140). The first electrode (120) is formed over the substrate (110), and is formed using a transparent conductive material. The auxiliary electrode (124) is formed over the first electrode (120). The conductive layer (126) is formed over the first electrode (120), and is formed of the same material as that of the auxiliary electrode (124). The insulating layer (170) is formed over a portion of the first electrode (120), and covers the auxiliary electrode (124) and the conductive layer (126). The organic layer (130) is formed over the first electrode (120), and the second electrode (140) is formed over the organic layer (130).

Abstract: A method for manufacturing an electro-optical device according to the present disclosure includes bonding a counter substrate to a substrate, cutting a first portion by irradiation of a laser beam, and removing the first portion, wherein during cutting of the first portion, a first surface and a second surface sandwiching the first portion in plan view are formed by the irradiation of the laser beam, one or both of the first surface and the second surface is inclined with respect to a first plate surface, and a first distance between the first surface and the second surface in the first plate surface is greater than a second distance between the first surface and the second surface in a second plate surface, on the substrate side, of the counter substrate.

Abstract: A display device includes: a first substrate including a first through hole, a display area, and a non-display area, the display area surrounding the first through hole, and the non-display area surrounding at least a portion of the display area; an inorganic insulating layer arranged in the display area; a display element layer including a display element and arranged on the inorganic insulating layer; a second substrate including a second through hole and arranged on the display element layer, the second through hole being connected to the first through hole; and a blocking member arranged along an inner surface of the first through hole and the second through hole, and extending from the first substrate to the second substrate, wherein the inorganic insulating layer extends from the display area to the inner surface of the first through hole.

Abstract: The display panel includes an upper display substrate including a plurality of pixel areas and a light blocking area, a lower display substrate. The upper display substrate includes a base substrate, a barrier part overlapping the light blocking area and disposed on the base substrate, a light blocking layer including a first light blocking portion disposed on the barrier part and a second light blocking portion disposed on the same layer as the barrier part to respectively overlap the pixel areas, a reflection layer including a first reflection portion disposed on the first light blocking portion and a second reflection portion disposed on the second light blocking portion, and a light control layer overlapping the pixel areas and disposed on the reflection layer. A plurality of openings passing through the second light blocking portion and the second reflection portion are defined in each of the pixel areas.

Abstract: An epitaxial silicon wafer includes: a silicon wafer doped with phosphorus as a dopant and having an electrical resistivity of less than 1.0 m ?·cm; and an epitaxial film formed on the silicon wafer. The silicon wafer includes: a main surface to which a (100) plane is inclined; and a [100] axis that is perpendicular to the (100) plane and inclined at an angle ranging from 0°30? to 0°55? in any direction with respect to an axis perpendicular to the main surface. The epitaxial silicon wafer has at most 1/cm2 of a density of a hillock defect generated thereon.

Abstract: Implementations of image sensor packages may include a plurality of microlenses coupled over a color filter array (CFA), a low refractive index layer directly coupled to and over the plurality of microlenses, an adhesive directly coupled to and over the low refractive index layer, and an optically transmissive cover directly coupled to and over the adhesive. Implementations may include no gap present between the optically transmissive cover and the plurality of microlenses.

Abstract: Disclosed are a semiconductor device and a method of manufacturing the same. The semiconductor device comprises a substrate including a cell region and a peripheral region, a magnetic tunnel junction pattern on the cell region, a capping insulation layer covering a sidewall of the magnetic tunnel junction pattern, and an upper insulation layer including a first portion on the capping insulation layer and a second portion on the peripheral region. A level of a bottom surface of the second portion is lower than that of a bottom surface of the capping insulation layer.

Abstract: Disclosed are a backplane substrate that is capable of expressing high gradation even through a small pixel, a method of manufacturing the same, and an organic light-emitting display device using the same. Integration for ultra-high resolution is possible through structural modification.

Abstract: A multi-gate semiconductor device is formed that provides a first fin element extending from a substrate. A gate structure extends over a channel region of the first fin element. The channel region of the first fin element includes a plurality of channel semiconductor layers each surrounded by a portion of the gate structure. A source/drain region of the first fin element is adjacent the gate structure. The source/drain region includes a first semiconductor layer, a dielectric layer over the first semiconductor layer, and a second semiconductor layer over the dielectric layer.

Abstract: A method of manufacturing a semiconductor device. A pre first semiconductor pattern having a crystalline semiconductor material is formed on a base substrate. A pre first insulation layer is formed on the pre first semiconductor pattern. A first semiconductor pattern is formed by defining a channel region in the pre first semiconductor pattern. A pre protection layer is formed on the pre first insulation layer. A pre second semiconductor pattern including an oxide semiconductor material is formed on the pre protection layer. A pre second insulation layer is formed on the pre second semiconductor pattern. The pre second insulation layer is patterned using an etching gas such that at least a portion of the pre second semiconductor pattern is exposed. A second semiconductor pattern is formed by defining a channel region in the pre second semiconductor pattern.

Abstract: Provided is a printed circuit board including a laminate that is formed by vertically stacking a plurality of insulating layers including a rigid insulating layer, a flexible insulating layer having a first region in vertical contact with at least one of the plurality of insulating layers and a second region located on an outer side of the laminate, and a first electronic element embedded in the flexible insulating layer.

Abstract: A bezel-free display comprises a display substrate and an array of pixels. Pixel rows and pixel columns are separated by row and column distances and connected by row and column lines, respectively. A column driver is electrically connected to each of the column lines and a row driver is electrically connected to each of the row lines. Row-connection lines are electrically connected to each of the row lines or row drivers. In certain embodiments, each pixel in the column of pixels closest to a display substrate edge is spatially separated from the edge by a distance less than or equal to the column distance. At least one row driver is spatially separated from the corresponding row by a distance less than the column or row distance, at least one column driver is spatially separated from the corresponding column by a distance less than the column or row distance, or both.

Abstract: An active matrix light emitting display comprising an anode layer comprising a plurality of individual selectively energizable anodes, a cathode layer comprising a plurality of individual selectively energizable cathodes, an emitter layer for emitting light when energized disposed between the anode layer and the cathode layer, and a photoluminescent layer comprising a plurality of various color photoluminescent pixels, wherein a selected anode and a selected cathode are energizable to photoexcite a selected color pixel. A light emitting device comprising, a light emitting photonic crystal having organic electroluminescent emitter material disposed within the photonic crystal, and a photoluminescent material disposed upon a surface of the light emitting photonic crystal, such that light emitted by the light emitting photonic crystal causes photoexcitation within the photoluminescent material.

Abstract: An insulating structure of a high electron mobility transistor (HEMT) is provided, which comprises a gallium nitride layer, an aluminum gallium nitride layer disposed on the gallium nitride layer, a groove disposed in the gallium nitride layer and the aluminum gallium nitride layer, an insulating layer disposed in the groove, wherein a top surface of the insulating layer is aligned with a top surface of the aluminum gallium nitride layer, and a passivation layer, disposed on the aluminum gallium nitride layer and the insulating layer.

Abstract: Disclosed herein is an organic lighting apparatus that can reduce leakage current. The organic lighting apparatus includes a plurality of light-emitting portions, each of which has a first electrode including an electric current injection line, wherein the electric current injection line includes one or more fuse structures. With the electric current injection line including a fuse structure, when a short circuit occurs between first and second electrodes in a specific light-emitting portion, the fuse operates and prevents electric current from being injected into the short-circuited light-emitting portion, thereby making it possible to reduce leakage current.

Abstract: A method of manufacturing a display apparatus includes: forming a plurality of displays including a light-emitting diode on a surface of a first mother substrate; preparing a second mother substrate; forming a first sealed area on a surface of at least one of the first mother substrate or the second mother substrate, wherein the first sealed area surrounds each of the plurality of displays and includes a frit; firstly bonding the first mother substrate to the second mother substrate by melting the frit in the first sealed area by radiating a first laser beam; and secondly bonding the first mother substrate to the second mother substrate by forming a second sealed area in which the frit and the first mother substrate, and/or the frit and the second mother substrate, are melted and mixed with each other by radiating a second laser beam partially in the first sealed area.

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a device region defined by a trench in the substrate. The semiconductor device includes a plurality of fin-shaped active regions spaced apart from each other in the device region and extending in a first direction. The semiconductor device includes a protruding pattern extending along a bottom surface of the trench. Moreover, an interval between the protruding pattern and the plurality of fin-shaped active regions is greater than an interval between two adjacent ones of the plurality of fin-shaped active regions.

Abstract: The present invention concerns a sensitive field effect device (100) comprising a semiconductor channel (110), a source electrode (120) connected to said semiconductor channel (110), a drain electrode (130) connected to said semiconductor channel (110), such that said semiconductor channel (110) is interposed between said source electrode (120) and said drain electrode (130), a gate electrode (140) and a dielectric layer (150) interposed between said gate electrode (140) and said semiconductor channel (110), characterized in that said semiconductor channel (110) is a layer and is made of an amorphous oxide and in that said sensor means (170, 171, 172, 173, 174, 175, 175) are configured to change the voltage between said gate electrode (140) and said source electrode (120) upon a sensing event capable of changing their electrical state. The present invention also concerns a sensor and a method for manufacturing said field effect device (100).

Abstract: A semiconductor device and a semiconductor structure are disclosed. The semiconductor device includes a substrate, a first III-V compound layer, a second III-V compound layer, a source, a drain and a gate stack structure. The first III-V compound layer is disposed on the substrate. The second III-V compound layer is disposed on the first III-V compound layer. The source and the drain are disposed on opposite sidewall boundaries of the second III-V compound layer. The gate stack structure is disposed on the second III-V compound layer. The gate stack structure includes a first gate and a second gate. The first gate is disposed on the second III-V compound layer. The second gate is disposed on and electrically isolated from the first gate. The second gate is electrically coupled to the source.

Abstract: To suppress variation in transistor characteristics due to charging damage to relieve restrictions on design necessary for avoiding the charging damage and improve the degree of freedom in design for increasing semiconductor integration. A semiconductor device includes a vertical electrode formed in a vertical hole extending from an opening portion toward a portion to be connected in a thickness direction of a base, and having a structure in which a barrier metal film and a conductive material are stacked sequentially from a side close to an insulating film exposed to the vertical hole, and a low-resistance film provided to lie between the barrier metal film and the insulating film except a vicinity of the portion to be connected, and having a lower resistance value than a resistance value of the insulating film.