Patents Examined by Gary Portka
  • Patent number: 9977613
    Abstract: In accordance with embodiments of the present disclosure, a disk drive system may include a RAID subsystem comprising a pool of storage and a disk manager having at least one disk storage system controller. The at least one disk system controller may be configured to create a plurality of zones in the pool of storage, each zone comprising a plurality of stripes, each of the plurality of stripes striped across all of the physical disks within a logical disk comprising the zone, and manage pages of write input/output operations in order to group pages of write input/output operations together within the plurality of stripes of a zone.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: May 22, 2018
    Assignee: Dell Products L.P.
    Inventors: Anthony Floeder, Michael J. Klemm
  • Patent number: 9971680
    Abstract: A semiconductor device including a register controller and a processor which includes a register is provided. The register includes a first circuit and a second circuit which includes a plurality of memory portions. The first circuit and the plurality of memory portions can store data by an arithmetic process of the processor. Which of the plurality of memory portions the data is stored in depends on a routine by which the data is processed. The register controller switches the routine in response to an interrupt signal. The register controller can make any one of the plurality of memory portions which corresponds to the routine store the data in the first circuit every time the routine is switched. The register controller can make data stored in any one of the plurality of memory portions which corresponds to the routine be stored in the first circuit every time the routine is switched.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: May 15, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Wataru Uesugi, Tomoaki Atsumi, Naoaki Tsutsui, Hikaru Tamura, Takahiko Ishizu, Takuro Ohmaru
  • Patent number: 9959054
    Abstract: A technique is directed to cleaning a log structure. The technique involves identifying extents (e.g., a contiguous segment of 8 MB) to reclaim from a first storage tier of a set of storage tiers containing the log structure. The technique further involves performing a tier selection operation to select a target storage tier from the set of storage tiers based on a utilization measure of the log structure. The technique further involves, after identifying the extents to reclaim and performing the tier selection operation, storing data from the identified extents into a new extent of the target storage tier and freeing the identified extents. Such a technique combines log cleaning and tiering into a single operation thus placing less stress on storage devices (e.g., less wear on flash memory, etc.), consuming fewer system resources, and providing better performance.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: May 1, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Vamsi Vankamamidi, Richard P. Ruef, Steven Morley, Ryan Gadsby
  • Patent number: 9940025
    Abstract: A digital Storage Element is described. A device is configured including a Storage Element for access by a user responsive to a native control code. A processing arrangement executes a control program for controlling the overall device and executing at least a portion of the native control code as part of the control program for interfacing with the Storage Element. A programming arrangement is provided separate from the device for customizing a read channel within the Storage Element. Command, user interaction and data transfer execution are discussed for mitigation of potential mechanical shock effects. Status indications relating to the Storage Element are provided including head position and mechanical shock. Calibration, test and operational monitoring procedures, for using head position status, are described. Failure configuration monitoring is provided in tracking overall performance and design considerations.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: April 10, 2018
    Assignee: Benhov GmbH, LLC
    Inventors: Curtis H. Bruner, John F. Fletcher, Frida E. R. Fletcher
  • Patent number: 9940260
    Abstract: A memory controller system optimally controls access to a memory device having a plurality of integrated circuit (IC) chips disposed in a non-uniform stack configuration within a three-dimensional stacked (3DS) structure. A memory profiling portion executes to determine the non-uniform stack configuration. A virtual rank mapping portion configured to assign virtual ranks to chip locations actually defined by the non-uniform stack configuration. An address conversion portion executes to convert an unoptimized address definable with reference to a uniform stack configuration to an optimized address defined with reference to the non-uniform stack configuration. The addressing overhead during monitoring of data access operations to the memory device is optimized.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: April 10, 2018
    Assignee: Cadence Design Systems, Inc.
    Inventors: Anne Hughes, Bikram Banerjee
  • Patent number: 9933957
    Abstract: A technique for migrating data of a virtual machine running on a server from a first storage array to a second storage array includes configuring a virtualization appliance to mirror data between the first storage array and the second storage array and redirecting IO (Input/Output) requests, which were previously directed to the first storage array, instead to the virtualization appliance. The virtualization appliance performs data mirroring to bring the data in the second storage array into synchronization with the data in the first storage array, such that migration of the data from the first storage array to the second storage array is achieved.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: April 3, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Saar Cohen, Assaf Natanzon, David L. Black, Erin Bournival
  • Patent number: 9927992
    Abstract: Various examples are directed to systems and methods for database migration. A data migration system may access schema data describing data stored at a database. The data migration system may identify a first segment of the first plurality of records having a first value for a first segmenting parameter and a second segment of the first plurality of records having a second value for the first segmenting parameter. The data migration system may begin to migrate the first segment of the first plurality of records. After the first segment of the first plurality of records is migrated, the data migration system may begin to migrate the second segment of the first plurality of records.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: March 27, 2018
    Assignee: SAP SE
    Inventors: Volker Driesen, Peter Eberlein
  • Patent number: 9891854
    Abstract: A method for managing main memory including DRAM and NVRAM in a computer depending on the operation state of the computer is provided. The method includes: (a) upon start of the computer, loading a program and the like into the DRAM, and loading predetermined read-only data and the like into the NVRAM; (b) in a state transition from a normal operation to a suspend state, moving data in the DRAM to the NVRAM; (c) in a state transition from the suspend state to the normal operation, reading data from the NVRAM for program execution; (d) in the case where a data write to the NVRAM occurs, stopping the data write, and moving data in a data area of the NVRAM subjected to the data write, to the DRAM; and (e) performing the data write to the DRAM to which the data has been moved.
    Type: Grant
    Filed: November 11, 2016
    Date of Patent: February 13, 2018
    Assignee: International Business Machines Corporation
    Inventors: Seiji Munetoh, Nobuyuki Ohba
  • Patent number: 9886200
    Abstract: An endurance parameter value of a non-volatile memory included in a non-volatile dual in-line memory module (NVDIMM) can be monitored and compared against a warning threshold value. In response to the endurance parameter exceeding the warning threshold value, a system alert can be generated, within a host system of the NVDIMM, to inform a system user that the NVDIMM is approaching its end-of-life. If the endurance parameter exceeds a replacement threshold value greater than the warning threshold value, an upgrade process can be initiated. The upgrade process can include copying data from the first non-volatile memory to a volatile memory of the NVDIMM and copying, in response to the first non-volatile memory being replaced with a second non-volatile memory, the data from the volatile memory to the second non-volatile memory.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: February 6, 2018
    Assignee: International Business Machines Corporation
    Inventors: Diyanesh B. Chinnakkonda Vidyapoornachary, Kyu-hyoun Kim, Saravanan Sethuraman, Gary A. Tressler
  • Patent number: 9880774
    Abstract: A method, non-transitory computer readable medium and storage node computing device that reserves one of a plurality of data storage devices that is designated as a coordinator data storage device. A section of the storage cluster that is unowned is identified. Ownership of a subset of the data storage devices that is in the section of the storage cluster is obtained. A determination is made when the subset of the data storage devices includes the coordinator data storage device. The reservation of the coordinator data storage device is released, when the determining indicates that the subset of the data storage devices does not include the coordinator data storage device.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: January 30, 2018
    Assignee: NetApp, Inc.
    Inventors: Sasidharan Krishnan, Kalaivani Arumugham
  • Patent number: 9880769
    Abstract: Large amounts of memory can be consumed in streaming joins because events from one stream are held in memory while waiting for matching events from a second stream. Memory needs can be reduced by analyzing the join condition to determine the bounds on the time discrepancy between events in the two streams. When it is determined that an event from one stream must occur prior to the matching event from the other stream, the later-arriving stream data can be ingested with an intentional delay. When it is determined that regardless of input received from a first stream, no output will be produced when there is no input from the second stream, pulling data from the first stream can cease. A multi-stage join plan can be employed so that a less busy stream can be scanned with increasing amounts of intentional delay. Only unmatched data is stored.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: January 30, 2018
    Assignee: MICROSOFT TECHNOLOGY LICENSING, LLC.
    Inventors: Zhong Chen, Lev Novik, Boris Shulman, Clemens A. Szyperski
  • Patent number: 9880762
    Abstract: A technique manages file system metadata and is performed in a data storage system that maintains a file system on behalf of a set of host computers. The technique involves modifying a first metadata block of the file system in response to a file system change, the first metadata block containing file system metadata. The technique further involves performing a compression operation to generate a compressed metadata block in volatile storage from the first metadata block, the compressed metadata block having a size that is smaller than a size of the first metadata block. The technique further involves writing the compressed metadata block from the volatile storage (volatile cache memory) to non-volatile storage (e.g., flash memory).
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: January 30, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Philippe Armangau, Christopher A. Seibel
  • Patent number: 9875036
    Abstract: An endurance parameter value of a non-volatile memory included in a non-volatile dual in-line memory module (NVDIMM) can be monitored and compared against a warning threshold value. In response to the endurance parameter exceeding the warning threshold value, a system alert can be generated, within a host system of the NVDIMM, to inform a system user that the NVDIMM is approaching its end-of-life. If the endurance parameter exceeds a replacement threshold value greater than the warning threshold value, an upgrade process can be initiated. The upgrade process can include copying data from the first non-volatile memory to a volatile memory of the NVDIMM and copying, in response to the first non-volatile memory being replaced with a second non-volatile memory, the data from the volatile memory to the second non-volatile memory.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: January 23, 2018
    Assignee: International Business Machines Corporation
    Inventors: Diyanesh B. Chinnakkonda Vidyapoornachary, Kyu-hyoun Kim, Saravanan Sethuraman, Gary A. Tressler
  • Patent number: 9846650
    Abstract: A Solid State Drive (SSD) is disclosed. The SSD can include a host interface logic, a data input buffer, a data output buffer, and a buffer manager to manage the data input buffer and data output buffer. A re-order logic can advise the buffer manager about which data should be returned to the host computer from the data output buffer.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: December 19, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mu-Tien Chang, Dimin Niu, Hongzhong Zheng
  • Patent number: 9846653
    Abstract: Write operations on main memory comprise predicting a last write in a dirty cache line. The predicted last write indicates a predicted pattern of the dirty cache line before the dirty cache line is evicted from a cache memory. Further, the predicted pattern is compared with a pattern of original data bits stored in the main memory for identifying changes to be made in the original data bits. Based on the comparison, an optimization operation to be performed on the original data bits is determined. The optimization operation modifies the original data bits based on the predicted pattern of a last write cache line before the last write cache line is evicted from the cache memory.
    Type: Grant
    Filed: February 21, 2014
    Date of Patent: December 19, 2017
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Jichuan Chang, Doe Hyun Yoon, Robert Schreiber
  • Patent number: 9846544
    Abstract: A method is used in managing storage space in storage systems. A request is received to write data to a logical storage object. A determination is made as to whether the data can be written to the logical storage object in a compressed format. Based on the determination, the request is processed based on a storage insurance value and a storage liability value associated with the logical storage object. The storage insurance value and storage liability value is determined based on the number of uncompressed blocks included in the logical storage object.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: December 19, 2017
    Assignee: EMC IP Holding Company LLC
    Inventor: Ivan Bassov
  • Patent number: 9841917
    Abstract: Systems and methods are disclosed for configuring a non-volatile memory (“NVM”). In some embodiments, each block of the NVM can include a block table-of-contents (“TOC”), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: December 12, 2017
    Assignee: APPLE INC.
    Inventors: Vadim Khmelnitsky, Daniel J. Post, Nir Jacob Wakrat, Matthew J. Byom, Kenneth L. Herman, Alexander C. Sanks
  • Patent number: 9836223
    Abstract: A method, a computing device, and a non-transitory machine-readable medium for changing ownership of a storage volume from a first controller to a second controller without flushing data, is provided. In the system, the first controller is associated with a first DRAM cache comprising a primary partition that stores data associated with the first controller and a mirror partition that stores data associated with the second controller. The second controller in the system is associated with a second DRAM cache comprising a primary partition that stores data associated with the second controller and the mirror partition associated with the first controller. Further, the mirror partition in the second DRAM cache stores a copy of a data in the primary partition of the first DRAM cache and the mirror partition in the first DRAM cache stores a copy of a data in the primary partition of the second DRAM cache.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: December 5, 2017
    Assignee: NetApp, Inc.
    Inventors: Brian D. McKean, Donald R. Humlicek
  • Patent number: 9830107
    Abstract: A system and method for optimizing the estimation and management of wear and replacement for an array of storage devices in a storage system is disclosed. An input/output workload is monitored over part of a service period for the array. An expected wear rate is determined, based on the workload and an endurance of the storage devices. A target wear rate is calculated for the service period and each of one or more contingency periods, based on the expected wear rate and a specified risk tolerance for each period. In response to determining that the expected wear rate exceeds the target wear rate calculated for at least one of the service period and the contingency period(s), an adjusted wear rate is calculated for the array of storage devices to match the target wear rate. A replacement schedule is generated for the array based on the adjusted wear rate.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: November 28, 2017
    Assignee: NetApp, Inc.
    Inventor: Joseph Blount
  • Patent number: 9824009
    Abstract: Systems and methods for coherency maintenance are presented. The systems and methods include utilization of multiple information state tracking approaches or protocols at different memory or storage levels. In one embodiment, a first coherency maintenance approach (e.g., similar to a MESI protocol, etc.) can be implemented at one storage level while a second coherency maintenance approach (e.g., similar to a MOESI protocol, etc.) can be implemented at another storage level. Information at a particular storage level or tier can be tracked by a set of local state indications and a set of essence state indications. The essence state indication can be tracked “externally” from a storage layer or tier directory (e.g., in a directory of another cache level, in a hub between cache levels, etc.). One storage level can control operations based upon the local state indications and another storage level can control operations based in least in part upon an essence state indication.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: November 21, 2017
    Assignee: NVIDIA CORPORATION
    Inventors: Anurag Chaudhary, Guillermo Juan Rozas