Patents Examined by Giovanni Astacio-Oquendo
  • Patent number: 11520240
    Abstract: A method of aligning a wafer for semiconductor fabrication processes may include applying a magnetic field to a wafer, detecting one or more residual magnetic fields from one or more alignment markers within the wafer, responsive to the detected one or more residual magnetic fields, determining locations of the one or more alignment markers. The marker locations may be determined relative to an ideal grid, followed by determining a geometrical transformation model for aligning the wafer, and aligning the wafer responsive to the geometrical transformation model. Related methods and systems are also disclosed.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: December 6, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Nikolay A. Mirin, Robert Dembi, Richard T. Housley, Xiaosong Zhang, Jonathan D. Harms, Stephen J. Kramer
  • Patent number: 11517266
    Abstract: A detection apparatus is for detecting interference on signal paths in a differential voltage measuring system with a signal measuring circuit for measuring bioelectric signals with a number of useful signal paths having at least one shield. In an embodiment, the detection apparatus includes at least one analysis unit, connected to the shield and embodied to detect interference in a useful signal path of the voltage measuring system via a signal measured at the shield in the case of interference.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: December 6, 2022
    Assignee: SIEMENS HEALTHCARE GMBH
    Inventor: Ulrich Batzer
  • Patent number: 11513165
    Abstract: A power semiconductor module including at least first and second power semiconductor elements, includes a first terminal, a first gate terminal, a second terminal, a second gate terminal, a third terminal and a common terminal. The first terminal connected to a first electrode of the first power semiconductor element. The first gate terminal connected to a gate of the first power semiconductor element. The second terminal connected to a first electrode of the second power semiconductor element. The second gate terminal connected to a gate of the second power semiconductor element. The third terminal connected to a second electrode of the first power semiconductor element and a second electrode of the second power semiconductor element. The common terminal that is connected to the first gate terminal through a first resistor and is connected to the second gate terminal through a second resistor.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: November 29, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Tadahiko Sato
  • Patent number: 11515852
    Abstract: Measurement of signal power for variable or time varying signals. A log-linear VGA coupled in a feedback configuration to a difference detector and an integrator, includes a set of amplifier cells selectable by a sliding current generator, producing a sum of outputs. Outputs of the sliding current generator include a first control current provided using a sum of amplified currents, a sequence of intermediate control currents, and a final control current provided using a sum of amplified currents. Control currents to be summed can be differentially amplified or attenuated; attenuators include capacitors to compensate for capacitive loading. Selectable amplifier cells are differentially amplified or attenuated. Isolating switches and canceling stages reduce the effects of leakage between adjacent amplifier cells. The sliding current generator can have boosted current to first and last amplifier cells, providing a more linear-in-dB gain near a relative maximum or minimum.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: November 29, 2022
    Assignee: BeRex Inc.
    Inventor: Behbahani Farbod
  • Patent number: 11506730
    Abstract: A magnetic field measurement system includes a wearable device having a plurality of wearable sensor units. Each wearable sensor unit includes a plurality of magnetometers and a magnetic field generator configured to generate a compensation magnetic field configured to actively shield the plurality magnetometers from ambient background magnetic fields. A strength of a fringe magnetic field generated by the magnetic field generator of each of the wearable sensor units is less than a predetermined value at the plurality of magnetometers of each wearable sensor unit included in the plurality of wearable sensor units.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: November 22, 2022
    Assignee: HI LLC
    Inventors: Jamu Alford, Michael Henninger, Stephen Garber, Jeffery Kang Gormley, Dakota Blue Decker, Scott Michael Homan, Teague Lasser, Micah Ledbetter, Jerry Leung, Hooman Mohseni, Ethan Pratt, Scott Jeremy Seidman, Benjamin Siepser
  • Patent number: 11500005
    Abstract: Methods, systems, and apparatus, including computer programs stored on a computer-readable storage medium, for obtaining a reference phase signal that is synchronized with an alternating current (AC) phase of a multi-phase electrical power distribution system. The apparatus obtains output signals from sensors, each output signal representative of an electromagnetic emission detected by a respective sensor. The apparatus identifies, based on comparing respective phases of the output signals to the reference phase signal, a particular AC phase of the multi-phase electrical power distribution system associated with a source of the emissions. The apparatus provides an indication of the particular AC phase to a user.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: November 15, 2022
    Assignee: X Development LLC
    Inventors: Leo Francis Casey, Siyuan Xin, Peter Evans, Shuyu Wang, Raymond Daly, C. O. Lee Boyce, Jr., Joel Fraser Atwater
  • Patent number: 11500032
    Abstract: An electric measuring assembly and a method for continuously monitoring a protective-conductor resistance of a protective-conductor connection in a power supply system having a supply station, a supply line, and an electric installation, grounded via the connection. A signal generator generates a signal alternating voltage having a measuring frequency; a first transformer encircles the connection and a first winding inductively couples the voltage into the connection so a loop current flows via first and second leakage capacitors, the active conductors, and the connection, and a second winding for the second measurement of a protective-conductor voltage; a second transformer encircles the connection and has a secondary winding capturing a protective-conductor current flowing in the connection; an evaluation unit determines a loop impedance from the protective-conductor voltage and the protective-conductor current for evaluating the real part of the loop impedance.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: November 15, 2022
    Assignee: Bender GmbH & Co. KG
    Inventors: Eckhard Broeckmann, Dieter Hackl
  • Patent number: 11500010
    Abstract: An integrated circuit with a switched signal path and circuitry configured to determine an anticipated specification current through the signal path.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: November 15, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: William Shane Rowling, Paul R. Clark
  • Patent number: 11493364
    Abstract: A sensor system for determining at least one rotation characteristic of an element rotating around at least one rotation axis. The sensor system includes at least one sensor wheel, which is connectable to the rotating element, the sensor wheel having a sensor wheel profile. The sensor system also includes at least one position sensor and at least one phase sensor. The sensor system further includes at least one digital interface and at least one incremental interface, the sensor system being configured to output at least one absolute position signal generated with the aid of the position sensor via the digital interface and to output at least one incremental signal generated with the aid of the phase sensor via the incremental interface.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: November 8, 2022
    Assignee: Robert Bosch GmbH
    Inventors: Andre Yashan, Bernhard Opitz, Eduard Rolew, Fabian Utermoehlen
  • Patent number: 11486937
    Abstract: The invention relates to an electric circuit arrangement (20) for the functional testing of a monitoring device (4) for a power supply system (2), the electric circuit arrangement (20) having a test resistance (Rf1, Rf2) which is switched between an active conductor (L1, L2) of the power supply system (2) and ground (PE) and has a settable actual resistance value (Rx). In this context, a bidirectional cascade (12) consisting of field-effect transistors as test resistances (Rf1, Rf2) and an analog control (10) for the continuous-value setting of the actual resistance value (Rx) to a predefined target resistance value (R0) are provided.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: November 1, 2022
    Assignee: BENDER GMBH & CO. KG
    Inventors: Julian Reitz, Karl Schepp
  • Patent number: 11488876
    Abstract: An electronic component measuring equipment includes a first mounting platform, a second mounting platform, an actuating device, a current output module, a switching device and an optical measuring component. Multiple probe pairs are disposed on a probe substrate mounted on the first mounting platform. Multiple under-test electronic components are disposed on a testing substrate mounted on the second mounting platform. The actuating device is configured to make at least partial of the probe pairs on the probe substrate in contact with at least partial of under-test electronic components. The current output module provides a constant current to the probe substrate, and conducting loops are formed between the probe pairs and the under-test electronic components in contact therewith. The switching device switches the constant current to each probe pairs. The optical measuring component measures light signals generated by the under-test electronic components.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: November 1, 2022
    Assignee: ASTI GLOBAL INC., TAIWAN
    Inventor: Ying-Chieh Chen
  • Patent number: 11482850
    Abstract: A method for detecting arc faults when charging electric battery systems or lead acid batteries, which are electrically connected in series to form a string which is supplied via a DC voltage converter. A first value corresponding to an electric voltage applied to the string and a second value corresponding to an electric current flowing through the string are generated. As a first condition, it is checked whether the first value changes by more than a first limit value within a first time window. As the second condition, it is checked whether the second value changes by more than a second limit value within a second time window. An arc is detected if the first condition and the second condition are met within a third time window. Provided also is a method for manufacturing electric battery systems, in particular lead acid batteries, as well as to a cut-off device.
    Type: Grant
    Filed: January 31, 2020
    Date of Patent: October 25, 2022
    Assignee: Ellenberger & Poensgen GmbH
    Inventors: Markus Miklis, Thomas Regahl, Christian Strobl
  • Patent number: 11477975
    Abstract: A sensor unit may include a sensor, a housing, at least one microprocessor, a non-volatile memory, a transceiver, a clock, and a connector. The sensor may be configured to measure a change in fringe capacitance and may be tuned to at least one of detect and identify a given animal. The housing may include a power source. The connector may operatively connect the sensor to the housing. The at least one microprocessor may be programmed to continuously recalibrate a baseline capacitance.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: October 25, 2022
    Inventors: Mathew V. Kaye, Mark Jacques
  • Patent number: 11474134
    Abstract: A gateless P-N junction metrolog includes: a junction member including: a p-interface; and an n-interface disposed laterally and adjacent to the p-interface; and a p-n junction disposed at where the p-interface and n-interface contact; a drain electrode disposed on the junction member; a source electrode disposed on the junction member such that the source electrode is spaced apart from and opposing the drain electrode; an n-polymer disposed on the n-interface of the junction member; a p-polymer disposed on the p-interface of the junction member such that the n-polymer is interposed between the p-polymer and the n-interface; a mediation polymer disposed on the p-polymer such that the p-polymer is interposed between the mediation polymer and the junction member; and a mediator disposed in the mediation polymer and that receives electrons from the junction member in forming the p-interface.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: October 18, 2022
    Assignee: GOVERNMENT OF THE UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF COMMERCE
    Inventor: Albert Felix Rigosi
  • Patent number: 11474148
    Abstract: An automatic detection circuit for an integrated circuit and an automatic detection method for the same are provided. The automatic detection circuit is suitable for a system-on-chip (SoC). A control unit of the automatic detection circuit enters an automatic detection mode to: switch a first dynamic switching circuit to connect a main bus to a virtual host circuit; switch a second dynamic switching circuit to connect memory interfaces and intellectual property circuit to a virtual input and output circuit; send detection vectors to the virtual host circuit to set and activate the memory interfaces and the intellectual property circuits; send the detection vectors to the virtual I/O circuit to replace external memory and external equipment for sending and receiving signals; and compare signals received by the virtual host circuit or signals received by the virtual input and output circuit with predetermined signal data to generate a detection result.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: October 18, 2022
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Chung-Chang Lin
  • Patent number: 11462445
    Abstract: A semiconductor module including a semiconductor element which is bonded to a wiring pattern part and connects or disconnects two main electrode terminals to or from each other according to a drive signal applied to a gate electrode terminal, includes a deterioration detecting circuit configured to use one main electrode terminal of the two main electrode terminals of the semiconductor element with an applied DC voltage, as a reference potential, and detect deterioration of a joining part of the semiconductor element on the basis of a gate voltage which is the voltage between the one main electrode terminal and the gate electrode terminal and an inter-main-electrode voltage which is the voltage between the one main electrode terminal and the other main electrode terminal, and outputs an alarm signal.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: October 4, 2022
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventor: Eiji Kurosawa
  • Patent number: 11460493
    Abstract: An electric energy meter includes a plurality of first terminals for receiving a measure of current of each of one or more phases of power and a plurality of second terminals for receiving a measure of voltage of each of one or more phases of power. A controller is configured to analyze the measure of current and the measure of voltage of each of the one or more phases of power in order to detect power quality issues in one or more of the one or more phases of power. For each of the detected power quality issues, the controller is configured to determine whether the detected power quality issue is caused by a utility generating the power or a consumer consuming the power and to communicate a message indicating the detected power quality issues via a communications port operably coupled to the controller.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: October 4, 2022
    Assignee: HONEYWELL INTERNATIONAL INC.
    Inventors: Ramachandra Rao Routu, Anil Madhav Bhide, Siva Sagar Kuricheti, Krishna Mohan, Shalu Singhvi
  • Patent number: 11454654
    Abstract: The invention relates to a method for evaluating the state and the quality of low-voltage networks, in the branched system of which there is a plurality of connected loads, by determining network measurement data by means of power quality measuring and testing devices and transferring the network measurement data, by means of a standard interface, to a control system or in retrievable form to a server. According to the invention, the overvoltage protection devices, which are or can be used in the low-voltage system and have a self-diagnosis unit and an existing wireless or wired standard interface for data transfer, are able to determine network measurement data by means of integrated or adapted power quality measuring and testing devices.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: September 27, 2022
    Assignee: DEHN SE
    Inventors: Jens Ehrler, Peter Zahlmann, Ralph Brocke
  • Patent number: 11454658
    Abstract: A load estimating device measures a voltage and a current supplied to a load connected with a generator, calculates a feature amount of the load, senses a remaining amount of fuel, outputs a time during which the load is continuously operable. The device estimates what the load connected with the generator is, based on the calculated feature amount and the feature amounts stored in a storage, and determines the time during which the estimated load is continuously operable, based on a power consumption of the estimated load, and the remaining amount of fuel. The device has a load registration mode for causing the storage to store therein a feature amount of a new load that is not stored in a storage.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: September 27, 2022
    Assignee: HONDA MOTOR CO., LTD.
    Inventors: Ryo Oshima, Nobuyuki Sasaki, Mitsuhiro Ito, Mio Oshima, Yoshihiro Matsunaga, Sho Takada
  • Patent number: 11448690
    Abstract: A testing method and apparatus is disclosed for testing an integrated circuit device (100) which has a dedicated ground bias pad (121) connected across a high voltage electrostatic discharge clamp circuit (123) to a well-driving ground pad (122) by applying a first voltage to the dedicated ground bias pad to bias a wafer substrate (101) while simultaneously applying a second voltage to the well-driving ground pad to bias the well region (103), where the first and second voltage create a stressing voltage across a buried insulator layer (102, 105) in the integrated circuit device so that a screening test can be conducted to screen for a defect (106) in the buried insulator layer by measuring a leakage current.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: September 20, 2022
    Assignee: NXP USA, INC.
    Inventors: Laurent Segarra, Maarten Jacobus Swanenberg, Pierre Turpin, Matthew Bacchi, Russell Schaller, Keith Jackoski, Ronghua Zhu