Patents Examined by Giovanni Astacio-Oquendo
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Patent number: 11815545Abstract: Gain independent reference channel measurement system and method. A method of making robust, stable measurements, in a variety of different applications is disclosed. More specifically, this disclosure describes systems and methods relating to performing gain independent reference channel measurements by making two phase measurements of a device under test. Mathematically, the measurements are combined and many common mode parameters drop out. The result yields an analysis of a device under test analysis which mitigated errors, predominately arising from environmental variations and changes in circuit behavior stemming from swings in signal input.Type: GrantFiled: February 12, 2021Date of Patent: November 14, 2023Assignee: ANALOG DEVICES, INC.Inventor: Shrenik Deliwala
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Patent number: 11808809Abstract: An electrical circuit for testing primary internal signals of an ASIC. Only test pin is provided via which a selection can be made of a digital or analog signal to be observed. The electrical circuit includes a Schmitt trigger between the test pin and an output terminal of the electrical circuit. A test mode id activated when a switching threshold of the Schmitt trigger is exceeded. At least one sub-circuit is provided for the observation of a digital signal, having a resistor, an NMOS transistor, and an AND gate, at whose first input the digital signal is present. The resistor is between the test pin and the drain terminal of the NMOS transistor. The source terminal is connected to ground, and the gate terminal is connected to the output of the AND gate. The second input of the AND gate being connected to the output terminal of the electrical circuit.Type: GrantFiled: November 23, 2018Date of Patent: November 7, 2023Assignee: ROBERT BOSCH GMBHInventor: Carsten Hermann
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Patent number: 11808820Abstract: A system includes a first connection configured to allow current flow between a first node and a second node through a first transistor when it is enabled, and a first diode configured to allow current flow between the first node and the second node when the first transistor is disabled. A second connection is configured to allow current flow between the first node and the second node through a second transistor when it is enabled, and a second diode configured to allow current flow between the first node and the second node when the second transistor is disabled. A fault detection circuit is configured to test the first connection by detection of current flow on the second connection with the second transistor disabled, and is configured to test the second connection by detection of current flow on the first connection with the first transistor disabled.Type: GrantFiled: August 2, 2022Date of Patent: November 7, 2023Assignee: APPLE INC.Inventors: Stephen C. Sherbrook, Alvin K. Ng, Anthony Da Costa
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Patent number: 11810802Abstract: Systems and methods for substrate support in a millisecond anneal system are provided. In one example implementation, a millisecond anneal system includes a processing chamber having a wafer support plate. A plurality of support pins can extend from the wafer support plate. The support pins can be configured to support a substrate. At least one of the support pins can have a spherical surface profile to accommodate a varying angle of a substrate surface normal at the point of contact with the substrate. Other example aspects of the present disclosure are directed to methods for estimating, for instance, local contact stress at the point of contact with the support pin.Type: GrantFiled: July 27, 2020Date of Patent: November 7, 2023Assignees: BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY CO., LTD., MATTISON TECHNOLOGY, INCInventor: Joseph Cibere
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Patent number: 11808794Abstract: The disclosure relates to a method and related device for approximately determining voltages at a high-voltage side of a transformer on the basis of measured voltages at a low-voltage side of the transformer.Type: GrantFiled: September 7, 2021Date of Patent: November 7, 2023Assignee: SMA Solar Technology AGInventors: Vitali Sakschewski, Thorsten Buelo, Florian Rauscher
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Patent number: 11808805Abstract: One embodiment of the present invention sets forth an integrated circuit. The integrated circuit includes a plurality of subunits associated with a plurality of operating voltages. The integrated circuit also includes one or more voltage regulator circuits that convert a first input voltage into a first plurality of output voltages during a first test, wherein the plurality of output voltages is delivered to the plurality of subunits via a plurality of output channels.Type: GrantFiled: July 27, 2022Date of Patent: November 7, 2023Assignee: NVIDIA CorporationInventors: Francisco Da Silva, Li-Wei Ko, Shang-Ju Lee, Shyh-Horng Lin
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Patent number: 11808821Abstract: A method of detecting a serial arc fault in a DC-power circuit includes injecting an RF-signal with a narrow band-width into the DC-power circuit and measuring a response signal related to the injected RF-signal in the DC-power circuit. The method further includes determining a time derivative of the response signal, analyzing the time derivative, and signaling an occurrence of a serial arc fault in the power circuit based on the results of the analysis. A system for detecting an arc fault is configured to perform a method as described before.Type: GrantFiled: November 18, 2022Date of Patent: November 7, 2023Assignee: SMA Solar Technology AGInventors: Marcel Kratochvil, Raimund Thiel, Rainer Schmitt
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Patent number: 11804413Abstract: A semiconductor stack, including a carrier and a semiconductor device arranged above the carrier; non-releasable interconnections electrically and mechanically connecting the semiconductor device and the carrier; a first contact on at least one of the carrier or the semiconductor device: a second contact on at least one of the carrier or the semiconductor device; an electrical connection structure electrically conductively coupling the first contact and the second contact with each other via at least one non-releasable interconnection of the non-releasable interconnections; and wherein the electrical connection structure comprises a plurality of test diode circuits integrated in at least one of the carrier and the semiconductor device, wherein each of the test diode circuits comprises one or more diodes.Type: GrantFiled: August 29, 2022Date of Patent: October 31, 2023Assignee: Intel CorporationInventors: Chad Roberts, George J. Morales, Oscar Mendoza, Kartik Ramanujachar, Michael S. Chun, Anthony Zisko
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Patent number: 11804156Abstract: A first substrate of an electro-optical device is provided with a temperature detection circuit including a temperature detection element, and a first wiring line and a second wiring line of the temperature detection element are electrically connected to a first terminal and a second terminal, respectively. Between the first terminal and the second terminal, a third terminal that is not electrically connected to the temperature detection element is provided. Thus, through detection of a current at the time of applying a ground potential from a first probe and a second probe of an inspection device to the first terminal and the second terminal and applying a predetermined voltage from a third probe to the third terminal, insulation between the first terminal and the second terminal can be inspected.Type: GrantFiled: September 7, 2022Date of Patent: October 31, 2023Assignee: SEIKO EPSON CORPORATIONInventor: Shinsuke Fujikawa
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Patent number: 11796557Abstract: A magnetic sensor includes a plurality of pairs of sensor elements, with each pair of sensor elements including two sensor elements that are oppositely disposed on a circumference of a circle arranged in a sensor plane of the magnetic sensor; and a sensor circuit configured to generate a first pulsed output signal based on a selected differential measurement signal that is indicative of a rotational speed of an object. The sensor circuit is configured to generate a plurality of differential measurement signals, one for each of the plurality of pairs of sensor elements, where each of the plurality of differential measurement signals is derived from sensor signals generated by a corresponding pair of sensor elements. The sensor circuit is further configured to select a differential measurement signal having a greatest magnitude from among the plurality of differential measurement signals as the selected differential measurement signal.Type: GrantFiled: February 24, 2021Date of Patent: October 24, 2023Assignee: Infineon Technologies AGInventor: Simone Fontanesi
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Patent number: 11796708Abstract: An electrostatic capacitance detection device includes a first electrode, and a second electrode at least a part of which is opposed to the first electrode across a transport path extending in a transport direction in which a detection target having a sheet shape is transported. The first electrode and the second electrode extend in a cross direction intersecting the transport direction and have mutually different shapes. Alternatively, the electrostatic capacitance detection device further includes a first floating electrode disposed on the side of the first electrode opposite to the transport path, and a second floating electrode disposed on the side of the second electrode opposite to the transport path. Alternatively, at least one of the first electrode or the second electrode is provided with a first electric field adjuster or a second electric field adjuster.Type: GrantFiled: September 18, 2019Date of Patent: October 24, 2023Assignee: MITSUBISHI ELECTRIC CORPORATIONInventors: Toru Aramaki, Hiroshi Araki
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Patent number: 11796590Abstract: A system includes probe pins each including a probe tip and a plurality of thermocouples arranged such that at least one thermocouple is positioned between a pair of the probe pins. The plurality of thermocouples can be placed adjacent or above a device under test (DUT). The probe tips of the probe pins are placed over a plurality of pads. The plurality of thermocouples are placed adjacent or between the plurality of pads. The at least one thermocouple positioned between the pair of the probe pins can be either a single thermocouple or a thermocouple array.Type: GrantFiled: November 29, 2021Date of Patent: October 24, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Pablo Nieves, Kushagra Sinha, Reinaldo Vega
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Patent number: 11789092Abstract: A method of magnetic sensing uses at least two magnetic sensing elements including a first and a second magnetic sensor element. The method includes: a) measuring in a first configuration a combination of the first and second signal obtained from both sensors; b) measuring in a second configuration an individual signal obtained from the first sensor only; c) testing a consistency of the combined signal and the individual signal, or testing a consistency of signals derived therefrom, in order to detect an error. A sensor device is configured for performing this method. A sensor system includes the sensor device and optionally a second processor connected thereto.Type: GrantFiled: June 10, 2022Date of Patent: October 17, 2023Assignee: MELEXIS TECHNOLOGIES SAInventors: Zsombor Lazar, Mathieu Poezart, Lionel Tombez
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Patent number: 11789090Abstract: A power detection circuit is provided for detecting current total input power of a resonant circuit. The power detection circuit includes a detection circuit and an estimation circuit. The detection circuit receives a current signal and obtains resonant-slot baseband power according to the current signal to generate the baseband power value. The current signal represents a resonant-slot current generated by the resonant circuit. The estimation circuit receives the baseband power value and estimates the current total input power according to the baseband power value to generate an estimated power value.Type: GrantFiled: April 25, 2022Date of Patent: October 17, 2023Assignee: DELTA ELECTRONICS, INC.Inventors: Ming-Shi Huang, Zheng-Feng Li, Jhih-Cheng Hu, Yi-Liang Lin, Yu-Min Meng, Chun-Wei Lin, Chun Chang, Thiam-Wee Tan
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Patent number: 11782087Abstract: A semiconductor integrated circuit includes: one input terminal; multiple output terminals; multiple first current control elements connected between the input terminal and the respective output terminals; a control circuit that controls the first current control elements; a fault detection circuit that includes multiple voltage comparator circuits each of which compares a voltage proportional to a voltage of one of the output terminals with a predetermined threshold voltage and that detects an open-circuit state or a short-circuit state of the output terminals; an external terminal connected to an external resistor; a voltage convertor circuit that generates the threshold voltage according to a voltage of the external terminal that is generated by flowing a current through the external resistor, the threshold voltage being applied to an input terminal of each of the voltage comparator circuits; and a detection result output terminal for outputting a detection result by the fault detection circuit.Type: GrantFiled: August 3, 2022Date of Patent: October 10, 2023Assignee: MITSUMI ELECTRIC CO., LTD.Inventor: Yoichi Takano
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Patent number: 11784644Abstract: A rotation detector includes a rotary member, a magnet rotating as the rotary member rotates, and a first magnetic sensor detecting a direction of magnetic flux that changes as the magnet rotates. And the rotation detector includes a first soft magnetic member and a second soft magnetic member for the first magnetic sensor that are arranged on one side and the other side, respectively, of a detection direction of the first magnetic sensor. The magnet has a rotation axis that passes through the magnet.Type: GrantFiled: December 4, 2021Date of Patent: October 10, 2023Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Yukikazu Ujikane, Koji Masuda
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Patent number: 11774489Abstract: A testing arrangement for testing Integrated Circuit (IC) interconnects is provided. In an example, the testing arrangement includes a substrate, and a first interconnect structure. The first interconnect structure may include a first member having a first end to attach to the substrate and a second end opposite the first end, and a second member having a first end to attach to the substrate and a second end opposite the first end. In some examples, the second end of the first member and the second end of the second member are to contact a second interconnect structure of a IC device under test, and the first end of the first member and the first end of the second member are coupled such that the first member and the second member are to transmit, in parallel, current to the second interconnect structure of the IC device under test.Type: GrantFiled: June 9, 2021Date of Patent: October 3, 2023Assignee: Intel CorporationInventors: Pooya Tadayon, Justin Huttula
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Patent number: 11774480Abstract: Systems, devices, and associated methods are provided for testing and tuning radiofrequency (RF) modules. An example system includes a test station including an imaging device, a measurement device, and a robotic arm. The system may include a rotary stage coupled with the robotic arm, measurement probes disposed in the rotary stage and operably coupled with the measurement device, and tuning tips disposed in the rotary stage. The system may include a galvo scanner and laser to remove conductive material. In operation, the test station may perform a testing procedure on an RF module where the measurement probes generate testing data indicative of testing parameters. The test station may perform a tuning procedure on the RF module where a tuning tip or the laser modifies the RF module based on the testing parameters. The testing and tuning may be performed by a user, semi-autonomously, or autonomously.Type: GrantFiled: August 11, 2022Date of Patent: October 3, 2023Assignee: CAES SYSTEMS LLCInventors: James Scott Sacks, Baker M. Sharif, Thomas Matthew Graves, Nicholas Aaron Vong
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Patent number: 11774387Abstract: A wiring structure includes a wiring such as a flexible printed wiring board, a permanent magnet, and a relay piece. The wiring has a conductive portion. The permanent magnet has electrical conductivity. The relay piece is formed of a conductive metal and connected to the conductive portion of the wiring. The relay piece has the permanent magnet fixed thereto by magnetic attraction.Type: GrantFiled: March 7, 2022Date of Patent: October 3, 2023Assignee: NABTESCO CORPORATIONInventors: Masaki Harada, Atsushi Koike, Kazuhiko Sakurai
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Patent number: 11774470Abstract: Provided are a load detection system and a load detection method thereof. The load detection system includes an adjustable power supply (110) and a detection module (12). The adjustable power supply (110) and a to-be-detected load 120 together form a set load detection circuit (11), and the adjustable power supply (110) is configured to output a changing power supply signal to the to-be-detected load (120) through the set load detection circuit (11). The detection module (12) is configured to detect at least two changing electrical parameters in the set load detection circuit (11), acquire an equivalent resistance value of the to-be-detected load (120) according to the at least two changing electrical parameters, and detect whether the to-be-detected load (120) includes a charging device according to a non-linear change curve or a linear change curve formed by the equivalent resistance value and the power supply signal.Type: GrantFiled: August 30, 2019Date of Patent: October 3, 2023Assignee: JIANGSU ZIMI SOFTWARE TECHNOLOGY CO., LTD.Inventors: Feng Zhang, Maonan Yao