Patents Examined by Henry Choe
  • Patent number: 11916520
    Abstract: A Doherty amplifier including a main amplifier and a peak amplifier is mounted on a package substrate. A low noise amplifier is further mounted on the package substrate. A transmit/receive switch switches in terms of time between a transmission connection state in which an output signal of the Doherty amplifier is supplied to an antenna and a reception connection state in which a signal received by the antenna is inputted to the low noise amplifier.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: February 27, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Kiichiro Takenaka, Satoshi Arayashiki, Satoshi Sakurai
  • Patent number: 11909363
    Abstract: A radiofrequency power amplifier includes a balun transformer and a plurality of power transistor pairs arranged in a push-pull configuration. The balun transformer has an unbalanced coil extending between a first single-ended signal terminal and a first reference, and a balanced coil extending between a first balanced signal terminal and a second balanced signal terminal. The balun transformer also includes an auxiliary coil electrically isolated from the unbalanced coil and the balanced coil. The auxiliary coil is inductively coupled to the unbalanced coil and extends between a third balanced signal terminal and a fourth balanced signal terminal forming a balanced combiner-divider. An output of a first one of the power transistor pairs is coupled to the first and second balanced signal terminals and an output of a second one of the power transistor pairs is coupled to the third and fourth balanced signal terminals.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 20, 2024
    Assignee: PRODRIVE TECHNOLOGIES INNOVATION SERVICES B.V.
    Inventor: Bart Gerardus Maria Van Ark
  • Patent number: 11909357
    Abstract: An amplifier includes an amplification circuit, a power supplying circuit and an input circuit. A first end of the amplification circuit is connected with a first end of the input circuit; a second end of the amplification circuit is connected with the power supplying circuit; and a third end of the amplification circuit is connected with a second end of the input circuit. The power supplying circuit is at least configured to supply power to the amplification circuit so that the amplification circuit operates in an amplification region. The input circuit is at least configured to receive an input signal; the amplification circuit is configured to obtain an amplification gain in case of operating in the amplification region, and amplify the input signal by using the obtained amplification gain.
    Type: Grant
    Filed: December 25, 2020
    Date of Patent: February 20, 2024
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Zhenfei Peng, Qiang Su
  • Patent number: 11909361
    Abstract: The invention discloses a broadband logarithmic detector with high dynamic range, comprising a low noise amplifier, a compensate detection unit, a current summation and driving unit, an N-stage clipper amplifier and an N-stage detection unit. The invention improves the detection sensibility of the overall detector by adding a low noise amplifier before the first-stage clipper amplifier and extends the dynamic detection range of the overall detector through combination of the low noise amplifier and the compensate detection unit.
    Type: Grant
    Filed: October 22, 2019
    Date of Patent: February 20, 2024
    Assignee: NANJING MILLIWAY MICROELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Jianjun Wu, Mengjiao Si, Ying Zhang
  • Patent number: 11901288
    Abstract: A semiconductor device includes a semiconductor substrate, a semiconductor element, and a multilayer wiring. The semiconductor element is formed on the semiconductor substrate. The multilayer wiring includes a wiring electrically connected with the semiconductor element, and a first inductor. The multilayer wiring is formed on the semiconductor substrate such that the multilayer wiring covers the semiconductor element. The first inductor is formed such that the first inductor electrically isolated from the wiring and is magnetically connected with the wiring.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: February 13, 2024
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Tetsuya Iida, Yasutaka Nakashiba, Shinichi Uchida
  • Patent number: 11894815
    Abstract: A power amplifier includes: a power amplification circuit and a linearity compensation circuit; and herein the linearity compensation circuit is connected between a transistor amplification circuit and a biasing circuit of the power amplification circuit, to linearly compensate a nonlinear distortion of the power amplification circuit.
    Type: Grant
    Filed: December 26, 2020
    Date of Patent: February 6, 2024
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Qiang Su, Ping Li
  • Patent number: 11894826
    Abstract: An apparatus includes a radio-frequency (RF) apparatus, and a multi-band matching balun coupled to the RF apparatus. The multi-band matching balun including a plurality of capacitors and a plurality of inductors. None of the plurality of capacitors and none of the plurality of inductors is variable or tunable.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: February 6, 2024
    Assignee: Silicon Laboratories Inc.
    Inventors: Zoltan Vida, Attila L. Zolomy
  • Patent number: 11888454
    Abstract: A blocking signal cancellation low noise amplifier system includes a first low noise amplifier, a second low noise amplifier, a blocking signal extraction and bias generation circuit, a bias switching circuit, and a bias switching signal generating circuit. The first low noise amplifier is used for dynamic input matching, and the first low noise amplifier receives an input signal and outputs it after amplifying. The blocking signal extraction and bias generation circuit is used to extract a blocking signal from the output signal of the first low noise amplifier, and output a DC voltage signal. The bias switching circuit is used to switch the first low noise amplifier between a blocking mode and a small signal mode. The bias switching signal generating circuit is used to compare the DC bias voltage signal VB2 with a preset reference voltage signal Vref.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: January 30, 2024
    Assignee: THE CHINESE UNIVERSITY OF HONG KONG, SHENZHEN
    Inventors: Liang Wu, Yifu Li, Xiaoping Wu, Shiyuan Zheng
  • Patent number: 11888452
    Abstract: Amplifier having input power protection. In some embodiments, an amplifier circuit can include an input node and an output node, and an amplifier implemented between the input node and the output node. The amplifier circuit can further include a bias circuit configured to provide a bias signal to the amplifier. The amplifier circuit can further include a protection circuit configured to generate a detected voltage representative of a peak of a radio-frequency signal present at the input node. The protection circuit can be further configured to enable a protection mode when the detected voltage is greater than a first threshold value and to disable the protection mode when the detected voltage is less than a second threshold value that is less than the first threshold value.
    Type: Grant
    Filed: April 13, 2021
    Date of Patent: January 30, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventor: Paul Raymond Andrys
  • Patent number: 11881823
    Abstract: A power amplifier circuit includes a power amplification circuit and a diode assembly. The diode assembly is connected in series with a transistor amplification circuit of the power amplification circuit, and the transistor amplification circuit is configured to, when load of power amplifier is mismatched, turn the diode assembly on, so as to divide current voltage to at least two electrodes of the transistor amplification circuit.
    Type: Grant
    Filed: December 27, 2020
    Date of Patent: January 23, 2024
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Yongle Li, Limin Yu
  • Patent number: 11881820
    Abstract: A power control circuit includes a negative feedback loop, and a radio frequency signal path including a first NMOS transistor having a gate configured as a radio frequency signal input end, a drain connected with a source of a second NMOS transistor, and a source connected with a ground terminal. A drain of the second NMOS transistor is configured as a radio frequency signal output end and connected with a first voltage source. The negative feedback loop includes a third NMOS transistor having a gate connected with an output end of a differential amplifier, a source connected with the ground terminal, and a drain connected with a source of a fourth NMOS transistor having a gate connected with a reverse input end of the differential amplifier and with a second voltage source, and a drain connected with a forward input end and a first bias current source.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: January 23, 2024
    Assignee: SMARTER MICROELECTRONICS (GUANG ZHOU) CO., LTD.
    Inventors: Chifeng Liu, Qiang Su, Qiming Wang, Jiangtao Yi
  • Patent number: 11876489
    Abstract: Provided is a dual-drive based Doherty amplifier that includes a first power amplifier and a second power amplifier that is in parallel with the first power amplifier. The first power amplifier is configured to receive a first portion of a signal having a first phase, and the second power amplifier is configured to receive a second portion of the signal having a second phase that has a phase difference from the first phase. At least one of the first power amplifier or the second power amplifier includes a dual-drive power amplifier core.
    Type: Grant
    Filed: March 15, 2023
    Date of Patent: January 16, 2024
    Assignee: Falcomm, Inc.
    Inventors: Edgar Garay, Sanghoon Lee
  • Patent number: 11876494
    Abstract: A protection circuit is provided. The protection circuit protects a power amplifier that includes a power transistor configured to receive a power voltage, and a bias circuit configured to supply a bias current to the power transistor. The protection circuit includes: a first transistor, connected between a terminal of the bias circuit and a ground, and configured to sink a first current from the terminal of the bias circuit; and a second transistor, comprising a first terminal connected to the power voltage, a second terminal connected to a control terminal of the first transistor, and a control terminal connected to a reference voltage.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: January 16, 2024
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Gyu-Suck Kim, Youngsik Hur, Geunyong Lee
  • Patent number: 11876138
    Abstract: A semiconductor device capable of measuring a minute current is provided. The semiconductor device includes an operational amplifier and a diode element. An inverting input terminal of the operational amplifier and an input terminal of the diode element are electrically connected to a first terminal to which current is input, and an output terminal of the operational amplifier and an output terminal of the diode element are electrically connected to a second terminal from which voltage is output. A diode-connected transistor that includes a metal oxide in a channel formation region is used as the diode element. Since the off-state current of the transistor is extremely low, a minute current can flow between the first terminal and the second terminal. Thus, when voltage is output from the second terminal, a minute current that flows through the first terminal can be estimated from the voltage.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: January 16, 2024
    Inventors: Eri Sato, Tatsuya Onuki, Yuto Yakubo, Hitoshi Kunitake
  • Patent number: 11870402
    Abstract: Aspects of this disclosure relate to an impedance transformation circuit for use in an amplifier, such as a low noise amplifier. The impedance transformation circuit includes a matching circuit including a first inductor. The impedance transformation circuit also includes a second inductor. The first and second inductors are magnetically coupled to each other to provide negative feedback to linearize the amplifier.
    Type: Grant
    Filed: January 8, 2021
    Date of Patent: January 9, 2024
    Assignee: Skyworks Solutions, Inc.
    Inventor: Leslie Paul Wallis
  • Patent number: 11870202
    Abstract: Methods and apparatus for processing a substrate. For example, a processing chamber can include a power source, an amplifier connected to the power source, comprising at least one of a gallium nitride (GaN) transistor or a gallium arsenide (GaAs) transistor, and configured to amplify a power level of an input signal received from the power source to heat a substrate in a process volume, and a cooling plate configured to receive a coolant to cool the amplifier during operation.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: January 9, 2024
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Rajesh Kumar Putti, Vinodh Ramachandran, Ananthkrishna Jupudi, Lean Wui Koh, Prashant Agarwal
  • Patent number: 11863128
    Abstract: A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor that supplies a bias current based on a first current which is a part of a control current to the first transistor; a current output element in which a current flowing therethrough increases in accordance with a rise in temperature; and a wiring portion including a plurality of metal layers that are electrically connected to an emitter of the first transistor and that are stacked one on top of another so as to oppose the semiconductor substrate. At least one metal layer among the plurality of metal layers extends so as to overlap an area extending from at least a part of a first disposition area in which the first transistor is disposed to a second disposition area in which the current output element is disposed in plan view of the semiconductor substrate.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: January 2, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hideyuki Sato, Koshi Himeda
  • Patent number: 11863130
    Abstract: RF transistor amplifiers include a Group III nitride-based RF transistor amplifier die that includes a semiconductor layer structure, a conductive source via that is connected to a source region of the Group III nitride-based RF transistor amplifier die, the conductive source via extending through the semiconductor layer structure, and an additional conductive via that extends through the semiconductor layer structure. A first end of the additional conductive via is connected to a first external circuit and a second end of the additional conductive via that is opposite the first end is connected to a first matching circuit.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: January 2, 2024
    Assignee: Wolfspeed, Inc.
    Inventors: Basim Noori, Marvin Marbell, Qianli Mu, Kwangmo Chris Lim, Michael E. Watts, Mario Bokatius, Jangheon Kim
  • Patent number: 11850046
    Abstract: A simplified electronics approach to allow cost, size, and power consumption to be reduced while maintaining state of the art accuracy and reliability, key features for wireless medical devices/systems. Extreme accuracy is achieved by innovative noise shaping and filtering introduced to the electrochemical sensor, before sampling by the analog to digital converter. Introduction of the noise to the electrochemical sensor provides very low power biasing which is necessary to achieve overall reliable and very accurate bias for the electrochemical reaction cell.
    Type: Grant
    Filed: February 27, 2021
    Date of Patent: December 26, 2023
    Inventors: Robert Bruce Ganton, Robert S Ballam
  • Patent number: 11855596
    Abstract: An amplifier circuit includes a first input unit, a second input unit, a first current supply unit, and a second current supply unit. The first input unit changes a voltage level of a first output node based on a first input signal. The second input unit changes a voltage level of a second output node based on a second input signal. The first current supply unit supplies a first current to the first output node based on a voltage level of the first output node and boosts the voltage level of the first output node for a predetermined time when the voltage level of the first output node is changed. The second current supply unit supplies a second current to the second output node based on the voltage level of the first output node.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: December 26, 2023
    Assignee: SK hynix Inc.
    Inventor: Kyu Dong Hwang