Abstract: A memory system for storage access monitoring is provided. The memory system includes a media controller of a memory. An analog persistent circuit is coupled to the media controller and configured to monitor access to the memory. The analog persistent circuit stores persistent data related to memory access counts access signals from the command/address bus. A command/address bus is coupled to the analog persistent circuit. A memory array is communicatively coupled to the command address and the media controller.

Abstract: Techniques are provided for dynamic over-provisioning of storage devices. One method comprises obtaining a partitioning of a storage device associated into a first partition and an over-provisioning partition based on an over-provisioning ratio of the storage device, wherein portions of the over-provisioning partition are reallocated as portions of the first partition to replace portions of the first partition; storing user data associated with write operations in the first partition; monitoring a size of the over-provisioning partition; and dynamically adjusting the size of the over-provisioning partition in response to the size of the over-provisioning partition reaching a threshold. The dynamically adjusting the size of the over-provisioning partition may comprise reducing a size of the first partition.

Abstract: A management apparatus including a storage device configured to store restoration rules which define a plurality of patterns relating to the restoration in a restoration configuration indicating a copy source and a copy destination of the data, and backup configuration information relating to the backup source and the backup destination of the data, the management apparatus executes: specification processing of specifying restoration target data; selection processing of selecting a specific restoration rule from the restoration rules; and generation processing of generating, by referring to the backup configuration information, in a restoration configuration of the restoration target data in which the backup source of the restoration target data specified by the specification processing is the copy destination and the backup destination of the restoration target data is the copy source, a restoration pattern of the restoration target data in accordance with the specific restoration rule selected by the select

Abstract: A processing system includes a communication system and a processing core configured to generate write requests. A circuit has associated a slave interface circuit configured to manage an address sub-range and selectively forward write requests addressed to a given address. Configuration data specifies whether the given address is protected/unprotected and locked/unlocked. In response to a received write request, address and data are extracted and a determination based on the configuration data is made as to whether the extracted address is protected/unprotected, and locked/unlocked. When the extracted address is unprotected or unlocked, the slave interface forwards the write request. When the extracted address is protected and locked, the slave interface generates an unlock signal in response to a comparison of the extracted address with the extracted data, with the unlock signal being asserted when the extracted data satisfy a predetermined rule with respect to the extracted address.

Abstract: The present disclosure generally relates to recognizing a violation of an expected write amplification (WAF) rate and informing a host device of the violation so that the host device may take corrective action and ensure the data storage device does not reach end of life (EOL) earlier than expected. The host can provide the data storage device with an expected lifetime and may additionally provide a benchmark WAF rate. The data storage device compares the actual WAF rate to the benchmark WAF rate and notifies the host device of any violation where the actual WAF rate exceeds the benchmark WAF rate.

Abstract: Disclosed is a method for preforming the data mirror comprising: receiving from an application executing on a computing device a request to write data to a first local persistence memory of the computing device; issuing an async write operation to mirror the write request to write a same data to a second local persistence memory of the computing device by using a supplemental device; performing a write operation to write the data to the first local persistence memory by using a central processing unit (CPU) from the processing resource of the computing device; in response to determining that the write operation is completed and the async write operation is completed, determining a status check result indicating if the async write operation is successful; and sending the status check result to the application.

Abstract: Techniques for preventing recovery of specific data elements based on a recovery prevention configuration defined by a user are disclosed. In some embodiments, a computer system performs operations comprising: receiving a recovery prevention configuration from a first computing device of a first user, the recovery prevention configuration comprising at least one recovery prevention parameter specified by the first user via one or more user interface elements displayed on the first computing device, the at least one recovery prevention parameter being configured to identify one or more backup data elements stored in a secondary storage system; storing the recovery prevention configuration in a database in association with the secondary storage system; and filtering out the one or more backup data elements stored in the secondary storage system from a data recovery process based on the at least one recovery prevention parameter of the stored recovery prevention configuration.

Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.

Abstract: A storage system has a first memory, a second memory that include solid-state storage memory, and a processing device. The processing device is to select a mode for each portion of data to be written. Selection of the mode is based at least on size of the portion of data. Selection of the mode is from among modes that include a first mode of writing the portion of data in mirrored RAID form to the first memory for later transfer from the first memory to the second memory, a second mode of writing the portion of data in parity-based RAID form to the first memory for later transfer from the first memory to the second memory, and a third mode of writing the portion of data to the second memory, bypassing the first memory. The processing device is to handle portions of data to be written according to such selection.

Abstract: A storage system has NVRAM (nonvolatile random-access memory), storage memory that includes SLC (single level cell) flash memory and QLC (quad level cell) flash memory, and a processor. The processor performs a method that includes selecting one of a plurality of write paths for incoming data, and writing the incoming data via the selected write path. A first write path includes writing to NVRAM, writing from NVRAM to SLC flash memory and writing from SLC flash memory to QLC flash memory. A second write path includes writing to NVRAM and writing from NVRAM to QLC flash memory, bypassing SLC flash memory. A third write path includes writing to SLC flash memory, bypassing NVRAM, and writing from SLC flash memory to QLC flash memory.

Abstract: A storage system has a first memory, and a second memory that includes storage memory. The storage system has a processing device. The processing device is to select whether to write data to the first memory and write the data from the first memory to the second memory, or to write the data to the second memory bypassing the first memory. The processing device is to write portions of data for storage according to such selection.

Abstract: A memory system includes: a memory device including a plurality of pages each including a plurality of L-level cells, K planes each including the plurality of pages, and N memory dies each including the K planes; and a controller suitable for dividing logical addresses corresponding to write data, into a plurality of divided logical groups by grouping the logical addresses by a preset number, when performing a program operation of transferring the write data to the memory device to store, and mapping each of the plurality of divided logical groups to a reference logical unit in a first order of bits of the L-level cell, a second order of the N memory dies, and a third order of the K planes, according to a size of the write data, in order to decide an order in which the write data are to be transferred to the memory device.

Abstract: An SSD-based log data storage method includes: configuring metadata in a running state in log data to be continuously stored in a memory physical address of an SSD; dividing a preset number of buffers for an area where the metadata is continuously stored in the memory physical address; storing update data of the metadata generated during a reading-writing process according to the preset cyclic sequence; defining a mapping table of a memory logical address and a physical address of the log data; in response to the full storage of one buffer, executing an NAND writing operation on data in the buffer region, executing a preset length of NAND writing operation on metadata not written into a NAND in the SSD; in response to the completion of the NAND writing operation, ranking the corresponding buffer last in the preset cyclic sequence and waiting to store the update data of the metadata.

Abstract: In a particular embodiment, a storage service agent on an edge device is configured to access a particular set of storage system application programming interfaces (APIs) of at least one enterprise storage system, where the storage service agent communicatively coupled to a cloud-based storage service. The storage service agent invokes one or more storage system APIs of the particular set of storage system APIs in response to a control message from the cloud-based storage service.

Abstract: Methods and systems for transitioning a replica of a file system are described. An illustrative method includes updating a replica file system on a target data repository to be a replica of a source file system as the source file system existed on the source data repository at a point in time, where the replica file system is constructed of block objects at the target data repository that store metadata for individual files and directories of the replica file system and support access to blocks of data associated with the files and directories of the target file system at the target data repository, and where the updating includes updating the block objects of the replica file system to be replicas of block objects of the source file system as the block objects of the source file system existed on the source data repository at the point in time.

Abstract: Methods, systems, and devices for unmap backlog in a memory system are described. A memory system may be configured to support receiving an unmap command from a host system and signaling, to the host system, an indication that the unmap command has been processed (e.g., handled, acknowledged). In response to the unmap command, the memory system may proceed with various unmap operations, which may include unmapping at least some of the associated addresses after indicating that the unmap command has been processed. For example, a memory system may implement an unmap backlog table to identify sections of addresses that are to be unmapped (e.g., after indicating that the unmap command has been processed). In some examples, the memory system may support various aspects of prioritization between unmap operations (e.g., background unmap operations) and other access operations such as read operations, write operations, or other access operations.

Abstract: A memory device includes a clock receiver configured to receive, from a memory controller, a write clock that is used to receive write data during a data write operation, a duty monitor configured to generate first monitoring information by monitoring a duty of the write clock, and a duty adjuster configured to adjust the duty of the write clock in response to a duty control signal and output an adjusted write clock. The memory device provides the first monitoring information to the memory controller, and receives the duty control signal, generated using the first monitoring information, from the memory controller.

Abstract: Described are examples for storing, in a first zone cache, one or more logical blocks (LBs) corresponding to a data chunk, writing, for each LB in the data chunk, a cache element of a cache entry that points to the LB in the first zone cache, where the cache entry includes multiple cache elements corresponding to the multiple LBs of the data chunk, writing, for the cache entry, a table entry in a mapping table that points to the cache entry, and when a storage policy is triggered for the cache entry, writing the multiple LBs, pointed to by each cache element of the cache entry, as contiguous LBs in an isolation block for the data chunk in a second zone stream, and updating the table entry to point to the isolation block in the second zone stream.

Abstract: A power-on read circuit includes a power voltage detector, a first voltage booster, a voltage selector, a reference voltage generator and a read voltage generator. The power voltage detector detects a power voltage to generate a control signal. The first voltage booster generates a first boosted voltage according to the control signal. The voltage selector selects the power voltage or the first boosted voltage to generate a selected voltage. The reference voltage generator receives the selected voltage as an operating power source, and generates a reference voltage based on the selected voltage according to the control signal. The read voltage generator generates a second boosted voltage according to the reference voltage and a clock signal, and generate a read voltage based on the second boosted voltage according to the control signal. The read voltage is provided to a memory cell array to perform a data reading operation.

Abstract: An apparatus for data processing for simultaneously performing artificial intelligence (AI) function processing and data collection and a method thereof are provided. The method of simultaneously performing AI function processing and data collection includes: receiving, by a data receiver, data; transferring, by the data receiver, the received data to a disk handler; accessing, by the disk handler, a disk in an idle state among a plurality of disks and performing writing of a file; after the writing of the file is completed, notifying, by the disk handler, a scheduler that the writing of the file is completed; transmitting, by the scheduler, job information about a job, for which the file writing is completed together with a job execution command to an AI module handler; and accessing, by the AI module handler, an AI module in an idle state among a plurality of AI modules and executing an AI function.