Patents Examined by Hoai V. Pham
  • Patent number: 10446513
    Abstract: A conductive ball includes a copper ball, a nickel layer covering an outer surface of the copper ball, a copper layer covering an outer surface of the nickel layer, and a tin-based solder covering an outer surface of the copper layer. A copper weight of the copper layer relative to a summed weight of the tin-based solder and the copper layer is 0.7 wt % to 3 wt %.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: October 15, 2019
    Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
    Inventor: Kei Murayama
  • Patent number: 10444581
    Abstract: Provided are a COA array substrate and a display device. The array substrate is provided with a base layer, a metal layer, and a color resist layer from bottom to top. The array substrate is further provided with contact holes passing through the color resist layer and in contact with the metal layer, and the contact holes are arranged so that the alignment film droplets can be distributed when the alignment film droplets drop right onto the contact holes. Air bubbles as in the prior art are thus avoided, thereby preventing a cell gap due to accumulation of an alignment film from becoming larger. Thus, a luminance difference is avoided and the quality of the product is improved without upgrading the existing equipment. The brightness uniformity of the display device is improved by using the array substrate.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: October 15, 2019
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Li Chai, Maolin Wang, Xing Lei, Chengcai Dong
  • Patent number: 10446613
    Abstract: An organic light emitting diode display according to an exemplary embodiment includes: a substrate; a pixel formed on the substrate and including a pixel area displaying an image and a peripheral area adjacent to the pixel area; an insulating layer at the pixel area and the peripheral area on the substrate; a first electrode at the pixel area on the insulating layer; an organic emission layer on the first electrode and extending to the peripheral area; a second electrode on the organic emission layer and disposed in the pixel area and the peripheral area; an auxiliary electrode in the peripheral area on the substrate and partially exposed by a first opening formed in the insulating layer; and an auxiliary member disposed on the auxiliary electrode and in contact with an upper surface of the auxiliary electrode exposed by the first opening.
    Type: Grant
    Filed: November 12, 2018
    Date of Patent: October 15, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Se Ho Lee, Tae Hyung Kim, Je-Hyun Song
  • Patent number: 10439586
    Abstract: An electronic module includes a substrate, at least one first electronic component that includes a hollow portion, at least one second electronic component that includes no hollow portion, a first sealing resin, and a second sealing resin. The at least one first electronic component is sealed with the first sealing resin. The at least one second electronic component has a narrowest pitch between the electrodes that are provided on the mounting surface, and at least the mounting surface including the electrodes of the at least one second electronic component are sealed with the second sealing resin. The volume percentage of a filler that is included in the first sealing resin is larger than the volume percentage of a filler that is included in the second sealing resin.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: October 8, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Junpei Yasuda
  • Patent number: 10439161
    Abstract: A display panel includes an auxiliary electrode on a base substrate, a first electrode spaced from the auxiliary electrode, a first light emitting unit on the auxiliary electrode and the first electrode, an conductive thin film layer on the first light emitting unit, a second light emitting unit on the conductive thin film layer, a first contact hole through the conductive thin film layer to expose the auxiliary electrode, a insulating layer in the first contact hole, and a second electrode including a first electrode part and a second electrode part, the first electrode part being on the insulating layer in the first contact hole, and the second electrode part overlapping the first electrode and being on the second light emitting unit, wherein the insulating layer is between the first electrode part and the conductive thin film layer.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: October 8, 2019
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ilseok Park, Sangyeol Kim, Jungyeon Kim, Byeongmin Jang, Woosik Jeon, Junkyung Cho
  • Patent number: 10431581
    Abstract: Certain aspects of the present disclosure provide a semiconductor device. One example semiconductor device generally includes a substrate, a well region disposed adjacent to the substrate, a first fin disposed above the well region, a second fin disposed above the substrate, and a gate region disposed adjacent to each of the first fin and the second fin. The semiconductor device may also include at least one third fin disposed above the substrate, a support layer disposed above the at least one third fin, and a compound semiconductor device disposed above the support layer.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: October 1, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Xia Li, Gengming Tao, Bin Yang
  • Patent number: 10431619
    Abstract: The present disclosure relates to a solid-state image pickup device and an electronic apparatus that are capable of preventing leakage of charges between adjacent pixels. A plurality of pixels perform photoelectric conversion on light incident from a back surface via different on-chip lenses for each pixel. A pixel separation wall is formed between pixels adjacent to each other, and includes a front-side trench formed from a front surface and a backside trench formed from the back surface. A wiring layer is provided on the front surface. The present disclosure is applicable to, for example, a backside illuminated CMOS image sensor.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: October 1, 2019
    Assignee: Sony Corporation
    Inventors: Atsushi Masagaki, Yusuke Tanaka
  • Patent number: 10418410
    Abstract: Optoelectronic modules operable to collect distance data and spectral data include demodulation pixels operable to collect spectral data and distance data via a time-of flight approach. The demodulation pixels include regions with varying charge-carrier mobilities. Multi-wavelength electromagnetic radiation incident on the demodulation pixels are separated into different portions wherein the respective portions are used to determine the composition of the incident multi-wavelength electromagnetic radiation. Accordingly, the optoelectronic module is used, for example, to collect colour images and 3D images, and/or ambient light levels and distance data. The demodulation pixels comprise contact nodes that generate potential regions that vary in magnitude with the lateral dimension of the semiconductor substrate. The potential regions conduct the photo-generated charges from the photo-sensitive detection region to a charge-collection region.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: September 17, 2019
    Assignee: ams Sensors Singapore Pte. Ltd.
    Inventors: Bernhard Buettgen, James Eilertsen
  • Patent number: 10411126
    Abstract: A semiconductor device includes an electrically conductive lead frame which includes a die pad and a plurality of electrically conductive leads, each of the leads in the plurality being spaced apart from the die pad. The semiconductor device further includes first and second integrated switching devices mounted on the die pad, each of the first and second integrated switching devices include electrically conductive gate, source and drain terminals. The source terminal of the first integrated switching device is disposed on a rear surface of the first integrated switching device that faces and electrically connects with the die pad. The drain terminal of the second integrated switching device is disposed on a rear surface of the second integrated switching device that faces and electrically connects with the die pad.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: September 10, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Andreas Riegler, Christian Fachmann, Gabor Mezoesi, Hans Weber
  • Patent number: 10403856
    Abstract: The present invention provides a novel organic EL panel adapted to be color tunable by a user, for example. An organic EL panel 10 of the present invention includes: a first substrate 11; a second substrate 12; an organic EL element 13; and a sealing layer 14. One surface of the first substrate 11 is a mounting surface on which the organic EL element 13 is disposed. The first substrate 11 and the second substrate 12 are laminated in such a manner that the mounting surface of the first substrate 11 and one surface of the second substrate 12 face each other with the sealing layer 14 interposed therebetween. The sealing layer 14 seals a gap between the first substrate 11 and the second substrate 12 along an entire periphery of a region where the first substrate 11 and the second substrate 12 face each other. The first substrate 11 includes a light incident section 15 on which laser light is incident and a light guide section 16 that directs the incident laser light in an in-plane direction.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: September 3, 2019
    Assignee: NEC LIGHTING, LTD.
    Inventor: Yasushi Aoki
  • Patent number: 10396245
    Abstract: The present invention discloses a light emitting element and a fabrication method thereof. The light emitting element includes: an anode electrode, a hole transport layer, a light emitting layer, an electron transport layer and a cathode electrode, all of the light emitting units are divided into a plurality of light emitting sets, each light emitting set includes at least two light emitting units and the light emitting units in a same light emitting set share a same electron transport layer and a same cathode electrode. In the technical solutions of the present invention, all of the light emitting units in a same light emitting set share a same electron transport layer and a same cathode electrode, thus effectively reducing the number of the cathode electrodes.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: August 27, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Bo Zhang
  • Patent number: 10396084
    Abstract: Active regions for planar transistor architectures may be patterned in one lateral direction, i.e., the width direction, on the basis of a single lithography process, followed by deposition and etch processes, thereby providing multiple width dimensions and multiple spaces or pitches with reduced process variability due to the avoidance of overlay errors typically associated with conventional approaches when patterning the width dimensions and spaces on the basis of a sequence of sophisticated lithography processes. Consequently, increased packing density, enhanced performance and reduced manufacturing costs may be achieved on the basis of process techniques as disclosed herein.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: August 27, 2019
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Elliot John Smith, Nigel Chan, Nilesh Kenkare, Hongsik Yoon
  • Patent number: 10387792
    Abstract: A device for storing and/or transferring quantum data. The device has a plurality of elongate semiconductor structures arranged in side by said with each elongate semiconductor structure having a quantum well layer of one semiconductor material disposed between upper and lower layers of a different semiconductor material which share the same or essentially the same crystalline structure as that of the quantum well layer. Neighboring ones of the elongate semiconductor structures share a region forming a constriction between the neighboring ones of the elongate semiconductor structures.
    Type: Grant
    Filed: June 29, 2017
    Date of Patent: August 20, 2019
    Assignee: HRL Laboratories, LLC
    Inventors: Thaddeus D. Ladd, Andrey A. Kiselev, Danny M. Kim, Rongming Chu
  • Patent number: 10381591
    Abstract: The present disclosure provides an OLED device and a method for manufacturing the same, an array substrate and a display device. The OLED device includes an anode and a cathode and a light emitting functional layer interposed between the anode and the cathode, wherein a photoinduced electron film layer is formed on a side of the cathode away from the light emitting functional layer, the photoinduced electron film layer is able to generate photoinduced electrons, and the photoinduced electrons are transferable from the photoinduced electron film layer to the cathode.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: August 13, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Tian Dong
  • Patent number: 10373848
    Abstract: An LED display device includes a substrate and an LED encapsulation unit disposed on a side of the substrate, the LED encapsulation unit includes an LED stent and an LED chip encapsulated in the LED stent, a epoxy resin encapsulates the side of the substrate on which the LED encapsulation unit is disposed and the LED encapsulation unit to form a protection layer shielding the LED encapsulation unit. The epoxy resin completely encapsulates the substrate and the LED encapsulation unit to protect effectively the substrate and the LED encapsulation unit, which is sufficient to resist severe environment. Compared with the prior art, the service life of the LED display device is effectively prolonged, cost is reduced. The invention also provides a molding module for preparing the LED display device, and a preparation method thereof.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: August 6, 2019
    Assignee: SHENZHEN HOXLED OPTOELECTRONIC TECHNOLOGY CO., LTD.
    Inventors: Jun Deng, Youfa Zhou
  • Patent number: 10374032
    Abstract: A semiconductor device includes a semiconductor body having first and second opposite sides, a drift region, a body layer at the second side, and a field-stop region in Ohmic connection with the body layer. A source metallization at the second side is in Ohmic connection with the body layer. A drain metallization at the first side is in Ohmic connection with the drift region. A gate electrode at the second side is electrically insulated from the semiconductor body to define an operable switchable channel region in the body layer. A through contact structure extends at least between the first and second sides, and includes a conductive region in Ohmic connection with the gate electrode and a dielectric layer. In a normal projection onto a horizontal plane substantially parallel to the first side, the field-stop region surrounds at least one of the drift region and the gate electrode.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: August 6, 2019
    Assignee: Infineon Technologies Austria AG
    Inventors: Hans Weber, Christian Fachmann, Gabor Mezoesi, Andreas Riegler
  • Patent number: 10374038
    Abstract: The present disclosure relates generally to an epitaxy scheme for forming source/drain regions in a semiconductor device, such as an n-channel device. In an example, a method of manufacturing a semiconductor device includes forming an active area on a substrate. The active area includes a source/drain region. The formation of the source/drain region includes forming a barrier region along a bottom surface and side surface of a recess in the active area. The barrier region includes arsenic having a first dopant concentration. The formation of the source/drain region further includes forming an epitaxial material on the barrier region in the recess. The epitaxial material includes phosphorous having a second dopant concentration.
    Type: Grant
    Filed: March 15, 2018
    Date of Patent: August 6, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-I Kuo, Chii-Horng Li, Chia-Ling Chan, Li-Li Su, Yi-Fang Pai, Wei Te Chiang, Shao-Fu Fu, Wei Hao Lu
  • Patent number: 10373834
    Abstract: The present disclosure provides a semiconductor structure of a metal gate and a manufacturing method therefor. The manufacturing method includes providing a semiconductor substrate; uniformly depositing a first hard mask layer on the semiconductor substrate, corresponding to a region where the metal gate is located, patterning and etching the first hard mask layer to form a recess, forming a sloping sidewall on a sidewall of the recess, the sloping sidewall and an upper surface of the substrate forming a groove structure, with the size of an upper part of the groove structure being larger than that of a lower part thereof, and forming a metal gate in the groove structure; and removing the first hard mask layer.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: August 6, 2019
    Assignee: Shaghai Huali Microelectronics Corporation
    Inventor: Qiuming Huang
  • Patent number: 10374192
    Abstract: An organic light-emitting display apparatus including a first substrate including a display area and a peripheral area; a second substrate opposing the first substrate; an insulating layer disposed on the first substrate and including one or more openings; and a sealing member interconnecting the first substrate and the second substrate to each other and interposed between the first and second substrates. The one or more openings are disposed between a first conductive layer disposed on the display area and a second conductive layer disposed on the peripheral area. The one or more openings are at least partially or entirely filled with the sealing member.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: August 6, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Sangmin Hong, Jungi Youn, Goeun Lee
  • Patent number: 10361274
    Abstract: A silicon carbide semiconductor device includes: a semiconductor substrate that has a front surface and a rear surface, and is made of silicon carbide; and an ohmic electrode that is ohmically connected to the front surface or the rear surface of the semiconductor substrate. The ohmic electrode includes a metal silicide part and a metal carbide part. The metal silicide part surrounds a periphery of the metal carbide part that has a block shape. The metal silicide part is disposed between the semiconductor substrate and the metal carbide part.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: July 23, 2019
    Assignee: DENSO CORPORATION
    Inventors: Jun Kawai, Kazuhiko Sugiura, Yasuji Kimoto, Kayo Kondo