Abstract: In a protection circuit for an audio amplifier, a power relay is provided on a primary side of a power source of the audio amplifier. When a power switch has instructed power-on, a drive power is supplied from an auxiliary power source to the power relay by an instruction given by a control section which is supplied with an operating power thereby to turn on the power relay. A primary voltage is thereby supplied to the power source to set the audio amplifier to a power-on state. When the audio amplifier is in the power-on state, an excess current flowing in an output stage of a power amplifier and dc voltage occurring in an output signal line of the power amplifier and, if necessary, an abnormal voltage occurring in the power source are detected and the power relay is cut off by an instruction from the control section when either one of the abnormalities takes place whereby a primary side of the power source is accurately cut off when an abnormality has occurred.

Abstract: Non-linearity of a voltage-controlled non-linear amplifier/attenuator is compensated by placing a non-linear circuit in the feedback path of an operation amplifier of a linearizer, the circuit including one or more differential amplifiers connected in parallel. For example, one amplifier can be a low-gain amplifier whose exponential range is at the lower end of the control voltage range, and another can be a high-gain amplifier whose exponential range is at the upper end of the control voltage range. When a necessary number of differential amplifiers are used in the feedback path, it is possible to compensate for the non-linearity of the non-linear component to a desired extent.

Abstract: An amplifier circuit is powered by a single power voltage source connected to a drain node of a field effect transistor, and a series of a resistor and a diode produces a gate bias voltage from the power voltage at the single power voltage source so as to increase the resistance of a resistor connected to the source node of the field effect transistor, thereby decreasing a sensitivity of drain current to undesirable variation of the threshold voltage.

Abstract: A two-stage switched-capacitor residue amplifier having novel circuitry in the first and second stages provides fast and accurate settling while configured with a large closed-loop gain, and also provides low power consumption while powered from a five volt supply. The invention is particularly well suited for use in a multi-stage, pipe-lined analog-to-digital converter (ADC) that converts multiple bits in the first pipeline stage. Complementary PMOS and NMOS differential pairs are used in the first and/or second stage to increase the current slew capability of the amplifier. Current mirror gain and/or positive feedback is used in the second stage to increase transonductance and bandwidth. Cascode transistors are used in the output of the first and/or second stages and active cascode gain enhancement is used in the first stage to increase dc gain and accuracy.

Abstract: A CMOS amplifier output stage including a complementary output MOSFET transistor pair whose channels are connected together in series between a supply voltage and a reference potential, and whose gates are driven by a complementary MOSFET level shifting transistor pair and by bias voltage and current circuitry. Preferably, the level shifting transistor pair is a diode-connected NMOS transistor and a diode-connected PMOS transistor, the bias circuitry includes a source follower which drives the source of one of the diode-connected transistors with a current determined by an input voltage, all active elements of the invention are MOSFET transistors, and the minimum supply voltage required for operation is (V.sub.GS +2V.sub.SAT), where V.sub.GS is the largest source to gate voltage of the MOSFET transistors and V.sub.SAT is the largest source to drain voltage of the MOSFET transistors during operation in the saturation region. This allows operation with a supply voltage as low as 1.

Abstract: A high-frequency power amplifier circuit offers the advantages of high input impedance, good linearity, high power efficiency and accurate bias current control in a compact and economical circuit configuration. The amplifier includes a single-ended output stage driven by a symmetrical push-pull emitter follower stage with both active pull-down and active pull-up capability. The emitter follower stage is driven by an active phase-splitter stage, with bias current for the phase-splitter stage and subsequent stages being provided by a bias-current control stage which is directly connected to the phase splitter stage. A linear voltage-to-current converter stage receives a high-frequency input voltage and provides a high-frequency current signal to the input terminal of the bias-current control stage that controls the current in the output stage.

Abstract: A pre-amplifier disclosed in which low noise at the time of small input and linear amplification at the time of large input are compatible. In a pre-amplifier, such compatibility can be realized by constituting a current mirror circuit, with respect to a current of a first stage transistor in a transimpedance portion, by a by-passing transistor which is provided at an input side of the pre-amplifier. In such a configuration, by making a by-pass current flow proportionally to an input instantaneous current at the time of a large input, the transimpedance can be made small equivalently to thereby widen the dynamic range.

Abstract: A variable gain amplifying device for an AGC (Automatic Gain Control) circuit included in a receiver and having a broad dynamic range is disclosed. The device has a more linear gain-to-control voltage characteristic than the conventional device. Because the device broadens the range of control voltage without aggravating the deviation of the gain, its gain-to-control voltage characteristic is more stable than the characteristic of the conventional device.

Abstract: Constant setting time is achieved in automatic gain control (AGC) circuits having a variable gain amplifier (VGA) and a feedback loop with a loop filter, where the VGA has a non-exponential gain characteristic and the loop filter is allowed to be non-linear. This design differs from traditional AGC circuits in which the VGA had an exponential gain characteristic and the loop filter was linear. Relaxation of these requirements as provided by the invention permits AGC circuits to be implemented in MOS and other technologies in which AGC circuits of traditional designs are difficult to implement.

Abstract: In a gain control circuit (GCC), a plurality of parallel-arranged differential pairs (DP1,DP2 . . . DPN) is unbalanced as a function of a gain control signal (Vagc). Furthermore, the gain of individual differential pairs (DP1,DP2 . . . DPN) is reduced when the unbalance is increased, and vice versa. Accordingly, a favorable performance in terms of noise and distortion can be obtained.

Abstract: A differential amplifier with switched capacitor common mode feedback includes a differential telescopic cascode amplifier in which the differential output terminals are individually coupled to a common mode input bias terminal via separate feedback capacitors. During a first time period (e.g., a sampling period), the output terminals are connected together via a pair of output switches to provide a common mode output voltage in response to a common mode input bias voltage applied to the bias terminal via an input switch. An operational amplifier compares the common mode output voltage to a common mode reference voltage and, based upon the difference between such voltages, generates the common mode input bias voltage. During a second time period (e.g., a holding period), the input and output switches are all opened and the output terminals provide a differential output voltage in response to a differential input signal applied to the differential input terminals.

Abstract: A two-stage switched-capacitor CMOS Miller-compensated amplifier uses only n-channel transistors in its signal path to reduce the deleterious effects of parasitic capacitances in the signal path while still obtaining a high transconductance in both stages. A transistor inserted in series with the Miller capacitor between the output and input of the second stage of the amplifier introduces a feedforward zero in the left half of the S-plane of the circuit. By appropriately sizing the aspect ratio and properly biasing this transistor, the second pole of the amplifier is canceled with the introduced zero. Dummy transistors having their sources and drains connected (to serve as capacitors) are cross-connected between opposite polarity inputs and outputs of a differential pair of input transistors in the first stage to effectively cancel the gate-to-drain Miller-multiplied capacitance of the input transistors.

Abstract: A transformer-coupled amplifier includes a driver transformer in which a primary winding, a secondary winding, and a tertiary winding are wound on a core of a magnetic circuit, a drive signal source for supplying an AC drive signal superposed with a drive-stage DC current to the primary winding of the driver transformer, a power tube for extracting, from the secondary winding of the driver transformer, an AC signal corresponding to the AC drive signal supplied to the primary winding of the driver transformer, and for amplifying the AC signal from the secondary winding, and a DC magnetization control power source for supplying a predetermined magnetization control current to the tertiary winding of the driver transformer so as to change a degree of DC magnetization of the core of the magnetic circuit of the driver transformer. The DC magnetized state of the core of the transformer magnetized by the DC current is appropriately changed by the magnetization control current.

Abstract: A voltage isolation circuit having an improved method of combining the HF path and LF path is provided. The LF path comprises an opto-isolator to achieve voltage isolation of the input signal while passing low frequencies. The HF path comprises a transformer to achieve voltage isolation of the input signal while passing high frequencies. The HF path and LF path are combined at a summing node to obtain an isolated input signal. Obtaining a flat frequency response requires that the cross-over frequency between the LF path and HF path be closely matched. A portion of the LF path is injected into the HF path such that LF components are canceled out in the region of the transition frequency. In this way, the pole frequency of the transformer in the HF path may be compensated for to achieve a flat frequency response for the combined LF and HF paths.

Abstract: A differential amplifier comprising a first NMOS transistor having its gate for receiving a first input signal, a second NMOS transistor having its gate for receiving a second input signal, a first PMOS transistor connected between the first NMOS transistor and a supply voltage source, a second PMOS transistor connected between the second NMOS transistor and the supply voltage source and having its gate connected to a gate of the first PMOS transistor through a first common node, and a current source circuit connected between a second common node of the first and second NMOS transistors and a ground voltage source, the current source circuit including a third NMOS transistor having its gate for receiving an enable signal and a fourth NMOS transistor connected in series to the third NMOS transistor and having its gate for receiving the first or second input signal. According to the present invention, current consumption amount is reduced in a standby mode where no input signal is applied.

Abstract: A power amp module protecting apparatus of a mobile wireless phone having: a power supply unit for supplying driving power to a power amp module; a switching unit, connected between the power supply unit and an overcurrent detector, for performing a switching action in accordance with a logic level of a switching control signal output from a controller and a logic level of an overcurrent detecting signal from the overcurrent detector; the overcurrent detector, connected between the switching unit and the power amp module, for outputting an overcurrent detecting signal having a high logic level in response to the detection of an overcurrent from the power supply unit; and the controller for outputting the switching control signal to switch on the switching unit when no overcurrent is detected, for maintaining the switching unit in an off state in response continued receipt of the overcurrent detecting signal of high logic level output from the overcurrent detector and outputting the switching control signal to

Abstract: In a hybrid matrix amplifier array (100), a configurable digital transform matrix (116) is initialize with a matrix of transform coefficients. A plurality of digital input signals (M.sub.1 -M.sub.4) are received at inputs of the configurable digital transform matrix (116). The plurality of digital input signals are transformed to produce a plurality of transform digital signals (A.sub.1 -A.sub.4) using the matrix of transform coefficients. The plurality of transform digital signals are converted to a plurality of transformed analoged signals (206) to produce a plurality of transformed analog signals. The transformed analog signals are amplified (104, 208) to produce amplified transformed signals. Finally, the amplified transformed signals are inverse transformed (102, 210) to produce output signals that correspond to a respective digital input signal (M.sub.1 -M.sub.4).

Abstract: An amplifying circuit according to the present invention has an amplifying unit for amplifying an input signal to produce an amplified signal, a battery for generating a constant voltage (a first voltage), a step-up converter for always generating an increased voltage (or a second voltage) by increasing the constant voltage, and a selection changing circuit for supplying the increased voltage to the amplifying unit as an electric source voltage when a level of the amplified signal is higher than the constant voltage and supplying the constant voltage to the amplifying unit as the electric source voltage when a level of the amplified signal is lower than the constant voltage. Therefore, because the electric source voltage supplied to the amplifying unit is changed according to the level of the amplified signal, a loss occurring in an electric power consumed in the amplifying unit can be reduced.

Abstract: A power amplifier system which makes it possible to reduce the power consumption at a low power output and to stably change the output power within a wide range. This power amplifier system includes a first power amplifier unit having a fixed gain, and a second power amplifier unit having a fixed gain, both of which are connected in cascade. The first amplifier unit receives and amplifies an initial input signal and outputs a first output signal. The second amplifier unit receives and amplifies the first output signal and outputs a second output signal. A supply voltage controller serves to control the supply or stop of a power supply voltage to the first and second amplifier units in response to a control signal. The output selector serves to select one of the first and second output signals and to output the selected signal as an output signal of the power amplifier system in response to the control signal.

Abstract: An operational amplifier comprises an input stage, an output stage, and an intermediate circuitry connected between the input stage and the output stage. The operational amplifier may be biased between a high voltage line and a low voltage line. The input stage includes at least an amplifier circuit. The intermediate circuitry comprises at least a first pair of a first transistor and a first constant current source, both of which are connected in series to each other between the high voltage line and the low voltage line. The first pair may be adjacent to the output stage. A first intermediate point between the first transistor and the first constant current source may be connected to the output stage. At least a second pair of a second transistor and a second constant current source is provided, both of which are connected in series to each other between the high voltage line and the low voltage line. The second pair may be in parallel to the first pair and may be adjacent to the input stage.