Abstract: An interstitial X-ray needle includes an elongated X-ray tube coupled to an electron emitter at one end of the tube, with a converter element being disposed at a tip of the other end of the tube for converting emitted electrons into X-ray; a solenoid coil wound around the tube for providing a magnetic field that confines the emitted electrons within a narrow beam; an elongated outer casing enclosing the tube and coil; and a pipe coaxially disposed between the casing and the tube for defining an inner annular flow chamber between the tip of the tube and a coolant inlet in the casing and an outer annular flow chamber between the tip of the tube and a coolant outlet in the casing.
March 23, 1992
Date of Patent:
November 17, 1992
The Titan Corporation
Robert B. Miller, John R. Smith, Carl A. Muehlenweg
Abstract: A lithographic system, having a stepper and exposure station built on a block of granite attached to the ground using isolation legs, includes a servo control system for providing signals a motor associated with the stepper to control the movement of the stepper. The control system includes means to calculate a filter formula used to generate the control signals, which formula is calculated in response to the initial velocity, the movement of the stepper and a certain time between discrete movements, so that a minimum amount of energy is utilized. The filter formula requires that the difference in the velocity of the base and the stepper be zero at the time the stepper reaches the final position. Where time is short, both the base and the stepper initially move with the same velocity and end with the same velocity, and an array processor calculates the time varying filter formula.
Abstract: A very wide band beam splitter for operation in the range between deep ultraviolet of 190 nanometers and into infrared is comprised of uncoated transparent material only 0.10 to 0.15 mm. in thickness.
Abstract: A liquid crystal layer interposed between a pair of glass substrates is re-oriented for the purpose of eliminating zig-zag dislocations and providing a clear threshold voltage. First, the liquid crystal layer is transformed by elevating the temperature into an isotropic phase which affords a low viscosity, and then applied with an alternating electric field in order to urge the liquid crystal layer to be oriented in a direction parallel with the substrates. Next, the liquid crystal layer is gradually cooled to room temperature while the electric field application continues.
April 13, 1992
Date of Patent:
November 17, 1992
Semiconductor Energy Laboratory Co., Ltd.
Abstract: A liquid crystal display panel is composed of a plurality of panel elements. The panel elements are arranged in matrix form in a plane. Each element comprises an upper flexible substrate having a plurality of electric terminals formed thereon and a lower flexible substrate having a plurality of electric terminals formed thereon. Two adjacent panel elements are arranged in such a manner that the terminals of the upper substrate are electrically connected to the terminals of the lower substrate through a conductive resin layer disposed therebetween.
Abstract: This invention relates to a waveshaping circuit for producing a bus output voltage signal having a substantially sinusoidal rising transition from a low voltage level to a high voltage level in response to the rising edge of a data input signal, and a substantially sinusoidal falling transition from said high voltage level to said low voltage level, in response to the falling edge of said data input signal. The circuit uses AC coupling to control the waveshaping. This allows the circuit to operate with a large ground offset voltage difference between circuit ground and bus ground. An exponential current source provides a current to a regulator bus driver which charges and discharges a capacitor in response to the the rising edge or falling edge on the data input signal.
Abstract: A sense amplifier for detecting the voltage state (high or low) of the bit line of a programmable logic device with improved switching speed when the voltage state changes. When the bit line is high, a pull-up circuit including a cascode limits the maximum bit line voltage while isolating the output node from a supply of positive potential. At the same time, a transistor turned on by the high bit line voltage connects the output node to ground. An inverting amplifier on the output node produces an amplified output that follows the bit line. When the bit line is low, the conductance of a transistor gated by the bit line is substantially reduced, resulting in a relatively small conductance between the source line and ground, so that the source line potential rises significantly.
Abstract: A multichannel sine synthesizer for the primary signal production in measuring signal generators having a phase accumulator (11), a low-pass filter (12), an interposed first synthesis channel (13) and a clock control unit (25) which together convert a phase increment applied to the phase accumulator (11) into a sinusoidal signal. A problem in such synthesizers is the comparatively low maximum frequency of the sinusoidal signal produced because this frequency is limited by alias frequency effects. This is the reason why, in order to increase the maximum frequency with the same clock frequency, there is connected parallel to the synthesis channel (13) at least one further modified synthesis channel (26), which operates so as to be shifted in the time and to the input side of which is applied an additive phase value constant with a given frequency.
Abstract: A semiconductor integrated circuit of master and slave latches and the like that reduces power consumption by supplying a second clock which is a synchronous with a first clock to a slave latch only when the first clock that determines the latch period is supplied to a master latch, discontinuing the supply of the second clock after the master latch completes its latch action in the case that the supply of the first clock to the master latch is discontinued, and discontinuing the supply of clocks when latch action is not required, to reduce loads connected to them.
Abstract: A circuit for attenuating phase jitter on an incoming clock signal includes a digitally controlled oscillator, a phase lock loop including a phase detector, and a dithering circuit. The oscillator is capable of generating N discrete frequencies selectable through digitally controlled inputs controlling switched, capacitively-loaded amplifier stages. The phase lock loop provides a total of C.times.N.times.NB frequencies. The phase detector consists primarily of an up/down counter with an overflow/underflow limiter circuit. The dithering circuit modulates the oscillator signal to reduce inadequate rejection behavior when the incoming clock frequency is substantially the same as one of the N selectable frequencies of the oscillator divided down to match the frequency of the incoming clock.
Abstract: A frequency divider circuit including a field effect transistor on a semi-insulating substrate including applying a voltage higher than the lowest of the power supply voltages of the frequency divider circuit to the semi-insulating substrate.
Abstract: Flat panel displays are provided with overlying interconnected and hence redundant bus lines to reduce fatal defects. The redundant, generally row lines are interconnected at least at two locations on a line and can be connected at each pixel to further reduce defects. The redundant row or gate line is formed by an overlying light shield line which preferably is of low resistivity and enhances the operation of the displays. The display can include subdivided subpixels and one defective subpixel is generally an acceptable non-fatal display defect, since the rest of the subpixels are still operative. The subpixels can be formed with common or redundant column bus lines.
Abstract: A display device operating in accordance with the reset principle provides an array of pixels formed by an array of picture electrodes on the facing surfaces of two substrates with an electro-optical display medium therebetween. A matrix of row and column electrodes apply selection and data signals to the pixels and a system of auxiliary electrodes arranged parallel to the column electrodes apply an auxiliary voltage to the pixels prior to the selection signals. The picture electrodes are electrically coupled to the column electrodes and to the auxiliary electrodes via a plurality of first and second switching units, respectively. The first and second switching units are arranged perpendicular and parallel, respectively, to the column electrodes whereby artifacts are prevented while a larger effective surface area of the pixels is also obtained.
Abstract: A power unit assembly comprising an internal-combustion engine, a mechanical, unsynchronized gearbox, a clutch interposed between the engine and the gearbox, an inertia brake in which the gearbox, the relevant synchronization by means of the engine or the inertia brake and the control of the injection pump for the engine are controlled by an electronic processor adapted to inhibit the engagement of gear ratios to which an engine speed corresponds which does not fall within a programmed range of normal values; the processor is adapted to detect emergency operating conditions and, in such a case, to allow the engagement of a gear ratio which results in an engine speed value above said programmed range of values; to ensure synchronization even under such conditions the injection pump is provided with adjustment means adapted to allow speeds to be attained which are close to the upper limit of mechanical integrity of the engine.
Abstract: A liquid crystal display device having a matrix of pixels includes first and second light-transmissive substrates layered so as to face each other, a plurality of belt-like row electrodes spaced in parallel to each other on the first substrate, a plurality of belt-like column electrodes spaced in parallel to each other on the second substrate, a first shading layer divided into a plurality of segments partially overlying the row electrodes, a second shading layer divided into a plurality of segments partially overlying the column electrodes, and liquid crystals interposed and sealed between the first and second substrates. Each of the segments of the first shading layer are shaped and positioned so as to be opposed to each space between the column electrodes, while each of the segments of the second shading layer are shaped and positioned so as to be opposed to each space between the row electrodes.
Abstract: A camera lens with a relative aperture of 1:1.4 and a focal length of 35 mm has five components. The first component includes a cemented element which is concave on the object side. The second component includes a cemented element which has an aspherical convex surface on the object side. The third component serves as an individual lens. The fourth component includes a cemented element which is concave on the object side. The fifth component has a cemented element which includes a concave surface on the image side and an aspherical convex surface on the object side.
Abstract: A color liquid crystal display device is provided with a light protection system for rendering a plurality of beams in mutually different wavelength ranges incident upon a common liquid crystal display element from mutually different directions. The liquid crystal display element includes a liquid crystal driving device for light modulating the respective beams transmitting therethrough at mutually different angles. Further, on the surface of the liquid crystal display element upon which the beams are incident, an optical system is provided for focusing the respective beams of different wavelength ranges from different angles and for converging light beams of similar wavelength ranges for transmission through the liquid crystal display element so that combined color images can be subsequently formed on a display screen.
Abstract: A digital frequency detection circuit, or frequency discriminator, is implemented for use as a synchronization field detector for the synchronization field frequency in the data stream read from a computer floppy disk. No analog components are utilized; and the detector produces an output indicative of the presence of a valid synchronization field frequency whenever the incoming data pulses fall within a predetermined range of frequencies having a lowest frequency limit and an upper frequency limit. This is accomplished by employing a multi-stage binary counter for counting the reference clock pulses from a computer. The counter is reset each time an incoming data pulse is received; and the outputs of the counter are coupled to coincidence gates, which establish the lowest and highest frequency limits of the predetermined range of frequencies to be detected.
Abstract: Described herein is a retrofocus type wide angle lens system composed of a front group with a negative power and a rear group with a positive power, in which the front group is divided into a fixed group starting with a negative meniscus lens having a convex surface on the object side and terminating with a negative lens element having a concave surface on the image-forming side, and a corrective group starting with a positive lens element having a convex surface on the object side. The fixed group which is constituted by larger and heavier lens elements is held stationary relative to an image forming plane, while the corrective group of smaller and light-weight lens elements is movable in the direction of the optical axis concurrently with the rear group to vary the width of the air space between the respective groups at the time of focusing, thereby effectively correcting various aberrations which would otherwise occur in a conspicuous degree in infinite to near distance focusing.