Patents Examined by Jasmine Song
  • Patent number: 10162718
    Abstract: Methods and systems for tracking information that is transferred from a source to a destination storage system are provided. The source storage system maintains a first data structure for indicating that a storage block has been transferred. The destination storage system receives the storage block and updates a second data structure to indicate that the storage block has been received. The first data structure and the second data structure are compared to determine that the storage block was successfully transferred from the source storage system and received by the destination storage system.
    Type: Grant
    Filed: December 4, 2016
    Date of Patent: December 25, 2018
    Assignee: NetApp Inc.
    Inventors: Kanwaldeep Singh, Austin Diec, Manoj Sundararajan
  • Patent number: 10152240
    Abstract: A data transaction processing system including multiple transaction processors also includes a resource allocation system that characterizes the transaction processors based on input output electronic data transaction request message patterns associated with the transaction processors. The resource allocation system dynamically allocates computing resources, such as data path bandwidth, processor priority, CPU cores, memory, and processing threads to the various transaction processors and components therein based upon the transaction processor characterizations, improving the overall processing throughput, resource utilization, and efficiency of the multi-transaction processor system.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: December 11, 2018
    Assignee: Chicago Mercantile Exchange Inc.
    Inventors: Kyle D. Kavanagh, José Antonio Acuña-Rohter, Viren Soni
  • Patent number: 10133487
    Abstract: A mechanism is provided for providing information about fragmentation of a file on a sequential access medium by a computer system is disclosed. An actual time for reading the file recorded on the sequential access medium is estimated based on a physical position of the file. A total length of the file on the sequential access medium is calculated based on a physical length of each data piece constituting the file. An expected time for reading the file by assuming that the file is rewritten continuously is estimated based on the total length of the file. Information about the fragmentation of the file is then provided based on the actual time and the expected time.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: November 20, 2018
    Assignee: International Business Machines Corporation
    Inventors: Tohru Hasegawa, Hiroshi Itagaki, Sosuke Matsui, Shinsuke Mitsuma, Tsuyoshi Miyamura, Noriko Yamamoto
  • Patent number: 10133669
    Abstract: An example system on a chip (SoC) includes a cache, a processor, and a predictor circuit. The cache may store data. The processor may be coupled to the cache and store a first data set at a first location in the cache and receive a first request from an application to write a second data set to the cache. The predictor circuit may be coupled to the processor and determine that a second location where the second data set is to be written to in the cache is nonconsecutive to the first location, where the processor is to perform a request-for-ownership (RFO) operation for the second data set and write the second data set to the cache.
    Type: Grant
    Filed: November 15, 2016
    Date of Patent: November 20, 2018
    Assignee: Intel Corporation
    Inventors: Pavel I. Kryukov, Stanislav Shwartsman, Joseph Nuzman, Alexandr Titov
  • Patent number: 10120614
    Abstract: A storage device writes data at a high speed. The storage device is provided with a data area and a control unit. In the data area, a write position is specified by a write address. Also, the control unit writes the data in the write address when instructed to write the data in the write address, and generates an address different from the write address in which the writing is performed as an alternative write address and writes the data in the alternative write address when the writing of the data is unsuccessful.
    Type: Grant
    Filed: May 19, 2015
    Date of Patent: November 6, 2018
    Assignee: SONY CORPORATION
    Inventors: Hiroyuki Iwaki, Ken Ishii, Ryoji Ikegaya, Kenichi Nakanishi, Yasushi Fujinami, Naohiro Adachi
  • Patent number: 10120592
    Abstract: A storage subsystem constituting a pool using storage media having rewrite life and providing a logical volume having a virtual capacity to a host, wherein the storage subsystem monitors whether shortage of a remaining rewrite life of the capacity pool will occur or not within an operation period of the storage subsystem, and when it is determined that shortage of the remaining rewrite life will occur, the subsystem converts the rewrite life required to cover the shortage into drive capacity and indicates the same, or indicates the same by reducing an existing pool capacity, and requests maintenance of the subsystem. A maintenance method is provided, wherein elongation of life is executed by adding a capacity to the pool at the time of indication, and as for addition of capacity other than the elongation of life described above, a maintenance fee is charged.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: November 6, 2018
    Assignee: Hitachi, Ltd.
    Inventors: Masahiro Arai, Masahiro Tsuruya
  • Patent number: 10120584
    Abstract: A memory device includes memory cell array including a first and second plane and first and second caches. A controller is configured to output status information in response to a status read command. The status information indicating the states of the caches. The controller begins a first process in response to a command addressed to the first plane if the status information indicates the first and second caches are in the ready state, and begins a second process on the second plane according to a second command to the second plane if the status information indicates at least the second cache is in the ready state.
    Type: Grant
    Filed: June 16, 2016
    Date of Patent: November 6, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Masanobu Shirakawa, Tokumasa Hara
  • Patent number: 10114763
    Abstract: Methods and systems are provided for fork-safe memory allocation from memory-mapped files. A child process may be provided a memory mapping at a same virtual address as a parent process, but the memory mapping may map the virtual address to a different location within a file than for the parent process.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: October 30, 2018
    Assignee: KOVE IP, LLC
    Inventors: Timothy A. Stabrawa, Andrew S. Poling, Zachary A. Cornelius, Jesse I. Taylor, John Overton
  • Patent number: 10108545
    Abstract: The present application provides a method and apparatus of operating a shingled magnetic recording device that comprises a random access zone in which data is randomly readable and writable and a sequential access zone in which data is only sequentially readable and writable, and the sequential access zone is logically split into a plurality of banks operated independent of each other and storing a mapping from logical block addresses to physical block addresses in the random access zone; storing, in each bank of the plurality of banks in the sequential access zone, a respective part of a mapping from physical block addresses to logical block addresses; and operating the shingled magnetic recording device based on the mapping from logical block addresses to physical block addresses and the mapping from physical block addresses to logical block addresses.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: October 23, 2018
    Assignee: EMC IP Holding Company
    Inventors: Geng Han, Jian Gao, Huibing Xiao, Jibing Dong, Lester Ming Zhang
  • Patent number: 10102133
    Abstract: To deliver up-to-date, coherent user data to applications upon request, the disclosed technology includes systems and methods for caching data and metadata after it has been synchronously loaded—for future retrieval with a page load time close to zero milliseconds. To provide this experience, data needs to be stored as locally to a user as possible, in the cache on the local device or in an edge cache located geographically nearby, for use in responding to requests. Applications which maintain caches of API results can be notified of their invalidation, and can detect the invalidation, propagate the invalidation to any further client tiers with the appropriate derivative type mapping, and refresh their cached values so that clients need not synchronously make the API requests again—ensuring that the client has access to the most up-to-date copy of data as inexpensively as possible—in terms of bandwidth and latency.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: October 16, 2018
    Assignee: salesforce.com, inc.
    Inventor: Richard Perry Pack, III
  • Patent number: 10102126
    Abstract: A system and method are described for integrating a memory and storage hierarchy including a non-volatile memory tier within a computer system. In one embodiment, PCMS memory devices are used as one tier in the hierarchy, sometimes referred to as “far memory.” Higher performance memory devices such as DRAM placed in front of the far memory and are used to mask some of the performance limitations of the far memory. These higher performance memory devices are referred to as “near memory.” In one embodiment, the “near memory” is configured to operate in a plurality of different modes of operation including (but not limited to) a first mode in which the near memory operates as a memory cache for the far memory and a second mode in which the near memory is allocated a first address range of a system address space with the far memory being allocated a second address range of the system address space, wherein the first range and second range represent the entire system address space.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: October 16, 2018
    Assignee: Intel Corporation
    Inventors: Raj K. Ramanujan, Rajat Agarwal, Glenn J. Hinton
  • Patent number: 10101929
    Abstract: Embodiments of the present disclosure provide a method and apparatus of maintaining data consistency by receiving, when a first storage processor is in a Ready state, a request for configuration information of a storage object from a second storage processor; in response to receiving the request, setting the first storage processor to an Updating-Peer state, and sending the configuration information to the second storage processor to maintain consistency of the configuration information in the first and second storage processors; and in response to the configuration information being sent, setting the first storage processor back to the Ready state.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: October 16, 2018
    Assignee: EMC IP Holding Company LLC
    Inventors: Jian Gao, Hongpo Gao, Xinlei Xu, Huibing Xiao, Geng Han
  • Patent number: 10089029
    Abstract: A method of data storage in a non-volatile memory, wherein the non-volatile memory is divided into: a first region in which each page includes fields adapted to contain data and a field adapted to contain metadata; a second region in which each page includes fields adapted to contain data and a field adapted to contain metadata; a third region adapted to contain indicators of the progress of an operation in the first and second regions, the metadata fields of the first and second regions being respectively adapted to contain, during an operation of data update in a page of the first region, the indexes of a page in the second region and of said page of the first region.
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: October 2, 2018
    Assignee: PROTON WORLD INTERNATIONAL N.V.
    Inventors: Guillaume Docquier, Ronny Van Keer
  • Patent number: 10089032
    Abstract: A technique for managing storage in a data storage system sends a write from a second file system to a first file system at block-level granularity of the first file system and provides a set of flags that identify which flash-page-size portion(s) of a block are being changed. If the write is directed to a data block that is not shared, such that no write split is required, the improved technique checks the set of flags and proceeds to overwrite the data block in the first file system with only the flash-page-size portion(s) that have changed. The improved technique thus performs the overwrite in flash-page-size increments, avoiding writes to flash pages that remain unchanged.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: October 2, 2018
    Assignee: EMC IP Holding Company LLC
    Inventor: Philippe Armangau
  • Patent number: 10078586
    Abstract: An out-of-range reference detection method according to an exemplary aspect of the invention includes: acquiring a mask value corresponding to a base address register number of a predetermined effective address from a mask value storage unit storing correspondence relationships between the base address register number of a base address register storing a base address of a segment and the mask value showing a size of a memory that can be continuously referred to from the base address, determining whether or not the effective address is outside the range of the mask value, and outputting a result of the determination.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: September 18, 2018
    Assignee: NEC PLATFORMS, LTD.
    Inventor: Yuri Higuchi
  • Patent number: 10067698
    Abstract: A memory system includes a management-information restoring unit. The management-information restoring unit determines whether a short break has occurred referring to a pre-log or a post-log in a NAND memory. The management-information restoring unit determines that a short break has occurred when the pre-log or the post-log is present in the NAND memory. In that case, the management-information restoring unit determines timing of occurrence of the short break, and, after selecting a pre-log or a post-log used for restoration, performs restoration of the management information reflecting these logs on a snapshot. Thereafter, the management-information restoring unit applies recovery processing to all write-once blocks in the NAND memory, takes the snapshot again, and opens the snapshot and the logs in the past.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: September 4, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Junji Yano, Hidenori Matsuzaki, Kosuke Hatsuda
  • Patent number: 10061700
    Abstract: A method for writing data, the method may include: receiving or generating, by an interfacing module, a data unit coherent write request for performing a coherent write operation of a data unit to a first address; receiving, by the interfacing module and from a circuit that comprises a cache and a cache controller, a cache coherency indicator that indicates that a most updated version of the content stored at the first address is stored in the cache; and instructing, by the interfacing module, the cache controller to invalidate a cache line of the cache that stored the most updated version of the first address without sending the most updated version of the content stored at the first address from the cache to a memory module that differs from the cache if a length of the data unit equals a length of the cache line.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: August 28, 2018
    Assignee: Amazon Technologies, Inc.
    Inventors: Adi Habusha, Gil Stoler, Said Bshara, Nafea Bshara
  • Patent number: 10055354
    Abstract: A method for managing a caching medium for a storage system includes providing an SSD cache including a plurality of cache lines, providing a data structure including a plurality of buckets for managing the SSD cache, and providing a plurality of cache headers for managing the cache lines. Each cache line has a first predetermined size, and each bucket corresponds to a contiguous region of a physical storage capacity having a second predetermined size. Each cache header associates a cache line and a corresponding data block stored in the data storage system. The method also includes assigning two or more cache headers for cache lines associated with corresponding data blocks stored in a same contiguous region of the physical storage capacity to a same bucket, and maintaining the two or more cache headers as a first group of cache headers within the same bucket.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: August 21, 2018
    Assignee: AMERICAN MEGATRENDS, INC.
    Inventors: Paresh Chatterjee, Srikumar Subramanian, Narayanaswami Ganapathy, Venugopalreddy Mallavaram
  • Patent number: 10055157
    Abstract: A working method for a mass storage system includes providing a virtual file system for at least one user of the mass storage system; determining an access probability for files stored logically in the virtual file system, storing distributed files whose access probability lies above a predetermined limit value in a plurality of first physical mass storage devices which are independent of one another and have read/write units independent of one another and storing combined files whose access probability lies below the predetermined limit value in at least one contiguous storage region of at least one second physical mass storage device.
    Type: Grant
    Filed: August 5, 2013
    Date of Patent: August 21, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Dieter Kasper
  • Patent number: 10042555
    Abstract: Mechanisms are provided for automatically expanding a virtual storage of a virtual machine. The virtual machine monitors a usage of the virtual storage of the virtual machine. The virtual machine determines, based on the monitoring of the usage of the virtual storage, whether to expand the virtual storage of the virtual machine. In response to the virtual machine determining to expand the virtual storage of the virtual machine, a virtual machine manager executes one or more operations to expand the virtual storage. The monitoring and determining may be performed by a virtual storage management agent executing within the virtual machine and which may send an expansion request to an authorization engine to request expansion of the virtual storage.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Michele Crudele, Francesco Latino, Bernardo Pastorelli