Patents Examined by Jeremy C. Norris
  • Patent number: 10681801
    Abstract: A mounting assembly includes an electronic component mounted on an upper surface of a circuit board and having at least one electrical connector and a thermal pad provided on a lower surface of the component. The circuit board is mounted on a heatsink and provided with an opening beneath the thermal pad of the component. The heatsink has a heatsink extension which extends through the circuit board and is spatially separated therefrom. A thermal interface material is provided to ensure an electrically insulating thermal connection between the thermal pad and the heatsink extension.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: June 9, 2020
    Assignee: CPT Group GmbH
    Inventor: Aurelian Kotlar
  • Patent number: 10681824
    Abstract: A method for manufacturing a waterproof circuit board comprises steps of providing a first wiring substrate suitable for high-frequency transmissions. The first wiring substrate includes a first copper layer and a first conductive wiring layer. A waterproof layer is formed on exposed surfaces of the first wiring substrate. A second wiring substrate suitable for low-frequency transmissions defines a receiving groove. The second wiring substrate includes a second copper layer and defines a first blind hole. The first wiring substrate is pressed in the receiving groove. A first conductive portion is formed in the first blind hole to electrically connect the first conductive wiring layer and the second copper layer.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: June 9, 2020
    Assignees: HongQiSheng Precision Electronics (QinHuangDao) Co., Ltd., Avary Holding (Shenzhen) Co., Limited.
    Inventors: Jian-Yi Hao, Yan-Lu Li, Xian-Qin Hu, Ming-Hua Du
  • Patent number: 10667385
    Abstract: Embodiments of the invention may relate to a circuit board (CB). The circuit board may include a first CB layer that includes a first anti-pad having a first area, a second CB layer that includes a second anti-pad having the first area and being located substantially beneath the first anti-pad, a first via within the first anti-pad and the second anti-pad, and a first CB trace in the second CB layer. The first CB trace may be coupled to the first via to form a first transition point within a first signal propagation path. The first area may be determined, at least in part, by a depth within the CB of the second CB layer.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: May 26, 2020
    Assignee: Arista Networks, Inc.
    Inventor: James A. Weaver
  • Patent number: 10667400
    Abstract: An electrical component for embedding into a carrier comprises a ceramic main body, an electrically insulating passivation layer which is applied to the main body, and at least one inner electrode. In addition, the electrical component comprises an outer electrode which is connected to the inner electrode, wherein the outer electrode comprises a first electrode layer comprising a metal and a second electrode layer which is arranged on the latter and comprises copper.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: May 26, 2020
    Assignee: EPCOS AG
    Inventor: Thomas Feichtinger
  • Patent number: 10667408
    Abstract: A method of encapsulating and hermetically sealing a printed circuit board of a flex cable includes: positioning a printed circuit board portion of a flex cable into a channel defined in a first mold half of a mold, the printed circuit board portion including a substrate and electronic components mounted on the substrate; mounting a second mold half onto the first mold half to enclose the channel of the first mold half and form a cavity within the mold; and filling the cavity of the mold with an encapsulation material through an inlet opening defined through the mold.
    Type: Grant
    Filed: February 8, 2019
    Date of Patent: May 26, 2020
    Assignee: COVIDIEN LP
    Inventors: Anthony Sgroi, Jr., Patrick Mozdzierz, Stephen Paul, David Valentine, Scott Firth
  • Patent number: 10653012
    Abstract: An electronic device and manufacturing method thereof are disclosed. The manufacturing method of the electronic device comprises following steps: forming at least a thin-film conductive line on the substrate by a thin-film process; forming at least an electrical connection pad on the substrate by a printing process, wherein the electrical connection pad is electrically connected with the thin-film conductive line; and disposing at least an electronic element on the substrate, wherein the electronic element is electrically connected with the thin-film conductive line through the electrical connection pad. The electronic device has a lower manufacturing cost and a higher component configuration density, and the production yield and reliability of the electronic device are improved by the configuration of the electrical connection pad.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: May 12, 2020
    Assignee: GIO OPTOELECTRONICS CORP.
    Inventor: Chin-Tang Li
  • Patent number: 10652992
    Abstract: The present disclosure discloses a printed circuit board, a method for manufacturing the same and an electronic device. The PCB includes: a core board assembly including a first core board and a second core board which are stacked together, wherein the second core board includes a metal layer formed on a side of the second core board oriented towards the first core board, and the first core board defines a through slot extending through the first core board; a radiator, disposed in the through slot; and a conductive adhering layer, disposed between the metal layer of the second core board and the radiator, wherein the conductive adhering layer is configured to electrically connect the radiator and the metal layer. The present disclosure connects the radiator directly with the metal layer. The implementation of the present disclosure may help cooling the metal layer to improve the cooling performance of the PCB.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: May 12, 2020
    Assignee: SHENNAN CIRCUITS CO., LTD.
    Inventors: Zhanhao Xie, Hua Miao, Chuanzhi Li, Xudong Chen
  • Patent number: 10645813
    Abstract: A photoresist is deposited on a seed layer on a substrate. A first region of the photoresist is removed to expose a first portion of the seed layer to form a via-pad structure. A first conductive layer is deposited onto the first portion of the seed layer. A second region of the photoresist adjacent to the first region is removed to expose a second portion of the seed layer to form a line. A second conductive layer is deposited onto the first conductive layer and the second portion of the seed layer.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: May 5, 2020
    Assignee: Intel Corporation
    Inventors: Brandon M. Rawlings, Henning Braunisch
  • Patent number: 10645802
    Abstract: A display device includes a flexible substrate including a bending area corresponding to an area at which the display device is bent, and a first area and a second area which is spaced apart from the first area by the bending area, a display element unit disposed in the first area of the flexible substrate; and a buffer member disposed in the bending area of the flexible substrate. The buffer member in the bending area includes: a first buffer member having a first maximum thickness, and a second buffer member having a second maximum thickness which is smaller than the first maximum thickness. Among the first buffer member and the second member, the first buffer member disposed closer to the first area and the second member disposed closer to the second area.
    Type: Grant
    Filed: September 19, 2019
    Date of Patent: May 5, 2020
    Assignee: SAMSUNG DISPLAY CO. LTD.
    Inventors: Oh June Kwon, Seung Wook Kwon, Hyo Jeong Kwon, Doo Hwan Kim, Min Sang Kim, Chan Ho Moon, Won Je Cho
  • Patent number: 10627716
    Abstract: The present invention provides a photosensitive resin composition with which a dry resist film can be obtained, the dry resist film exhibiting excellent storage stability and migration resistance in thickness direction thereof. This photosensitive resin composition comprises: a photosensitive prepolymer having a carboxyl group and an ethylenically unsaturated group; a photopolymerization initiator; and a thermosetting agent. The thermosetting agent is a polycarbodiimide compound represented by formula (1), in which a carbodiimide group is protected by an amino group that dissociates at temperatures of 80° C. or greater. The polycarbodiimide compound has a weight average molecular weight of 300-3000, and a carbodiimide equivalent weight of 150-600. In formula (1), R1, R2, X1, X2, and n are as defined in the description.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: April 21, 2020
    Assignee: ARISAWA MFG. CO., LTD.
    Inventors: Takashi Gondaira, Makoto Tai
  • Patent number: 10629354
    Abstract: An inductive component having a coil with a winding of a wire and a molded body adhering to the coil. The molded body has a surface for the arrangement of a heat sink. A method for producing such a component is also specified, in which, to produce the molded body, a mold is filled with a potting material and the mold is subsequently removed.
    Type: Grant
    Filed: May 17, 2017
    Date of Patent: April 21, 2020
    Assignee: TDK ELECTRONICS AG
    Inventor: Martin Neudecker
  • Patent number: 10631403
    Abstract: A microcapsule includes a shell including a conducting component; and a thermally expandable component contained in the shell and having a property of expanding by heating, the shell deforming due to expansion of the thermally expandable component to come in contact with another capsule and have a conducting state with the other capsule.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: April 21, 2020
    Assignee: CASIO COMPUTER CO., LTD.
    Inventors: Kenji Iwamoto, Satoshi Kurosawa
  • Patent number: 10631397
    Abstract: A printed circuit board includes a printed wiring board having a mounting surface facing a first side, an electronic element provided on the mounting surface, a heat dissipation member disposed on the first side with respect to the electronic element, and a heat conduction member disposed between the electronic element and the heat dissipation member and having a first surface facing the first side and a second surface facing a second side opposite to the first side. The heat conduction member has a high relative magnetic permeability portion and a low relative dielectric constant portion. The high relative magnetic permeability portion surrounds the low relative dielectric constant portion on at least the second surface of the heat conduction member. At least part of the low relative dielectric constant portion overlaps the electronic element in a plan view seen in a direction perpendicular to the mounting surface.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: April 21, 2020
    Assignees: SEIKO EPSON CORPORATION, KITAGAWA INDUSTRIES CO., LTD.
    Inventors: Masaaki Ito, Toshiyuki Omori, Toru Matsuzaki, Yasuhiro Kawaguchi, Masahiro Saito, Kensuke Mitsuya
  • Patent number: 10617002
    Abstract: A circuit board is obtained by providing a wiring pattern on an insulating board. The circuit board includes a first region and a second region. In the first region, a first wiring pattern is provided on which a first surface treatment is applied. In the second region, a second wiring pattern is provided on which a second surface treatment having a cutting fluid resistance and/or a humidity resistance lower than the first surface treatment is applied.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: April 7, 2020
    Assignee: FANUC CORPORATION
    Inventor: Norihiro Saido
  • Patent number: 10609811
    Abstract: A conductor is placed on a first placement portion of a heat dissipation member with an insulation member interposed therebetween. An FET is electrically connected to the conductor. When current flows between the drain and the source of the FET, the FET generates heat. A second placement portion of a circuit board is placed on the conductor. The conductor and the insulation member are sandwiched between the first placement portion and the second placement portion. In the heat dissipation member, a first extension portion extends from the first placement portion, and in the circuit board, a second extension portion extends from the second placement portion. The first extension portion is located opposite to and is spaced apart from the second extension portion, and a microcomputer is placed on an upper surface of the second extension portion. The microcomputer outputs a control signal for turning the FET ON or OFF.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: March 31, 2020
    Assignees: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Shungo Hiratani, Hideaki Tahara, Yuuichi Hattori, Akira Haraguchi, Jun Ikeda, Arinobu Nakamura
  • Patent number: 10595406
    Abstract: A module component includes a substrate; first, second, third and fourth main electrodes on or in a principal surface of the substrate; a sub-electrode located between two of the four main electrodes and connected to one of the four main electrodes by a solder; a first mount component mounted to the first and second main electrodes; and a second mount component mounted to the third and fourth main electrodes; wherein an area of the sub-electrode is smaller than an area of each of the first, second, third and fourth main electrodes.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: March 17, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hiroshi Nishikawa
  • Patent number: 10588231
    Abstract: A method of assembling a hermetically sealed printed circuit board includes: securing a first end portion of a wall of a cap to a substrate around an electrical contact region of the substrate, the wall including a second end portion disposed in an open configuration; mounting an electronic component to the electrical contact region of the substrate; and sealing the second end portion of the wall closed to form a hermetically sealed chamber between the substrate and the cap to encase the electronic component therein.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: March 10, 2020
    Assignee: Covidien LP
    Inventors: Anthony Sgroi, Jr., David Valentine, Scott Firth
  • Patent number: 10588217
    Abstract: A manufacturing method of a flexible transparent circuit includes preparing a circuit template. The method further includes using a flexible transparent polymer material to prepare a cured transparent carrier on the circuit template, wherein the cured transparent carrier has a groove circuit structure. The method includes coating a solution containing a conductive material in a groove of the cured transparent carrier. The method further includes forming a circuit with the high transparency and conductivity after the solvent is volatilized. The circuit are designed and manufactured according to the requirements, and the precision thereof is able to achieve the micron or nanometer level. The formed circuit is light. The circuit can be stretched, bended or twisted many times. The circuit has a good biological compatibility. The circuit manufactured by such method is expected to be applied in various fields such as smart contact lens, flexible transparent electron devices, electronic skins.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: March 10, 2020
    Assignee: DALIAN UNIVERSITY
    Inventors: Jing Sun, Mingfei Lang
  • Patent number: 10588215
    Abstract: Disclosed is an inter-board connection structure including a signal line conductor (22) provided in an outer layer of a printed circuit board (100), a signal line conductor (24) extending in a direction from the signal line conductor (22) to a signal pad (21), and forming a capacitive component between itself and a signal pad (21), and a signal line conductor (23) branching and extending from a connecting portion between the signal line conductor (22) and the signal line conductor (24), and electrically connected to the signal pad (21).
    Type: Grant
    Filed: April 7, 2017
    Date of Patent: March 10, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takeshi Yuasa, Takeshi Oshima
  • Patent number: 10575413
    Abstract: Apparatuses and methods for forming serial advanced technology attachment (SATA) board edge connectors with electroplated hard gold contacts. One example method can include forming a tie bar on an inner layer of a printed circuit board (PCB), forming a trace on an outer layer of the PCB, forming a via, wherein the via electrically couples the tie bar to the trace, forming a contact coupled to the trace on the outer layer, and sending an electrical charge from the tie bar through the via and the trace to the contact to electroplate the contact.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: February 25, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Kurt B. Smith