Patents Examined by Jeremy C. Norris
  • Patent number: 11541640
    Abstract: A circuit-including film comprising: a resin film (1); and a conductive fine wire circuit (A) and a conductive circuit (B) independent of the conductive fine wire circuit (A), which are arranged on one surface of the resin film (1), wherein the resin film (1) contains at least one resin selected from the group consisting of a polyvinyl acetal resin, an ionomer resin and an ethylene-(vinyl acetate) copolymer resin.
    Type: Grant
    Filed: December 27, 2018
    Date of Patent: January 3, 2023
    Assignee: Kuraray Europe GmbH
    Inventors: Yuhi Shimazumi, Koichiro Isoue, Jun Koishikawa
  • Patent number: 11546983
    Abstract: A printed circuit board includes a plurality of layers including attachment layers and routing layers; and via patterns formed in the plurality of layers, each of the via patterns including first and second signal vias forming a differential signal pair, the first and second signal vias extending through at least the attachment layers; ground vias extending through at least the attachment layers, the ground vias including ground conductors; and shadow vias located adjacent to each of the first and second signal vias, wherein the shadow vias are free of conductive material in the attachment layers. The printed circuit board may further include slot vias extending through the attachment layers and located between via patterns.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: January 3, 2023
    Assignee: Amphenol Corporation
    Inventors: Mark W. Gailus, Marc B. Cartier, Jr., Vysakh Sivarajan, David Levine
  • Patent number: 11546984
    Abstract: A PCB bridge for interconnection of two or more semiconductor chips for data communication between the semiconductor chips includes a plurality of metal strips; and a dielectric material disposed in between the plurality of metal strips. The PCB bridge is employed in a vertical direction in a semiconductor module for interconnection of two or more semiconductor chips, the vertical direction of the PCB bridge provides a flexible impedance matching by adjusting the dielectric material and a trace width of the PCB bridge, and the vertical direction of the PCB bridge avoids signal reflections by matching the impedance to a source, and a trace length of the PCB bridge is limited by spacing in between two semiconductor chips which further limited inductance of the trace of the PCB bridge.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: January 3, 2023
    Assignee: Cloud Light Technology Limited
    Inventor: Ka Kit Wong
  • Patent number: 11528936
    Abstract: An aerosol generating device includes at least one heater, a battery, and a controller, and generates aerosol by heating a cigarette. The aerosol generating device according to the present exemplary embodiment includes a main printed circuit board (PCB) and an auxiliary PCB formed out of a rigid material and a connecting PCB formed out of a flexible material, and the connecting PCB may electrically connect the main PCB to the auxiliary PCB. Also, the aerosol generating device according to the present exemplary embodiment may include a rigid-flexible PCB.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: December 20, 2022
    Assignee: KT&G CORPORATION
    Inventor: Hun Il Lim
  • Patent number: 11533803
    Abstract: An arrangement for exchanging heat between two bodies comprises a circuit board, having at least one first via and at least one second via, wherein at least one heat exchange structure is integrated in the circuit board, wherein the at least one heat exchange structure comprises two heat exchange layers and an intermediate layer arranged between the two heat exchange layers, wherein the two heat exchange layers are thermally joined to each other and electrically separated from each other by the intermediate layer, wherein a first heat exchange layer is associated with the first body and can be brought into thermal contact with it and a second heat exchange layer is associated with the second body and can be brought into thermal contact with it, wherein the at least one first via and the at least one second via are each led through the two heat exchange layers and the intermediate layer arranged between the two heat exchange layers, wherein the at least one first via is in contact only with the first heat exch
    Type: Grant
    Filed: November 1, 2021
    Date of Patent: December 20, 2022
    Assignee: Audi AG
    Inventor: Thomas Ferstl
  • Patent number: 11528801
    Abstract: A printed circuit board according to an embodiment includes: an insulating layer; and a circuit pattern disposed on the insulating layer, wherein the circuit pattern includes an upper surface, a lower surface, a first side surface, and a second side surface, and surface roughness Ra of at least three surfaces of the upper surface, the lower surface, the first side surface, and the second side surface of the circuit pattern is 0.1 ?m to 0.31 ?m.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: December 13, 2022
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Yong Suk Kim, Hyun Gu Im, Byeong Kyun Choi
  • Patent number: 11523521
    Abstract: A method of manufacturing a multilayer board includes forming conductor patterns on four or more insulating base material layers, forming a multilayer body by stacking the insulating base material layers in a state in which the conductor patterns face each other with prepreg layers therebetween, and heat-pressing the multilayer body. In a state before the step of heat-pressing, among the prepreg layers, a thickness of an outermost prepreg layer is larger than a thickness of a prepreg layer other than the outermost prepreg layer.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: December 6, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Shingo Ito, Kanto Iida, Naoki Gouchi
  • Patent number: 11516907
    Abstract: A glass wiring board that can be kept from cracking by better preventing concentration of stresses in a glass plate on which a conductor layer including an electrolytic copper plating layer is provided, the wiring board includes: a glass plate; a first metal layer covering at least a part of the glass plate; and a second metal layer covering at least a part of the first metal layer, and the area of the first metal layer in contact with the second metal layer is smaller than the area of the second metal layer facing the first metal layer.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: November 29, 2022
    Assignee: TOPPAN PRINTING CO., LTD.
    Inventor: Tetsuyuki Tsuchida
  • Patent number: 11510318
    Abstract: A single-layer redistribution plate functioning as a space translator between a device under testing (“DUT”) and a testing PCB may comprise a hard ceramic plate. A DUT side of the plate may have pads configured to interface with a device under testing. Both sides of the plate may comprise traces, vias, and pads to fan out the DUT pad pattern so that the plate side opposite the DUT side has spatially translated pads configured to interface with the pads on a testing PCB. Fabricating a redistribution plate may comprise calibrating and aligning, laser milling vias, laser milling trenches and pads, copper plating, grinding and polishing, removing residual copper, and coating the copper surfaces.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: November 22, 2022
    Inventors: Dominik Schmidt, Prasanna Rao Chitturi, Jed Hsu
  • Patent number: 11503708
    Abstract: A resin composition, a prepreg, and a printed circuit board are provided. The resin composition is used to form a dielectric substrate layer. The resin composition includes a polymeric based material and fillers. Based on a total volume of the resin composition being 100 vol %, the resin composition includes 10 vol % to 60 vol % of the polymeric based material and 1 vol % to 80 vol % of the fillers. The fillers include hollow fillers, and the hollow fillers include a first hollow filler. A material of the first hollow filler is silicon dioxide.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: November 15, 2022
    Assignee: ITEQ CORPORATION
    Inventors: Yen-Hsing Wu, Chen-Hao Chang
  • Patent number: 11499233
    Abstract: Provided is a plating lamination technology for providing a highly adhesive inner layer of a printed circuit board. The plating lamination technology is effective in providing an electroless plated laminate, including a non-etched/low-roughness pretreated laminate or a low-roughness copper foil, and a printed circuit board including the plated laminate.
    Type: Grant
    Filed: October 14, 2019
    Date of Patent: November 15, 2022
    Assignee: YMT CO., LTD.
    Inventors: Sung Wook Chun, Bo Mook Chung, Myong Whan Park
  • Patent number: 11497113
    Abstract: An electronic circuit includes plural individual electronic circuits arranged, in which each of the plural individual electronic circuits has a first conductor column that is connected to a ground of a first layer which is any one of plural conductor layers sequentially stacked in a separated state and extends in a stacking direction, a conductor line that is connected to the conductor column to extend in a band shape in a second layer different from the first layer which is any one of the plural conductor layers, and of which an end portion separated from the conductor column is an open end, and a second conductor column that is connected to the conductor line, is not connected to the ground, and extends in the stacking direction, and each of a first individual electronic circuit and a second individual electronic circuit adjacent to each other among the plural individual electronic circuits has at least a pair of the second conductor columns, which are formed at adjacent positions without interposing any on
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: November 8, 2022
    Assignee: FUJIFILM Business Innovation Corp.
    Inventor: Daisuke Horikawa
  • Patent number: 11495896
    Abstract: A system for powering a datacenter campus including a main direct current (DC) superconductor cable configured to receive direct current DC electrical power from an alternating current (AC) power grid through a AC-DC converter, a DC-DC hub connected to the main superconductor cable, and a plurality of secondary DC superconductor cables, wherein each secondary DC superconductor cable includes a first end electrically connected to the DC-DC hub and a second end electrically connected to server racks housed in a respective datacenter building of the datacenter campus.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: November 8, 2022
    Assignee: Google LLC
    Inventor: Selver Corhodzic
  • Patent number: 11490507
    Abstract: This application discloses a circuit board and a manufacturing method of the circuit board. The circuit board includes a signal transmission pin pad configured to connect with signal transmission pins of an external same kind connectors to transmit a signal, and fixing pads configured to fix fixing pins of the connectors. A number, location, and size of the fixing pads are matched with a same kind connector. The same kind connector is a connector with a same number of signal transmission pins and a same distance of pins. The number of the fixing pads is greater than or equal to a maximum number of fixing pins of the same kind connector.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: November 1, 2022
    Assignee: HKC CORPORATION LIMITED
    Inventor: HuaiLiang He
  • Patent number: 11490504
    Abstract: A high-speed transmission circuit design reduces or eliminates the presence of unwanted stub-effects and avoids uncontrolled line impedances that in existing circuits cause impedance mismatches that give rise to unwanted reflections and, ultimately, degrade signal integrity, e.g., in belly-to-belly configurations involving Quad Small Form-Factor Pluggable Double Density (QSFP DD) connectors. In various embodiments, by preventing overcrowding of signal lines, the circuit design further reduces crosstalk and increases signal integrity.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: November 1, 2022
    Assignee: DELL PRODUCTS L.P.
    Inventor: Umesh Chandra
  • Patent number: 11490509
    Abstract: A module substrate for a semiconductor module including a wiring substrate having an upper surface and a lower surface opposite to each other and including a wiring formed therein, the wiring substrate having at least one through groove in at least one sidewall and extending in a thickness direction, and a through-groove test terminal including at least one contact pad, a surface of the contact pad being exposed from an inner wall of the through-groove, the contact pad being spaced apart from a vertical plane extending from the sidewall of the wiring substrate may be provided.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: November 1, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sunki Yun, Kwangkyu Bang, Jihong Kim, Eunji Yu, Kyungjae Kim, Yusuf Cinar
  • Patent number: 11482802
    Abstract: An apparatus includes a printed circuit board (PCB). The PCB includes a plurality of through-holes extending through the PCB between a PCB first surface and a PCB second surface that opposes the PCB first surface, where each through-hole includes a via extending from the PCB first surface to a depth within the through-hole that is distanced from the PCB second surface. An integrated circuit surface mount is connected at the PCB first surface with vias of the through-holes, and a cable interconnect assembly is surface mount connected at the PCB second surface. The cable interconnect assembly includes a plurality of contact pins, each contact pin extending within a corresponding through-hole and having a sufficient dimension to engage and electrically connect with the via of the corresponding through-hole so as to facilitate exchange of an electrical signal between the integrated circuit and the cable interconnect assembly.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: October 25, 2022
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Jason Visneski, George Edward Curtis, Mike Sapozhnikov, Peter Gunadisastra, Joel Goergen
  • Patent number: 11476030
    Abstract: An electric module with a planar transformer has a housing with an interior having an internal length and an internal height. The electric module additionally has a main printed circuit board with a first thickness, the main printed circuit board being equipped with at least one electronic component. The planar transformer is arranged on an additional printed circuit board with a second thickness, and the main printed circuit board has a recess which receives the additional printed circuit board. Additionally, the main printed circuit board and the additional printed circuit board are connected together via a connection.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: October 18, 2022
    Assignee: Phoenix Contact GmbH & Co. KG
    Inventor: Peter Scholz
  • Patent number: 11464117
    Abstract: A printed circuit board according to one embodiment of the present invention comprises an insulation board and a plurality of metal electrodes disposed on the insulation board, wherein: the plurality of metal electrodes include a first electrode and a second electrode; the first electrode includes a first surface parallel to an upper surface of the insulation board, a second surface facing the first surface, a first side surface disposed between the first surface and the second surface, and a second side surface facing the first side surface; a part of the first side surface and a part of the second side surface protrude toward the outside of the first electrode in the direction parallel to the upper surface of the insulation board; the first side surface protrudes farther in an area adjacent to the first surface than in an area adjacent to the second surface; and the second side surface protrudes farther in the area adjacent to the second surface than in the area adjacent to the first surface.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: October 4, 2022
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Hee Young Chung, Jae Man Park, Moo Seong Kim
  • Patent number: 11464107
    Abstract: An electronic device according to various embodiments may include: a board; a communication circuit disposed on one face of the board and configured to process a communication signal in a designated frequency band; an antenna disposed on the one face of the board or inside the board; a connector disposed on another face of the board, and including a first contact electrically connected to a first signal path through which the communication circuit is configured to transmit a signal to the antenna in a first direction, and a second contact electrically connected to a second signal path through which the communication circuit configured to transmit a signal to the antenna in a second direction; and conductive pads disposed on the another face of the board spaced apart from the connector, and including at least two first pads corresponding to the first contact and at least two second pads corresponding to the second contact.
    Type: Grant
    Filed: September 26, 2019
    Date of Patent: October 4, 2022
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chihwei Lee, Jungmin Park, Chonghwa Seo, Sungcheol Yoo, Jongwon Lee