Patents Examined by Ji H. Bae
  • Patent number: 11520392
    Abstract: Systems and methods for operating a power source as a heating device in an Information Handling System (IHS) are described. In some embodiments, an IHS may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: receive an indication to increase a temperature of the IHS and, in response to the indication, concurrently set a first power supply in source mode and a second power supply in sink mode.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: December 6, 2022
    Assignee: Dell Products, L.P.
    Inventors: John J. Breen, Jaehyeung Park, Lei Wang
  • Patent number: 11515797
    Abstract: A universal serial bus (USB) source device adapted to be coupled to a USB sink device via a USB cable, the USB source device including: a voltage bus (VBUS) terminal adapted to be coupled to a VBUS conductor of the USB cable; a configuration channel (CC) terminal adapted to be coupled to a CC conductor of the USB cable; a VOUT node coupled to the VBUS terminal and adapted to be coupled to a voltage supply; a controller circuit coupled to the VBUS terminal, the CC terminal and the VOUT node; a load circuit coupled to a discharge signal connection of the controller and to the VOUT node; and a resistor divider coupled to the VOUT node and the controller and adapted to be coupled to the voltage supply.
    Type: Grant
    Filed: March 26, 2021
    Date of Patent: November 29, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Deric Wayne Waters
  • Patent number: 11514169
    Abstract: Provided is an information processing apparatus that performs alteration detection processing on every occasion of starting a program, comprising a writing component capable of writing a setting indicating whether or not to perform the alteration detection processing to a first region referable by a first program that firstly performs the alteration detection processing on another program and to a second region not referable by the first program at a point when the first program is started. The first program performs the alteration detection processing in accordance with the setting written in the first region, and a second program capable of referring to the second region performs the alteration detection processing in accordance with the setting written in the second region.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: November 29, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shota Shimizu
  • Patent number: 11507167
    Abstract: In an embodiment, a processor includes a core domain with a plurality of cores and a power controller having a first logic to receive a first request to increase an operating voltage of a first core of the core domain to a second voltage, to instruct a voltage regulator to increase the operating voltage to an interim voltage, and to thereafter instruct the voltage regulator to increase the operating voltage to the second voltage. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: November 22, 2022
    Assignee: Daedalus Prime LLC
    Inventors: Ryan D. Wells, Itai Feit, Doron Rajwan, Nadav Shulman, Zeev Offen, Inder M. Sodhi
  • Patent number: 11493971
    Abstract: A method of power test analysis for an integrated circuit design including loading test vectors into a first sequence of flip-flops in scan mode, evaluating the test vectors and saving results of the evaluating in a second sequence of flip-flops in scan mode, reading results out of the second sequence of flip-flops to a scan chain, and calculating power generation based on the results. In one embodiment, the test vectors are received from an automatic test pattern generator.
    Type: Grant
    Filed: April 26, 2021
    Date of Patent: November 8, 2022
    Assignee: Synopsys, Inc.
    Inventors: Alexander John Wakefield, Khader Abdel-Hafez
  • Patent number: 11493970
    Abstract: Dynamic power supply voltage adjustment in a computing device may involve two stages. In a first stage, a first method for adjusting a power supply voltage may be disabled. While the first method remains disabled, a request to adjust the power supply voltage from an initial value to a target value using a second method may be received. The second method may be initiated in response to the request if a time interval has elapsed since a previous request to adjust the power supply voltage. In a second stage, the first method may be enabled when it has been determined that the power supply voltage has reached the target value.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: November 8, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Christopher Kong Yee Chun, Chandan Agarwalla, Dipti Ranjan Pal, Kumar Kanti Ghosh, Matthew Severson, Nilanjan Banerjee, Joshua Stubbs
  • Patent number: 11487344
    Abstract: Provided are a communication system, a communication device, and a power saving method, which enable a communication partner device to reliably recognize a communication unit switched to an ON state in response to reception of a predetermined signal from the communication partner device. A BLE chip transmits a BLE BD address when a BT3 chip is in an OFF state. A mobile terminal identifies a BT3 BD address associated with the BLE BD address received from a BLE chip based on stored correspondence data. A card reader switches the state of the BT3 chip to an ON state when the BLE chip receives a predetermined signal transmitted from the mobile terminal. The BT3 chip switched to an ON state starts to communicate data to be used for predetermined information processing to and from the mobile terminal.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: November 1, 2022
    Assignee: RAKUTEN GROUP, INC.
    Inventor: Wataru Suzukake
  • Patent number: 11467847
    Abstract: The disclosure provides a restart control device and a restart control method. The restart control device is disposed in an electronic device. The electronic device includes a keyboard and a restart button. At least one assigned key of a plurality of keys of the keyboard is set. The restart control device determines whether the at least one assigned key is pressed, and determines whether the restart button is pressed. When determining that the restart button is pressed and the at least one assigned key is pressed, the restart control device provides a restart control signal to cause the electronic device to perform a restart operation. The disclosure can prevent an unnecessary restart operation due to a single restart button being mistyped.
    Type: Grant
    Filed: March 13, 2020
    Date of Patent: October 11, 2022
    Assignee: ITE Tech. Inc.
    Inventors: Ching-Min Hou, An-Chi Tsai
  • Patent number: 11467650
    Abstract: The described embodiments include an electronic device that has a hardware controller and one or more hardware subsystems. The one or more hardware subsystems support an active state, a first low power state, and a second low power state. The first low power state and second low power states are separate low power states, with the first low power state being associated with a more rapid resumption of the active state than the second low power state. The hardware controller is configured to cause the one or more hardware subsystems to transition from the first low power state to the second low power state upon detecting an idle event that indicates that a user interaction is not likely to occur and to transition from the second low power state to the first low power state upon detecting an active event that indicates that a user interaction is likely to occur.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: October 11, 2022
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Alexander J. Branover
  • Patent number: 11455397
    Abstract: Systems, methods, and devices of the disclosure relate, generally, to secure boot assist for devices. In one or more embodiments, a first device includes firmware that needs to be verified as secure as part of a secure boot process, and a second device assists the first device to secure the secure boot process. In some embodiments the second device verifies security of the firmware responsive to security data provided by the first device, or verifies security of a program provided by the first device, the program for verifying security of the firmware. In some embodiments the second device provides a program for verifying security of the firmware to the first device.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: September 27, 2022
    Assignee: Microchip Technology Incorporated
    Inventors: Kerry Maletsky, David Paul Arnold, Nicolas Auguste Constant Schieli, Bryan Hunt
  • Patent number: 11449614
    Abstract: The present invention discloses an electronic apparatus having secure boot mechanism. The processing circuit executes steps outlined below. Operation-related data is stored in the storage circuit under a normal operation mode. The operation related data is stored in a host terminal. A first hash value is calculated according to the operation related data and is stored in a non-power-off area. A power of the non-power-off area is maintained to be turned on and a power of a power-off area is turned off under a lower power operation mode. The power is restored when the normal operation mode is restored and the operation related data is retrieved from the host terminal to calculate a second hash value. The first and the second hash values are compared such that the operation related data is determined to be valid and the electronic apparatus operates according to the operation related data when the first and the second hash values are matched.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: September 20, 2022
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Yi-Ruei Chen
  • Patent number: 11449120
    Abstract: Systems and methods for centralized power management of wireless user devices are disclosed. In embodiments, a method comprises: monitoring, by a computing device, battery charge levels for remote user devices; identifying, by the computing device, that a battery charge level of a first user device of the remote user devices is below a predetermined threshold value based on the monitoring; identifying, by the computing device, at least one in-use device from the remote user devices based on real-time data indicating that the at least one in-use device is in use by a user; and sending, by the computing device, an alert to the at least one in-use device based on the identifying the at least one in-use device, wherein the alert includes information about the first user device and information regarding the battery charge level of the first device.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: September 20, 2022
    Assignee: KYNDRYL, INC.
    Inventor: Cesar Augusto Rodriguez Bravo
  • Patent number: 11449246
    Abstract: A memory module may include a power source, a memory device, and a power controller. The power source provides at least one power supply voltage. The memory device operates by being supplied with at least one memory power supply voltage. The power controller supplies the at least one memory power supply voltage by changing a voltage level of the at least one power supply voltage based on operation modes of the memory device.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: September 20, 2022
    Assignee: SK hynix Inc.
    Inventor: Jung Hyun Kim
  • Patent number: 11451218
    Abstract: An integrated circuit includes a delay circuit and first and second interface circuits. The delay circuit delays a first timing signal by an internal delay to generate an internal timing signal. The first interface circuit communicates data to an external device in response to the internal timing signal. The second interface circuit transmits an external timing signal for capturing the data in the external device. An external delay is added to the external timing signal in the external device to generate a delayed external timing signal. The delay circuit sets the internal delay based on a comparison between the delayed external timing signal and a calibration signal transmitted by the first interface circuit.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: September 20, 2022
    Assignee: Rambus Inc.
    Inventors: Frederick A. Ware, Ely Tsern, Brian Leibowitz, Jared Zerbe
  • Patent number: 11411509
    Abstract: Systems and methods are provided to implement power supply units (PSUs) that are capable of operating on input power having different types of input voltage waveforms, including, but not limited to, pure sinusoidal waveforms, non-pure sinusoidal waveforms, and non-sinusoidal waveforms. Such a PSU may operate to continue supplying DC output power to a system load as long as the PSU is powered by any one of a variety of such different input power types, while at the same time also effectively monitoring for presence of input power provided to the PSU and shutting down the PSU in event of absence or termination of the input power to the PSU. Such a PSU may also automatically identify and adapt to changes between different types of input power while at the same time continuing to supply DC output power to a system load in an uninterrupted manner for as long as some type of input power is being provided to the PSU.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: August 9, 2022
    Assignee: Dell Products L.P.
    Inventors: Wei Cheng Yu, Geroncio O. Tan, Chi Che Wu, Merle Wood, III, Yung-Chang Chang, Ya-Tang Hsieh, Tsung-Cheng Liao
  • Patent number: 11405037
    Abstract: A driver circuit of a voltage translator includes a bias voltage generator, a drive voltage generator, an output voltage generator, and a filter circuit. The bias voltage generator is configured to receive a supply voltage, a first input voltage, and a feedback voltage, and generate a bias voltage. The feedback voltage controls an amplitude of the bias voltage. The drive voltage generator is configured to receive the supply voltage, the first input voltage, and the bias voltage, and generate a drive voltage. The output voltage generator is configured to receive the supply voltage, a second input voltage, and the drive voltage, and generate an output voltage. The drive voltage controls a slew rate of the output voltage. The filter circuit is configured to receive the output voltage, and generates and provides the feedback voltage to the bias voltage generator.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: August 2, 2022
    Assignee: NXP B.V.
    Inventor: Chandra Prakash Tiwari
  • Patent number: 11397588
    Abstract: A system to facilitate operating system (OS) installation is described. The system includes a server and rack controller, including one or more processors to generate an imaging service comprising an OS image container, transmit data via a first network to initiate a boot up process at a server and download an OS image included in the OS image container via a second network, wherein the second network is separate from the first network.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: July 26, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Charles L. Hudson, Daniel Nathan Cripe, Mike Chuang
  • Patent number: 11379247
    Abstract: Aspects of the disclosure can include computer-implemented methods and systems for comparing computer configuration information. The computer configuration information for a user's computer device can be monitored. Current computer configuration information for the user's computer device can be compared with previous computer configuration information for computer devices of clustered users in order to determine a best previous computer configuration information. The best previous computer configuration can be applied to the user's computer device.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: July 5, 2022
    Assignee: Capital One Services, LLC
    Inventors: Anh Truong, Jeremy Goodsitt, Vincent Pham, Fardin Abdi Taghi Abad, Mark Watson, Reza Farivar, Austin Walters
  • Patent number: 11374568
    Abstract: A semiconductor apparatus may include logic circuits and a control logic. The control logic may be configured to monitor characteristics of the logic circuits to allow the semiconductor apparatus to perform at different operating speeds.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: June 28, 2022
    Assignee: SK hynix Inc.
    Inventor: Woongrae Kim
  • Patent number: 11366486
    Abstract: According to various embodiments, an electronic device comprises a temperature sensor, a display, and a processor configured to operate by using a clock speed selected from among a plurality of clock speeds, wherein the processor may be configured to: execute a designated application by using one selected from among the plurality of clock speeds; check an external temperature by using the temperature sensor for at least some time during the execution of the designated application; when the external temperature falls to within a range of a first designated temperature, execute the designated application by using one selected from among the plurality of clock speeds according to a designated clock governor; and when the external temperature falls to within a range of a second designated temperature that is lower than the first designated temperature, execute the designated application by using one selected from among the plurality of clock speeds, except for some higher clock speeds, according to the designated
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: June 21, 2022
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Chunghyo Jung, Jung Nam, Jungeun Lee, Sangwon Chae