Abstract: Systems and methods for centralized power management of wireless user devices are disclosed. In embodiments, a method comprises: monitoring, by a computing device, battery charge levels for remote user devices; identifying, by the computing device, that a battery charge level of a first user device of the remote user devices is below a predetermined threshold value based on the monitoring; identifying, by the computing device, at least one in-use device from the remote user devices based on real-time data indicating that the at least one in-use device is in use by a user; and sending, by the computing device, an alert to the at least one in-use device based on the identifying the at least one in-use device, wherein the alert includes information about the first user device and information regarding the battery charge level of the first device.

Abstract: An integrated circuit includes a delay circuit and first and second interface circuits. The delay circuit delays a first timing signal by an internal delay to generate an internal timing signal. The first interface circuit communicates data to an external device in response to the internal timing signal. The second interface circuit transmits an external timing signal for capturing the data in the external device. An external delay is added to the external timing signal in the external device to generate a delayed external timing signal. The delay circuit sets the internal delay based on a comparison between the delayed external timing signal and a calibration signal transmitted by the first interface circuit.

Abstract: The present invention discloses an electronic apparatus having secure boot mechanism. The processing circuit executes steps outlined below. Operation-related data is stored in the storage circuit under a normal operation mode. The operation related data is stored in a host terminal. A first hash value is calculated according to the operation related data and is stored in a non-power-off area. A power of the non-power-off area is maintained to be turned on and a power of a power-off area is turned off under a lower power operation mode. The power is restored when the normal operation mode is restored and the operation related data is retrieved from the host terminal to calculate a second hash value. The first and the second hash values are compared such that the operation related data is determined to be valid and the electronic apparatus operates according to the operation related data when the first and the second hash values are matched.

Abstract: A memory module may include a power source, a memory device, and a power controller. The power source provides at least one power supply voltage. The memory device operates by being supplied with at least one memory power supply voltage. The power controller supplies the at least one memory power supply voltage by changing a voltage level of the at least one power supply voltage based on operation modes of the memory device.

Abstract: Systems and methods are provided to implement power supply units (PSUs) that are capable of operating on input power having different types of input voltage waveforms, including, but not limited to, pure sinusoidal waveforms, non-pure sinusoidal waveforms, and non-sinusoidal waveforms. Such a PSU may operate to continue supplying DC output power to a system load as long as the PSU is powered by any one of a variety of such different input power types, while at the same time also effectively monitoring for presence of input power provided to the PSU and shutting down the PSU in event of absence or termination of the input power to the PSU. Such a PSU may also automatically identify and adapt to changes between different types of input power while at the same time continuing to supply DC output power to a system load in an uninterrupted manner for as long as some type of input power is being provided to the PSU.

Abstract: A driver circuit of a voltage translator includes a bias voltage generator, a drive voltage generator, an output voltage generator, and a filter circuit. The bias voltage generator is configured to receive a supply voltage, a first input voltage, and a feedback voltage, and generate a bias voltage. The feedback voltage controls an amplitude of the bias voltage. The drive voltage generator is configured to receive the supply voltage, the first input voltage, and the bias voltage, and generate a drive voltage. The output voltage generator is configured to receive the supply voltage, a second input voltage, and the drive voltage, and generate an output voltage. The drive voltage controls a slew rate of the output voltage. The filter circuit is configured to receive the output voltage, and generates and provides the feedback voltage to the bias voltage generator.

Abstract: A system to facilitate operating system (OS) installation is described. The system includes a server and rack controller, including one or more processors to generate an imaging service comprising an OS image container, transmit data via a first network to initiate a boot up process at a server and download an OS image included in the OS image container via a second network, wherein the second network is separate from the first network.

Abstract: Aspects of the disclosure can include computer-implemented methods and systems for comparing computer configuration information. The computer configuration information for a user's computer device can be monitored. Current computer configuration information for the user's computer device can be compared with previous computer configuration information for computer devices of clustered users in order to determine a best previous computer configuration information. The best previous computer configuration can be applied to the user's computer device.

Abstract: A semiconductor apparatus may include logic circuits and a control logic. The control logic may be configured to monitor characteristics of the logic circuits to allow the semiconductor apparatus to perform at different operating speeds.

Abstract: According to various embodiments, an electronic device comprises a temperature sensor, a display, and a processor configured to operate by using a clock speed selected from among a plurality of clock speeds, wherein the processor may be configured to: execute a designated application by using one selected from among the plurality of clock speeds; check an external temperature by using the temperature sensor for at least some time during the execution of the designated application; when the external temperature falls to within a range of a first designated temperature, execute the designated application by using one selected from among the plurality of clock speeds according to a designated clock governor; and when the external temperature falls to within a range of a second designated temperature that is lower than the first designated temperature, execute the designated application by using one selected from among the plurality of clock speeds, except for some higher clock speeds, according to the designated

Abstract: An electronic device includes a requesting unit that requests a power supply apparatus to supply power, and a determination unit that determines whether the power supply apparatus is an authentic apparatus. In a case in which the determination unit determines whether the power supply apparatus is the authentic apparatus, after the requesting unit has requested the power supply apparatus to supply first power and the determination unit determines that the power supply apparatus is the authentic apparatus, the requesting unit then requests the power supply apparatus to supply second power higher than the first power.

Abstract: The present technology proposes techniques for generating globally coherent timestamps. This technology may allow distributed systems to causally order transactions without incurring various types of communication delays inherent in explicit synchronization. By globally deploying a number of time masters that are based on various types of time references, the time masters may serve as primary time references. Through an interactive interface, the techniques may track, calculate and record data relative to each time master thus providing the distributed systems with causal timestamps.

Abstract: The invention introduces a non-transitory computer program product for adjusting operating frequencies when executed by a processing unit of a device, containing program code to: collect an interface-activity parameter comprising information about data transmissions on a host access interface and/or a flash access interface; select one from multiple frequencies according to the interface-activity parameter; and drive a clock generator to output a clock signal at the selected frequency, thereby enabling the host access interface and/or the flash access interface to operate at an operating frequency.

Abstract: A system is provided which comprises: a first circuitry to generate a first clock signal; and a second circuitry to generate a second clock signal such that: a frequency of the second clock signal is varied over a clock pulse of the first clock signal, and an average of the frequency of the second clock signal over the clock pulse of the first clock signal is substantially maintained at a target frequency.

Abstract: An operation method of a communication node in an Ethernet-based vehicle network, the communication node including a regulator, a physical (PHY) layer unit, and a processor, includes outputting, by the processor, a first signal to initiate a supply of power to the communication node; outputting, by the processor, a second signal to initiate a transition of the communication node from a normal mode to a sleep mode; and transitioning, by the PHY layer unit, the communication node from the normal mode to the sleep mode when the second signal is received at the PHY layer unit from the processor.

Abstract: An operation method of a communication node in an Ethernet-based vehicle network, the communication node including a regulator, a physical (PHY) layer unit, and a processor, includes outputting, by the processor, a first signal to initiate a supply of power to the communication node; outputting, by the processor, a second signal to initiate a transition of the communication node from a normal mode to a sleep mode; and transitioning, by the PHY layer unit, the communication node from the normal mode to the sleep mode when the second signal is received at the PHY layer unit from the processor.

Abstract: An information recording apparatus has a drive unit to record digital information including digital contents; and a host unit to control reading and writing of the digital information for the drive unit. The host unit has a network processing unit to communicate with a server, a shadow determination unit to determine whether a shadow boot program to be executed prior to a boot program is executable, a shadow reading unit to read the shadow program from the drive unit when the shadow determination unit determines to be executable, a shadow execution unit to execute the shadow program, a server authentication unit to perform authentication with the server in accordance with a processing of the shadow program, and a password transmitter to transmit to the drive unit a password used for unlock of the drive unit when the authentication with the server is successful.

Abstract: It becomes possible to succeed in restarting a power supply unit. A power supply circuit includes the power supply unit which supplies DC power to a CPU, a switch which operates to cause a short-circuit to occur between a DC power supply and an input terminal of the power supply unit or to open a connection between the DC power supply and the input terminal of the power supply unit, a temperature measurement unit which measures a temperature and a processor which controls the switch to open the connection in a case of deciding that the DC power is not supplied to the CPU even when controlling the switch to cause the short-circuit to occur and controls the switch to cause the short-circuit to occur after a predetermined time elapses after controlling the switch to open the connection. The predetermined time is set on the basis of the temperature that the temperature measurement unit measures.

Abstract: A read clock generation circuit may include a multiplexer selecting one of divided clock signals in response to a selection signal and outputting the selected divided clock signal as a preliminary read clock signal, a detection circuit generating a detection signal for indicating detection timing of a divided clock signal having the fastest second edge after the first edge of a write clock signal, among the divided clock signals, based on a result of a comparison between the phases of the divided clock signals and the phase of the write clock signal, a counter generating the selection signal by counting the detection signal in response to the write clock signal, and a correction circuit outputting, as a read clock signal, a signal from which pulses corresponding to an invalid section have been removed, among the pulses of the preliminary read clock signal, in response to the detection signal.

Abstract: A power supply device for supplying power to a server and a power supply management system are provided. The device includes: a power supply control chip, a first connector, a voltage comparator, a counter and a resistance regulation circuit. The resistance regulation circuit includes a pull-up resistance circuit and a pull-down resistance circuit including multiple resistor branches and switches. An input terminal of the voltage comparator is connected to an address input terminal, the other input terminal of the voltage comparator is connected to a connection point of the resistance regulation circuit. An input terminal of the counter is connected to an output terminal of the voltage comparator, each output terminal of the counter is connected to one switch and controls a state of the switch. Each output terminal of the counter is connected to one address pin of the power supply control chip.