Patents Examined by Jiong-Ping Lu
  • Patent number: 12106972
    Abstract: Exemplary semiconductor processing methods may include providing a silicon-containing precursor to a processing region of a semiconductor processing chamber. A substrate may be disposed within the processing region. The substrate may include one or more patterned features separated by exposed regions of the substrate. The methods may include providing a hydrogen-containing precursor to the processing region of the semiconductor processing chamber. The methods may include forming a plasma of the silicon-containing precursor and the hydrogen-containing precursor. Forming the plasma of the silicon-containing precursor and the hydrogen-containing precursor may be performed at a plasma power of less than or about 1,000 W. The methods may include depositing a silicon-containing material on the one or more patterned features along the substrate. The silicon-containing material may be deposited on the patterned features at a rate of at least 2:1 relative to deposition on the exposed regions of the substrate.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: October 1, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Yifeng Zhou, Qian Fu
  • Patent number: 12100588
    Abstract: A method of post-deposition treatment for silicon oxide film includes: providing in a reaction space a substrate having a recess pattern on which a silicon oxide film is deposited; supplying a reforming gas for reforming the silicon oxide film to the reaction space in the absence of a film-forming precursor, said reforming gas being composed primarily of He and/or H2; and irradiating the reforming gas with microwaves in the reaction space having a pressure of 200 Pa or less to generate a direct microwave plasma to which the substrate is exposed, thereby reforming the silicon oxide film.
    Type: Grant
    Filed: June 27, 2023
    Date of Patent: September 24, 2024
    Assignee: ASM IP Holding B.V.
    Inventor: Toshiya Suzuki
  • Patent number: 12094687
    Abstract: The plasma processing apparatus has a plasma processing chamber where plasma processing of the sample is performed, and plasma power supply that supplies radio frequency electric power for generating plasma. The radio frequency electric power is time modulated by a pulse wave having a first period and a second period that are repeated periodically. The pulse wave of the first period has first amplitude and the pulse wave of the second period has second amplitude which is a limited value smaller than the first amplitude. The extinction of the plasma, which is generated during the first period having the first amplitude, is maintained during the second period having the second amplitude with a predetermined dissociation.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: September 17, 2024
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventors: Masayuki Shiina, Naoki Yasui, Tetsuo Ono
  • Patent number: 12077681
    Abstract: A CMP slurry composition for polishing a tungsten pattern wafer and a method of polishing a tungsten pattern wafer, the composition comprising a solvent; an abrasive agent; and a dendritic poly(amidoamine) containing a terminal functional group that has a pKa of about 6 or less.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: September 3, 2024
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Ji Ho Lee, Young Gi Lee, Soo Yeon Sim, Hyun Woo Lee, Chang Suk Lee, Jong Won Lee
  • Patent number: 12080562
    Abstract: A method for selectively etching a stack with respect to a mask is provided. An atomic layer etch is provided to at least partially etch the stack, wherein the atomic layer etch forms at least some residue. An ion beam is provided to etch the stack, wherein the ion beam etch removes at least some of the residue from the atomic layer etch.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: September 3, 2024
    Assignee: Lam Research Corporation
    Inventors: Samantha Siamhwa Tan, Tamal Mukherjee, Wenbing Yang, Girish Dixit, Yang Pan
  • Patent number: 12074076
    Abstract: A plasma processing apparatus and method with an improved processing yield, the plasma processing apparatus including detector configured to detect an intensity of a first light of a plurality of wavelengths in a first wavelength range and an intensity of a second light of a plurality of wavelengths in a second wavelength range, the first light being obtained by receiving a light which is emitted into the processing chamber from a light source disposed outside the processing chamber and which is reflected by an upper surface of the wafer, and the second light being a light transmitted from the light source without passing through the processing chamber; and a determination unit configured to determine a remaining film thickness of the film layer by comparing the intensity of the first light corrected using a change rate of the intensity of the second light.
    Type: Grant
    Filed: March 11, 2020
    Date of Patent: August 27, 2024
    Assignee: HITACHI HIGH-TECH CORPORATION
    Inventor: Soichiro Eto
  • Patent number: 12068170
    Abstract: Embodiments disclosed herein include methods of developing a metal oxo photoresist. In an embodiment, the method comprises providing a substrate with the metal oxo photoresist into a vacuum chamber, where the metal oxo photoresist comprises exposed regions and unexposed regions. In an embodiment, the unexposed regions comprise a higher carbon concentration than the exposed regions. The method may further comprise vaporizing a halogenating agent into the vacuum chamber, where the halogenating agent reacts with either the unexposed regions or the exposed regions to produce a volatile byproduct. In an embodiment, the method may further comprise purging the vacuum chamber.
    Type: Grant
    Filed: May 17, 2023
    Date of Patent: August 20, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Lakmal Charidu Kalutarage, Mark Joseph Saly, Bhaskar Jyoti Bhuyan, Madhur Sachan, Regina Freed
  • Patent number: 12068168
    Abstract: A method includes forming an etching mask to cover a mandrel, a first spacer, and a second spacer, and the first spacer and the second spacer are in contact with opposing sidewalls of the mandrel. The etching mask is then patterned, and includes a first portion covering the first spacer, a second portion covering the second spacer, and a bridge portion connecting the first portion to the second portion. The bridge portion has first sidewalls. A first etching process is performed on the mandrel using the etching mask to define pattern, and after the first etching process, the mandrel includes a second bridge portion having second sidewalls vertically aligned to corresponding ones of the first sidewalls. After the mandrel is etched-through, a second etching process is performed to laterally recess the second bridge portion of the mandrel.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: August 20, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Wen-Yen Chen
  • Patent number: 12060498
    Abstract: Provided is a hydrophilization treatment liquid for a semiconductor wafer surface, the hydrophilization treatment liquid being capable of imparting hydrophilicity to the semiconductor wafer surface. A hydrophilization treatment liquid for a semiconductor wafer surface, the hydrophilization treatment liquid comprising water and a compound represented by Formula (1) below, and a total content of the water and the compound represented by Formula (1) below being 95 wt. % or greater. R1O—(C3H6O2)n—H??(1) where R1 denotes a hydrogen atom, a hydrocarbon group having from 1 to 24 carbon atoms and optionally having a hydroxyl group, or a group represented by R2CO, the R2 denoting a hydrocarbon group having from 1 to 24 carbon atoms; and n indicates an average degree of polymerization of a glycerin unit in the parentheses, and is from 2 to 60.
    Type: Grant
    Filed: March 18, 2020
    Date of Patent: August 13, 2024
    Assignee: DAICEL CORPORATION
    Inventor: Yuichi Sakanishi
  • Patent number: 12057323
    Abstract: A substrate processing method includes providing a surface tension reducing agent as a gas onto a substrate, the substrate having an exposed photoresist layer and layer of developer on the exposed photoresist layer, and causing a bulk flow of the developer in order to remove the developer from the substrate.
    Type: Grant
    Filed: December 22, 2021
    Date of Patent: August 6, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sangjine Park, Seohyun Kim, Sukhoon Kim, Jihoon Jeong, Younghoo Kim, Kuntack Lee
  • Patent number: 12057319
    Abstract: A method is provided, including the following method operations: generating a deuterium plasma, the deuterium plasma including a plurality of energetic deuterium atoms; and directing one or more of the plurality of energetic deuterium atoms to a surface of a substrate, the surface of the substrate having a region of silicon dioxide, the region of silicon dioxide having an underlying silicon layer; wherein the one or more of the plurality of energetic deuterium atoms selectively etch the region of silicon oxide, to the exclusion of the underlying silicon layer.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: August 6, 2024
    Assignee: Lam Research Corporation
    Inventors: Juline Shoeb, Alexander Paterson
  • Patent number: 12057147
    Abstract: A method of forming a thin film structure involves performing one or more repetitions to form a template on a wafer. The repetitions include: depositing a layer of a template material to a first thickness T1; and ion beam milling the layer of the template material to remove thickness T2, where T2<T1, resulting in a layer of the template material with thickness T1?T2. The ion beam milling is performed at a channeling angle relative to a deposition plane of the wafer, the channeling angle defined relative to a channeling direction of a crystalline microstructure of the template material. After the repetitions, additional material is deposited on the template to form a final structure. The additional material has a same crystalline microstructure as the template material.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: August 6, 2024
    Assignee: Seagate Technology LLC
    Inventors: Tong Zhao, Li Wan, Michael Christopher Kautzky
  • Patent number: 12051587
    Abstract: A substrate processing apparatus includes a periphery removal unit configured to remove a peripheral portion of a film formed on a surface of a substrate; a profile acquisition unit configured to acquire a removal width profile indicating a relationship between a position in a circumferential direction of the substrate and a width of a portion of the substrate from which the film is removed; and a factor estimation unit configured to output factor information indicating a factor of an error in the width based on the removal width profile.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: July 30, 2024
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Hiroshi Nakamura, Masahide Tadokoro, Masashi Enomoto
  • Patent number: 12037517
    Abstract: The present disclosure provides a new corrosion control chemistry for use in ruthenium (Ru) chemical-mechanical polishing (CMP) processes. More specifically, the present disclosure provides an improved CMP slurry chemistry and CMP process for planarizing a ruthenium surface. In the CMP process disclosed herein, a ruthenium surface (e.g., a post-etch ruthenium surface) is exposed to a CMP slurry containing a halogenation reagent, which reacts with the ruthenium surface to create a halogenated ruthenium surface, and a ligand for ligand-assisted reactive dissolution of the halogenated ruthenium surface. Relative amounts of the halogenation agent and the ligand can be controlled in the CMP slurry, so as to provide a diffusion-limited etch process that improves pos-etch surface morphology, while providing high material removal rates.
    Type: Grant
    Filed: October 18, 2023
    Date of Patent: July 16, 2024
    Assignee: Tokyo Electron Limited
    Inventor: Paul Abel
  • Patent number: 12033866
    Abstract: Embodiments disclosed herein include methods of developing a metal oxo photoresist. In an embodiment, the method comprises providing a substrate with the metal oxo photoresist into a vacuum chamber, where the metal oxo photoresist comprises exposed regions and unexposed regions. In an embodiment, the unexposed regions comprise a higher carbon concentration than the exposed regions. The method may further comprise vaporizing a halogenating agent into the vacuum chamber, where the halogenating agent reacts with either the unexposed regions or the exposed regions to produce a volatile byproduct. In an embodiment, the method may further comprise purging the vacuum chamber.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: July 9, 2024
    Assignee: Applied Materials, Inc.
    Inventors: Lakmal Charidu Kalutarage, Mark Joseph Saly, Bhaskar Jyoti Bhuyan, Madhur Sachan, Regina Freed
  • Patent number: 12033863
    Abstract: The present disclosure provides a semiconductor fabrication apparatus. The semiconductor apparatus includes a processing chamber for etching; a substrate stage integrated in the processing chamber and being configured to secure a semiconductor wafer; a reflective mirror configured inside the processing chamber to reflect thermal energy from the heating mechanism toward the semiconductor wafer; and a heating mechanism embedded in the process chamber and is operable to perform a baking process to remove a by-product generated during the etching. The heating mechanism is integrated between the reflective mirror and a gas distribution plate of the processing chamber.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: July 9, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Han-Yu Lin, Yi-Ruei Jhan, Fang-Wei Lee, Li-Te Lin, Pinyen Lin, Tze-Chung Lin
  • Patent number: 12031077
    Abstract: The present disclosure provides an etching composition for a metal nitride layer and an etching method of a metal nitride layer using the same, and more particularly, to an etching composition for a metal nitride layer selectively etching the metal nitride layer, an etching method of a metal nitride layer using the etching composition, and a method of manufacturing a microelectronic device, the method including an etching process performed using the etching composition.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: July 9, 2024
    Assignee: ENF TECHNOLOGY CO., LTD.
    Inventors: Hyeon Woo Park, Seok Hyeon Nam, Myung Ho Lee, Myung Geun Song
  • Patent number: 12024780
    Abstract: A method of preparing a metal mask substrate includes providing a metal substrate. Next, a gloss is measured and obtained from the surface of the metal substrate. Next, the gloss is determined whether to be within a predetermined range. When the gloss is determined within the predetermined range, a photolithography process is performed to the metal substrate, where the predetermined range is between 90 GU and 400 GU.
    Type: Grant
    Filed: November 11, 2021
    Date of Patent: July 2, 2024
    Assignee: DARWIN PRECISIONS CORPORATION
    Inventors: Chi-Wei Lin, Wen-Yi Lin
  • Patent number: 12023707
    Abstract: Methods of temporarily enhancing the luster and/or brilliance of a piece of jewelry, a gem stone, or a piece of jewelry including a gem stone including applying a non-aqueous composition to the piece of jewelry, the gem stone, or the piece of jewelry including a gem stone.
    Type: Grant
    Filed: April 14, 2023
    Date of Patent: July 2, 2024
    Inventors: Paul Ashley, Brooke Ashley
  • Patent number: 12024651
    Abstract: A CMP slurry composition and a method of polishing a metal layer are provided. In some embodiments, the CMP slurry composition includes about 0.1 to 10 parts by weight of a metal oxide, and about 0.1 to 10 parts by weight of a chelator. The chelator includes a thiol compound or a thiolether compound.
    Type: Grant
    Filed: March 7, 2022
    Date of Patent: July 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Hung Liao, An-Hsuan Lee, Shen-Nan Lee, Teng-Chun Tsai, Chen-Hao Wu, Huang-Lin Chao