Patents Examined by John C. Loomis
  • Patent number: 5274793
    Abstract: In automatically synthesizing pipeline control, a first circuit indicates the data holding status of a register in response to a circuit description. A second circuit designates the register to receive output of a preceding register in response to the first circuit. A third circuit designates the preceding register to receive input in response to the first circuit without a circuit that indicates the data holding status of the preceding register. Logic responds to: a first file storing circuit description and data propagation behavior; a second file storing register data holding condition and status; and a third file storing logic templates that indicate whether data can be stored by the register, data holding status of the registers, data holding cycles of the registers, and cancel condition of data holding by the registers. The logic templates are assigned for the registers stored in the first file based on the contents of the second file.
    Type: Grant
    Filed: March 7, 1990
    Date of Patent: December 28, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Rikako Kuroda, Tsuguo Shimizu
  • Patent number: 5274797
    Abstract: A data processing unit includes a number of tightly coupled central subsystems, a number of peripheral subsystems, a main memory and a system management facility all coupled in common to a system bus. The system management unit has top priority on the system bus and includes centralized resources which provide apparatus for indicating the status of power and temperature, booting the subsystems, testing the subsystems, timing central subsystem functions, and allowing local and remote maintenance access to the subsystems. The system management facility receives commands from the central subystem to read from and write into the timers as well as to read the status of the overall system. The system management facility generates special commands to the central subsystem to indicate when the timers have decremented to ZERO as well as special commands to aid in hardware and software debugging.
    Type: Grant
    Filed: July 6, 1989
    Date of Patent: December 28, 1993
    Assignee: Bull HN Information Systems Inc.
    Inventors: George J. Barlow, Elmer W. Carroll, James W. Keeley, Wallace A. Martland, Victor M. Morganti, Arthur Peters, Richard C. Zelley
  • Patent number: 5269008
    Abstract: A data processor which includes a pipeline processing unit that processes instructions, including a POP instruction. The POP instruction includes a destination operand field and has a stack top as a source. The destination for the POP instruction can be register or a memory location. The pipeline processing unit is capable of performing pre-processing with respect to both the source and destination operands prior to execution by an execution stage of the pipeline processing unit. When the destination is a memory location, pre-processing of the destination uses information from the destination operand field. When the destination operand is a general register, steps for pre-processing of the destination are merged prior to the execution stage. Pre-processing of the source uses information from the stackpointer and is conducted prior to the execution phase in response to the decoding of the operation code field of the POP instruction.
    Type: Grant
    Filed: August 30, 1991
    Date of Patent: December 7, 1993
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Souichi Kobayashi, Masahito Matuo
  • Patent number: 5267145
    Abstract: The present invention is a method that provides productivity aids for developing, debugging, and troubleshooting ladder logic programs used in Programmable Logic Controllers (PLCs). The present invention discloses methods for searching ladder logic programs of programmable logic controllers for instructions, addresses, and symbols. The user can select an address or symbol in the ladder logic program and display on a computer a cross-reference list for the selected address or symbol. The cross-reference list shows all ladder logic instructions, and their locations in the ladder logic program, that use the selected address or symbol. An instruction location can be selected from the cross-reference list and the corresponding point in the ladder logic program will be displayed on the computer.
    Type: Grant
    Filed: February 14, 1992
    Date of Patent: November 30, 1993
    Assignee: ICOM, Inc.
    Inventors: Scott C. Zifferer, Joseph J. Menter, Jr.
  • Patent number: 5263165
    Abstract: The method of the present invention may be utilized to provide user access control for a plurality of resource objects within a distributed data processing system having a plurality of resource managers. A reference monitor service is established and a plurality of access control profiles are stored therein. Thereafter, selected access control profile information may be communicated between the reference monitor service and a resource manager in response to an attempted access of a particular resource object controlled by that resource manager. A resource manager may utilize this communication technique to retrieve, modify, or delete a selected access control profile, as desired.
    Type: Grant
    Filed: February 15, 1990
    Date of Patent: November 16, 1993
    Assignee: International Business Machines Corporation
    Inventor: Frederick L. Janis
  • Patent number: 5263156
    Abstract: A method and system for determining a conflict in a database transaction processing system between a specific transaction and one or more other transactions utilizes a certification system (30). The certification system (30) comprises a memory (32) which contains a log of database activity. The log is periodically broadcast over a channel (42) to a plurality of filters (43) which determine if there are conflicts between particular transactions. The inventive system and method perform optimistic concurrency control in a database transaction processing system in a highly efficient manner.
    Type: Grant
    Filed: December 20, 1990
    Date of Patent: November 16, 1993
    Assignee: Bell Communications Research, Inc.
    Inventors: Thomas F. Bowen, William H. Mansfield
  • Patent number: 5253347
    Abstract: In order to arbitrate competing requests made by master elements for shared resources in a data processing system in which the masters have controlled access to the resources through a communication bus, there is provided an arbitration unit coupled to the masters and to the resources through the communication bus. There is further provided logic structure in each master for generating and sending access request signals to the arbitration unit indicating that the master needs to direct, through the communication bus, a specified resource to perform an operation, the selected resource being identified by at last one of the access request signals. The arbitration unit, upon receiving the access request signal, arbitrates among competing access request signals, which may be concurrently received from a plurality of masters, according to predetermined priority criteria.
    Type: Grant
    Filed: August 13, 1992
    Date of Patent: October 12, 1993
    Assignee: Bull HN Information Systems Italia S.p.A.
    Inventors: Carlo Bagnoli, Guido Perrella, Tommaso Majo
  • Patent number: 5249274
    Abstract: In a model-based dynamically configured system, various processing components are created dynamically, interfaced to each other, and scheduled upon demand. A combination of data driven and demand-driven scheduling techniques are used to enhance the effectiveness of the dynamically configured system.
    Type: Grant
    Filed: October 24, 1990
    Date of Patent: September 28, 1993
    Assignee: Vanderbilt University
    Inventors: Janos Sztipanovits, Csaba Biegl, Gabor Karsai
  • Patent number: 5249292
    Abstract: A high speed data packet switching circuit has a software controlled primary processing unit, a plurality of network interface units connected to a plurality of networks for receiving incoming data packet streams and for transmitting outgoing data packet streams, a plurality of high speed data stream hardware control circuits for processing data packets in response to instructions from the primary processing unit and circuitry for interconnecting the primary processing unit, the interface units, and the data stream control circuits. The primary processing unit receives from the network interface unit at least a first one of the data packets of each new data packet stream and assigns that stream to be processed by one of the data stream control circuits without further processing by the primary processing unit.
    Type: Grant
    Filed: March 10, 1992
    Date of Patent: September 28, 1993
    Inventor: J. Noel Chiappa
  • Patent number: 5247679
    Abstract: A method and apparatus for linking and registering executable program formats (EPFs) so as to resolve all unresolved pointers. The invention sequentially attempts to link and initialize each EPF by resolving the unresolved pointers of each EPF. During each attempt to initialize an EPF, the EPF is assigned two states, a linkage state and an invocation state. If an EPF has all pointers to shared address space resolved, it is marked as INITIALIZED. Otherwise, it is marked as UNINITIALIZED. Further, an EPF is marked as SUSPENDED if it contains either unresolved pointers or pointers that reference another EPF that is marked as SUSPENDED. Otherwise, the EPF is marked as READY and is ready to execute. Data defining the unresolved pointers of each EPF that is not SUSPENDED is stored in a database. After each EPF is registered, the database is checked to determine if all the unresolved pointers in the shared linkage of a suspended EPF can now be resolved.
    Type: Grant
    Filed: February 20, 1990
    Date of Patent: September 21, 1993
    Assignee: Prime Computer, Inc.
    Inventor: Arun Kumar
  • Patent number: 5247666
    Abstract: A data management method for representing hierarchical functional dependencies. Data are modeled as assertions assigning values to attributes along a path of dependencies. Attributes are created by specifying their parents and are assigned identifiers which distinguish them from their siblings. Assertions are stored as storage sequences, which are identifiers corresponding to the attributes of a path alternating with values assigned to the attributes. Storage sequences are stored as indices of a hierarchical data structure. Application values are stored in the tree with predecessors, and deleted with dependents. Assertions are denoted by function assignments which assign values to function instances. Function instances may reference multiple values, and attributes may be created at any time. Data storage, access and deletion are efficient.
    Type: Grant
    Filed: May 28, 1991
    Date of Patent: September 21, 1993
    Assignee: Fawnwood, Inc.
    Inventor: Jonathan Y. Buckwold
  • Patent number: 5247659
    Abstract: A data processing system comprises a plurality of processing modules, and a central services module, connected by a system bus. Details of the expected system configuration and of a normal bootstrap load path are held in a non-volatile store. On power-up or system restart, the non volatile store is tested. If the test is satisfactory, a defined bootstrap procedure is executed; otherwise an undefined bootstrap procedure is performed. The defined bootstrap procedure compares the expected configuration with the actual system configuration. If they match, the bootstrap program is loaded from the normal load path. If they do not match, the undefined bootstrap procedure may be entered. In the undefined bootstrap procedure, the central services module searches for possible bootstrap load paths and attempts a load from one of these paths. The defined bootstrap is expected to be the normal procedure, and is faster.
    Type: Grant
    Filed: September 15, 1992
    Date of Patent: September 21, 1993
    Assignee: International Computers Limited
    Inventors: Michael W. B. Curran, Marek S. Pierkarski, Richard N. Taylor
  • Patent number: 5237681
    Abstract: Methods and apparatus are set forth for identifying the actual population of data within computer memory utilized to support a relational data base, where memory is defined herein as being "populated" if it is both allocated and actually filled with data. By identifying data population (thereby identifying unpopulated areas of memory versus simply making a determination of memory allocation without regard to how it is being used), utilities can be designed to recover memory resources, data base management techniques can be revised to more conservatively allocate memory, etc. Accordingly, memory resources can be more efficiently used and in certain instances the cost of adding memory to enhance a system can be delayed or eliminated.
    Type: Grant
    Filed: May 24, 1991
    Date of Patent: August 17, 1993
    Assignee: Bell Communications Research, Inc.
    Inventors: Jeremy S. Kagan, John N. Lutin, Leo S. Sanders
  • Patent number: 5226148
    Abstract: In a method of, and apparatus for validating character sequences, for example strings of characters generated by keyboards or keypads in telephone systems, computers, and the like, increased speed and reduced memory requirements are achieved by comparing the characters with a database representing valid sequences of characters, the database comprising one or more segments each comprising valid character sequences. A potential range of characters is extrapolated from a character of the input character sequence taking into account possible values of possible succeeding characters. This potential range of sequences is than compared with a database segment. If there is intersection between the potential range and one of the valid character sequences, and there is no succeeding character in the input character sequence, the input character sequence is determined to be valid.
    Type: Grant
    Filed: December 21, 1989
    Date of Patent: July 6, 1993
    Assignee: Northern Telecom Limited
    Inventor: Timothy J. Littlewood
  • Patent number: 5226155
    Abstract: In a memory area of a data memory in an IC card, data file definition data for defining a data file is stored from one end of the memory area, and a data file is defined from the other end of the memory area. Area definition data for defining an area in a data file is stored from one end of a data file, and an area is defined from the other end of the data file.
    Type: Grant
    Filed: August 24, 1989
    Date of Patent: July 6, 1993
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuo Iijima
  • Patent number: 5214781
    Abstract: A system is provided for managing a storage medium on which management information, data and associated history information are recorded. The system packs and records history information pieces, which have been recorded on a plurality of sectors, on a single physical sector, or the management information is backed up at a predetermined time point, so as to reduce overhead required for reproduction of the history information during reconstruction of the management information and to speed up the reconstruction processing of the management information. Particularly, achievable high-speed processing for reconstruction of the management information during initialization leads to efficient management of an external storage unit of a document filing system or a computer using the management system.
    Type: Grant
    Filed: October 9, 1991
    Date of Patent: May 25, 1993
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Tadashi Miki, Masayuki Kozuka
  • Patent number: 5212789
    Abstract: A method and apparatus for updating application databases in real time in a distributed transaction processing environment, such as a service control point, without adversely affecting the throughput of transaction processing or losing substantially any conversational transactions that are being processed while updating is occurring. Specifically, two versions, e.g. an old and a new version, of the application databases exist within a memory device, e.g. a shared disk farm. After the start of a "transfer time period", all transactional messages associated with transactions that were initiated after the start of this period are processed using only the new versions of the application databases, while all transactional messages that are associated with transactions that were initiated prior to the start of this period are processed using the old versions thereof.
    Type: Grant
    Filed: October 12, 1989
    Date of Patent: May 18, 1993
    Assignee: Bell Communications Research, Inc.
    Inventor: Vito Rago
  • Patent number: 5212785
    Abstract: A method and apparatus for controlling data flow between a computer and a group of memory devices arranged in a particular logical configuration. The system includes a group of first level controllers and a group of second level controllers. The first level controllers and the second level controllers work together such that if one of the second level controllers fails, the routing between the first level controllers and the memory devices is switched to a properly functioning second level controller without the need to involve the computer in the rerouting process. The logical configuration of the memory devices remains constant. The invention also includes switching circuitry which permits a functioning second level controller to assume control of a group of memory devices formerly primarily controlled by the failed second level controller.
    Type: Grant
    Filed: April 6, 1990
    Date of Patent: May 18, 1993
    Assignee: Micro Technology, Inc.
    Inventors: David T. Powers, David H. Jaffe, Larry P. Henson, Hoke S. Johnson III, Joseph S. Glider, Thomas E. Idleman
  • Patent number: 5204951
    Abstract: Apparatus and method for increasing efficiency of command execution from a host processor over an SCSI bus. Arbitration, selection and message out functions of SCSI protocol are implemented using a background arbitration state machine. Additional protocol functions are implemented in a foreground state machine. When the host processor issues a command for access to the SCSI bus, the background state machine can be programmed before the foreground machine completes the protocol function for a previous command. Thus, the background state machine is ready to arbitrate for access to the bus at the very next bus free condition.
    Type: Grant
    Filed: October 2, 1989
    Date of Patent: April 20, 1993
    Assignee: International Business Machines Corporation
    Inventors: Don S. Keener, Andrew B. McNeill, Edward I. Wachtel
  • Patent number: 5202982
    Abstract: In the method and apparatus of the present invention a file to be added to the database is given a unique name that is dependent upon the contents of the file such that, when the contents of the source file changes, the name of the database component file to be added to the database also changes. Conversely, if two files of the same name have the same information contained therein, the same file name will be generated and the duplication of information in the database is prevented by providing a simple test that checks for the existence of the name of the database file before the generation and addition of the new file to the database. If the file name exists in the database, information is already contained in the database and the file is not generated and added to the database information. Preferably the name of the file is generated by computing a hash value from the contents of the file concatenating the hash value to the name of the source file.
    Type: Grant
    Filed: March 27, 1990
    Date of Patent: April 13, 1993
    Assignee: Sun Microsystems, Inc.
    Inventors: Wayne C. Gramlich, Soren J. Tirfing