Abstract: A system for measuring a first period of time, for example a period between a pair of pulses, with an extraordinarily high degree of accuracy. Two ramp voltages of different slopes are started in synchronism with the first occurring pulse. The ramp with the largest slope is then sampled and held on receipt of the second occurring pulse. A counter counts a clock of a moderate pulse repetition frequency (PRF) during a second period occurring between the time the ramps are started and the time the amplitude of the ramp of the smaller slope becomes equal to the sampled amplitude of the ramp of the larger slope. The count stored in the counter at the end of the second period is then directly proportional to the first period or is equal thereto. Moreover, the count can be far more precise than it would be by counting the clock PRF during the first period.

Abstract: An apparatus for collecting and recovering medical data which allows a number of different patients to be identified by an ID card or an ID label and has a plurality of keyboard printing units which receive medical data from the particular patient and includes a memory which receives the individual medical data relative to the individual patient identified by the patient's number and the examination number and includes a system for transferring the data in usual form to an output unit after the necessary data has been recorded in the memory. The apparatus further includes a control unit for controlling the input and output units as well as the memory unit and includes error correcting systems.

Abstract: A machine which classifies objects on the basis of an analysis of certain features related to that object, an example of which is a blood cell analyzer/counter, is subject to a number of random errors in recognition, which errors on the average tend to appear as a systematic bias. A correction device corrects for these errors to provide a more accurate count.

Abstract: A digital computer arrangement is disclosed including a central processing unit, a plurality of peripheral units coupled to a peripheral bus, a memory access controller, a first memory bus, and a second memory bus. The first memory bus serves a first plurality of memory units and the second memory bus serves a second plurality of memory units. The memory access controller selects which of the peripheral units may use the peripheral bus to access a memory bus during a particular time interval. If use of a particular memory bus is requested by a peripheral unit for an interval in which that memory bus is required by the central processing unit, the memory access controller preempts the usage of that memory bus by the peripheral unit for the interval.

Abstract: A traffic signal control device for applying traffic signals for switching signals at a multiplicity of intersections. The traffic signal control device comprises a core memory in which a group of variable data such as steps, elapsed times, a group of fixed data such as step periods, offsets, splits, and a group of instruction data are stored. A timing pulse generating circuit for generating percent pulses, seconds pulses, for varying values of variable data and a control device for incrementing the value of one of the variable data when the value of said one of variable data equals to the value of corresponding fixed data are employed.

Abstract: In a radio or television receiver containing an automatic station finder with a digital counter, a clock generator, and a digital-to-analog converter forming the tuning voltage for the varactors, a recall memory consisting of two series-connected parallel memories is connected in parallel with the digital counter. At a stop signal from the automatic station finder the first parallel memory records the instantaneous count of the digital counter; at an automatic-station-finding start signal the second parallel memory, to which the parallel input of the digital counter is connected, records the contents of the first parallel memory.

Abstract: A line scale scanner utilizing three photoelectric cells, offset relative to one another within a space no larger than one divisional unit of the scale, to be operated as the scale moves to divide each scale unit into six increments. Each of the six increments can be obtained as the line scale moves forward or backward, providing 12 combinations from which a discriminator forms electric pulses. The pulses indicate if the increment is odd or even and if it occurred as the line scale moved forward or backward. The odd and even pulses which are provided on two different outputs of the discriminator can then be fed to counters which analyze them to determine if a system malfunction has occurred. The counters can be connected to provide the same output when the system is operating without error. Likewise, the counters can be connected to count complementary when no error has occurred. A circuit is also disclosed which provides a defect signal when a malfunction of the system occurs.

Abstract: Apparatus for presetting an electric pulse counter to a given count without any action on its parallel input terminals and/or its parallel output terminals. The apparatus comprises a pulse generator which is connected, during a preset operation, to the count input of the counter through an electronic gate. The electronic gate is controlled by an auxiliary circuit. In one embodiment, the auxiliary circuit comprises as many voltage comparators as flip-flops in the counter. The voltage comparators enable the electronic gate as long as the states of the flip-flops are different from the desired states. In another embodiment, the auxiliary circuit mainly comprises a divider by N, N being the desired count. In a first step, the divider is reset and the counter is caused to count up to its maximum count and to deliver an overflow pulse when it resets. In a second step starting with the overflow pulse, both counter and divider count up from zero and the electronic gate is closed when the divider reaches the N-count.

Abstract: An unattended printing system in which the operator keys in a page line count defining the number of lines to be printed on a page from codes derived from a shift register memory which is automatically loaded from a pack feed magnetic read/recorder. Logic is provided which, in the event that the text being played out does not equal a full page, automatic indexes or carrier returns will be generated to cause the page to be fed such that the printing mechanism is then in alignment with the first line of the next page. While page feeding occurs the memory is also automatically cleared; a new card is fed and reading of new codes into the shift register initiated. In addition, in the event that the margins on the machine which is being used for playout differ from the margins which were used during source recording, in the event that a fewer number of lines of text result, the proper number of indexes for this fewer number of lines to cause proper alignment on the next page will be output.

Abstract: Method and apparatus for selecting data wherein the acceptability of the data is a function of a measurable quality, such as duration, of a specific event relative to the current average, or other statistical threshold, of such quality of a number of events. The magnitude of event characteristic is measured and provided as a signal. Deviations from the threshold are provided to an up-down counter in which the threshold is stored and, accordingly, updated. If the event magnitude, as registered in an up-counter, exceeds the updated threshold stored in the up-down counter, a digital comparator indicates this and up counts the up-down counter to the extent the event exceeds the threshold. If the event magnitude is less than the stored threshold, the up-down counter is down-counted an amount corresponding to the difference between the event magnitude and the stored threshold. A currently updated threshold is thus maintained in the up-down counter.

Abstract: A sequence control monitoring device is disclosed which receives from controlled-objects operated under a sequence control system signals independently representing the operating states of the individual controlled-objects. The monitoring device counts the time duration for which each input signal remains in its on or off state, compares the counted value with a preset value, and thus judges whether the operating state of the controlled-object is correct.

Abstract: A web or sheet material supply reel is monitored for minimum diameter in anticipation of a continuously running splice from an exhausted supply reel to a fresh supply reel. The monitoring technique is to combine electrical pulses proportional to the passage of a linear quantity of material with pulses proportional to the number of arcuate reel degrees simultaneously rotated past a reference point. The reel arc generated pulses are accumulated by a digital counter during the interim between linear quantity pulses. When the accumulated count reaches a predetermined magnitude between linear quantity pulses, a signal is emitted to initiate the splice transfer.

Abstract: An operation control system for a micro-computer comprises a control unit and a register unit. A micro instruction stored in a read only memory of the control unit is fetched, a one word instruction is divided into six time stages and the divided instructions are transmitted to the register unit in a time-multiplexed format with each stage being a fundamental time unit, while the register unit decodes the micro instructions of the fundamental units fed thereto and executes the micro instructions of the fundamental units in a manner to overlap in time.

Abstract: An improved circuit at the input of a high frequency counter includes a bias-sensitive binary divider in the input stage and includes circuitry for altering the bias on the binary divider to change sensitivity automatically as a function of applied signal level.

Abstract: Circuitry for the correction of error occasioned during the counting of platelets in a hematology system. A coincidence corrected platelet count is provided as an input to a rate counter which provides a plurality of output signals representative of different percentages of the input count. A read-only memory is employed to store data representing correction factors for different hematocrit values. Gating circuitry is enabled by output signals from the read-only memory representing a selected hematocrit correction factor, the enabled gate circuits providing pulses representative of selected percentages of the input count and which are combined to provide an output pulse train which is the corrected platelet count.

Abstract: An information processing device for processing instructions, including branch instructions, is characterized in that a route memory is provided for storing branch target addresses of a plurality of branch instructions and branch target instructions in corresponding relationship to the branch target addresses, and the route memory is referenced by the address in a given instruction, whereby the branch target instruction at the corresponding branch target address is read out.

Abstract: A medialess dictation system for storing and retrieving audio information, and eliminating media handling requirements as well as recording and transcribing delays. During a recording operation, incoming audio information from an operator station is converted to digital information and temporarily stored in a limited capacity store. From the temporary store, this information is indexed and stored in a primary store. For a transcribing or playback operation wherein desired portions of previously recorded and indexed information are to be retrieved, the desired indexed information is addressed and transferred back to the temporary store. Thereafter, it is converted back to audio and output through the operator station.

Abstract: In a data processing system having independently operating asynchronous processors, apparatus is disclosed which provides for interprocessor synchronization and/or information exchange. Synchronization interlocks and controls are provided for both identifying shared resources of a control processor and an input/output controller (IOC) processor and for obtaining control over these shared resources. If a conflict situation for any one of the shared resources arises, apparatus is disclosed whereby the IOC processor is provided the capability of assuming control over the shared resource even though the central processor has control over it. One of the shared resources is an interprocessor communication register which allows communication of control information between both the central processor and the IOC processor and from the central processor to the peripheral processor over a shared bus.

Abstract: An electronic calculator system of the type having a keyboard input and a visual display is implemented in MOS/LSI semiconductor chips having a data memory, an arithmetic unit, a read-only-memory for storing instruction words, and control circuitry for operating the system in response to keyboard inputs by selecting addresses for instructions from the read-only-memory, all of which is located in monolithic semiconductor units. A technique is provided for turning off the display after a selected time period by holding an instruction word in an instruction register while repeatedly incrementing an address register for the ROM until it overflows, then branching to an address defined in such instruction word. This is repeated until the selected time period is reached.

Abstract: The common control equipment of a switching system including a plurality of functional block circuits is comprised of equipment for selectively actuating said functional block circuits in a desired sequence, which sequence is stored in a memory in said equipment. Several memories are provided to enable several sequences to be stored simultaneously so that any stored sequence can be actuated. In compliance with the type of connection requested by a call, the control equipment selects the memory equipment which stores the sequence that establishes the requested connection.