Abstract: In accordance with an embodiment, a method of driving a switching transistor includes receiving an activation signal for the switching transistor and generating a sequence of random values. Upon receipt of the activation signal, a control node of the switching transistor is driven with a drive strength based on a random value of the sequence of random values.

Abstract: Disclosed herein is a power supply apparatus for a sub-module controller of a Modular Multilevel Converter (MMC), which supplies driving power to the sub-module controller of an MMC connected to a High Voltage Direct Current (HVDC) system. The power supply apparatus includes a bridge circuit unit including N (N?2, integer) energy storage units for storing a DC voltage in series-connected sub-modules in the MMC and multiple power semiconductor devices connected in parallel with the N energy storage units in a form of a bridge; and a DC/DC converter for converting a voltage output from output terminals formed between both ends of n (1?n<N) series-connected energy storage units, among the N energy storage units, into a low voltage and supplying the low voltage to the sub-module controller.

Abstract: The present invention disclosure provides a multiplier and a power factor correction circuit which the multiplier is applied. The multiplier comprises a Gilbert multiplier circuit comprising a first differential input stage, a second differential input stage and an output stage; a first differential voltage conversion circuit; a second differential voltage conversion circuit; and a bias current generating circuit; Wherein said output stage comprises: a current mirror unit comprising two current input terminals and a current output terminal; and a feedback control unit configured to ensure that the current output terminal does not output current when the voltage difference received by the multiplier is zero. The present invention is advantageous in improving the linearity of the multiplier and the accuracy of the output current of the multiplier output current.

Abstract: An antenna board for wirelessly delivering power, including a connector configured to: (i) connect with any one of a plurality of electrical ports of a transmitter board, including a first electrical port of the plurality of electrical ports, and (ii) receive an electrical signal from the first electrical port when the connector is connected with the first electrical port. The antenna board further includes antenna element(s) configured to, when the connector is connected with the first electrical port, transmit radio frequency (RF) power transmission waves using the electrical signal received from the first port. Each of the RF power transmission waves constructively interferes with at least one other RF power transmission wave of the RF power transmission waves at a receiver within a transmission field of the antenna board and energy from the RF power transmission waves is used by the receiver to power and/or charge the receiver.

Abstract: A wireless power transmitter includes a sensor configured to sense an object, a power transmitter configured to wirelessly transmit power to a wireless power receiver, and a controller configured to determine whether the object is the wireless power receiver, and control the power transmitter to wirelessly transmit power to the wireless power receiver upon the object being determined to be the wireless power receiver, wherein the sensor and the power transmitter comprise separate coils.

Abstract: An apparatus includes an integrated circuit (IC), which includes complementary metal oxide semiconductor (CMOS) circuitry that includes a pull-up network coupled to a supply voltage and at least one input signal. The IC further includes a first metal oxide semiconductor (MOS) transistor coupled to the pull-up network and to a first bias voltage to reduce a gate-induced drain leakage (GIDL) current of the CMOS circuitry.

Abstract: A three input voltage comparator provides termination of a pulse width modulation (PWM) output in a switched mode power supply. Shutdown of the PWM signal occurs when a sense current from the switching transistors exceeds either or both of the limit and error current references. The three input voltage comparator replaces the generally used two input voltage comparator and also eliminates the necessity of having to provide a voltage clamping circuit on the output of the voltage error amplifier in the switched mode power supply. The three input voltage comparator may also comprise selectable polarity control for more versatile integration of it into a switched mode power supply design.

Abstract: Systems and techniques are provided for beamforming for wireless power transfer. A position of a second wireless power transfer device relative to a first wireless power transfer device may be determined. A beam may be simulated as being transmitted from the position of the second wireless power transfer device. Phases of a wave front of the simulated beam that would be received by elements of the first wireless power transfer device may be determined. A control signal for each of the elements for which phases were determined may be generated based on the determined phase of the wave front that would be received at the element. The control signal for each of the elements for which phases were determined may be supplied to the elements for which phases were determined. A waveform may be transmitted from the elements for which phases were determined based on the supplied control signal.

Abstract: A semiconductor device drive circuit includes a first drive circuit and a second drive circuit. The first drive circuit generates a control signal for controlling a voltage-controlled switching element. The first drive circuit generates a control signal in synchronization with a voltage signal input to the first drive signal. The first drive circuit has an output current capability corresponding to a magnitude of the voltage signal. The second drive circuit outputs a voltage signal to the first drive circuit. The second drive circuit includes an output adjustment circuit that adjusts the magnitude of the voltage signal.

Abstract: According to a first example aspect there is provided a charge pump circuit that includes a first chopper circuit configured to switch first and second chopper circuit outputs between first and second chopper circuit inputs at a chopping frequency, wherein successive input signals at the first chopper circuit input are output alternatively at the first and second chopper circuit outputs in successive cycles of the chopping frequency and successive input signals at the second chopper circuit input are output alternatively at the second and first chopper circuit outputs in successive cycles of the chopping frequency. A differential charge pump is configured to receive the signals output from the first and second chopper circuit outputs and produce corresponding first and second charge pumped signals.

Abstract: The present invention relates to a lighting lamp system and a power distributor used for the lighting lamp system. The lighting lamp system comprising: a plurality of lighting lamps; a main converter for converting external alternating-current power into direct-current power; a distributor provided to be isolated from the lighting lamps and supplying power for lighting to the plurality of lighting lamps by converting the direct-current power from the main converter; and a controller for controlling the operations of the lighting lamps by controlling the distributor.

Abstract: A method and apparatus for performing current control for an integrated circuit are described. In one embodiment the apparatus comprises core logic coupled to receive a first current; a clock generator to generate a first clock signal; and a closed loop current controller coupled to the clock generator and coupled to provide a second clock signal to the core logic based on the first clock signal, the current controller to control an amount of the first current received by the core logic by changing the first clock signal to generate the second clock signal.

Abstract: A voltage-regulator circuit with a current-adder output node for supplying a load with a load current at a regulated output voltage includes an analog portion sensitive to the output voltage and including one or more reference-voltage sources. The analog portion applies to the current-adder node a first current that is a function of the difference between the output voltage and the reference voltage. A digital portion including an integrator is sensitive to the first current. The integrator is coupled to a current source for applying to the current-adder node a second current so that the first current and the second current supply on the current-adder output a load current at the aforesaid regulated output voltage.

Abstract: This disclosure provides systems, methods and apparatus for reducing harmonic emissions. One aspect of the disclosure provides a transmitter apparatus. The transmitter apparatus includes a driver circuit characterized by an efficiency and a power output level. The driver circuit further includes a filter circuit electrically connected to the driver circuit and configured to modify the impedance of the transmit circuit to maintain the efficiency of the driver circuit at a level that is within 20% of a maximum efficiency of the driver circuit when the impedance is within the complex impedance range. The filter circuit is further configured to maintain a substantially constant power output level irrespective of the reactive variations within the complex impedance range. The filter circuit is further configured to maintain a substantially linear relationship between the power output level and the resistive variations within the impedance range.

Abstract: An input buffer circuit is disclosed, which relates to a technology for a receiver circuit including a plurality of input buffers having different characteristics. The input buffer circuit includes a first buffer configured to output a first input signal by buffering a command address received based on a flag signal, a second buffer configured to output a second input signal by buffering the command address based on the flag signal, a first delay matching circuit configured to output a first matching signal by delaying the first input signal by a first delay time, a second delay matching circuit configured to output a second matching signal by delaying the second input signal by a second delay time, and a selection circuit configured to select any one of the first matching signal and the second matching signal based on a selection signal.

Abstract: Methods and apparatuses for improved efficiency of power transfer across an inductive charging interface by adaptively changing the impedance of the receive coil in response to changes in load conditions during inductive power transfer are disclosed.

Abstract: Radio-frequency signals may be switched between signal lines or signal ports in RF circuits using PIN diodes and PIN-diode driving circuitry. To achieve switching, the PIN diodes are biased at voltages as high as 20 volts or more. Circuitry for biasing PIN diodes is described that uses a low-voltage power source and a single-bit control line.

Abstract: An apparatus (400A, 400B, 400C, 400D, 500A, 500B, 800) supplies power to an output thereof. The apparatus includes: an isolation transformer (110) and a rectifier (120). The isolation transformer has a parasitic capacitance (Cp) between one of its input terminals (1S/1F) and one of its output terminals (2S/2F). The rectifier has a pair of input terminals connected to the output terminals of the isolation transformer, and a pair of output terminals connected across the apparatus' output. The rectifier includes a plurality of diodes (D1/D2/D3/D4) connected in a bridge. The apparatus also includes a compensation device for compensating for an increase in an output voltage across the output of the apparatus due to a charge pump effect of the parasitic capacitance. The compensation device includes at least one compensation capacitor (410, 510/520, 810/812) connected across one of the diodes of the bridge.

Abstract: Provided is a semiconductor device which is testable even with an inspection apparatus having low current drivability, and includes an output terminal which is also used as a test terminal and an output driver having high current drivability. The semiconductor device includes a plurality of voltage determination circuits connected to the output terminal of the semiconductor device, and have threshold values that are different from each other, an encoding circuit connected to the plurality of voltage determination circuits, and configured to output an encoded signal, and a mode switching circuit configured to output a mode signal to an internal circuit depending on the encoded signal and a signal from the internal circuit.

Abstract: A switch bias control circuit includes a level shifter and voltage regulator circuitry configured to receive a voltage reference signal, provide a first voltage output at a first node and provide a second voltage output at a second node, the first node and the second node being at least partially isolated from one another. coupling circuitry couples the first node to the level shifter and couples the second node to a negative voltage generator.