Abstract: The jitter determining apparatus uses only a jittery clock signal of period T.sub.b recovered from the received data signal to determine peak to peak jitter J.sub.pp and jitter distribution. The apparatus includes an AND gate having a pair of inputs. The inputs are coupled to a first signal which is the jittery clock signal delayed by a fixed amount nT.sub.b where n is preferably greater than 5, and to a second signal which is a jittery pulse signal generated from the jittery clock signal. The second signal is also controllably delayed by a factor greater than twice the jitter J.sub.pp. The AND gate produces output pulses when coincidence occurs between the two signals as the delay of the second signal is selectively varied. A counter counts the pulses for each selected delay position and thus provides the peak to peak time jitter J.sub.pp of the clock signal.
Abstract: A cached multiprocessor system operated in an ordered pipeline timing sequence in which the time slot for use of the cache is made long enough to permit only one cache access. Further, the time slot for data transfers to and from the processors succeeds the time slot for accessing the cache. The sequence is optimized for transactions that require only one cache access, e.g., read operations that hit the cacgenerally require a second cache access in order to update or allocate the cache. These transactions are entered into a queue with order preserved prior to permitting a second access to the cache. Also, a duplicate tag store is associated with the queue and maintained as a copy of the tag store in the cache. Whenever a cache tag is to be changed, a duplicate tag in the duplicate tag store is changed prior to changing the cache tag. The duplicate tag store thus always provides an accurate indication of the contents of the cache.
Abstract: A frequency/speed controller is provided for controlling the frequency or speed of a device by comparing the frequency of the device to a known reference frequency and matching the device frequency with the reference frequency. The controller uses an up/down counter whose count at any given time is the digital quantized form of ##EQU1## where f.sub.1 and f.sub.2 are the frequencies to be matched.
Abstract: A hand held logic probe serially clocks applied data bits into a shift register in response to a user actuated thumb switch. The shift register is coupled to a hexidecimal/octal converter which drives a digital display. The display is reset in response to the user actuating the thumb switch for more than a predetermined time period.
Abstract: A scanning system includes a pair of buffer memories for alternately accumulating strings of signals which may contain bar coded label data. Candidate selection logic circuits examine incoming signals to generate a candidate signal when a string of signals satisfies gross logical tests. A control counter responds to the incoming signals and to the candidate signal to select an alternate buffer memory only when the active memory is fully loaded and contains at least part of a label candidate. The contents of the fully loaded memory are transferred to a processor for further analysis while incoming signals are routed to the alternate memory.
Abstract: The present invention pertains to a method and synchronizer circuit for controlling the counting operation of a timer/counter circuit to synchronize the read and update functions of this circuit. The synchronizer circuit is capable of establishing a search period prior to the occurrence of each update function. During each such search period, the synchronizer circuit searches for a read command. If a read command is not received by the synchronizer circuit within the search period preceding the occurrence of an update function, the synchronizer circuit allows the update function to occur without delay. If a read command is received by the synchronizer circuit within the search period preceding the occurrence of an update function, the synchronizer circuit delays the start of the update function until after termination of the read command that was received within the search period.
Abstract: Time logging apparatus comprising a microprocessor programmed to distribute clock signals within memory locations corresponding to a plurality of primary accounts, each having an associated account key, is disclosed. The account to which any clock signal is added is determined exclusively by the last activated account key. A numerical display responds to actuation of function and/or account keys by displaying a time interval corresponding to the count in a selected memory location, the total time chargeable to the primary accounts, or additional time to be charged to a selected account. An indicator lamp adjacent each account key indicates whether the account has activity associated therewith at any time, and a removeable form having spaces arranged to be aligned with the account keys and lamps is provided for identifying the accounts and time intervals chargeable to each account.
Abstract: An information recording system is provided with a page buffer for storing one page information of those pieces of information supplied from an exterior information supplier. The information stored in the page buffer is read out character by character and the read-out information is latched in a character selection latch circuit capable of storing one character. The row information of a character arranged in a dot matrix corresponding to the character read out is latched in a row selection latch circuit. The information produced from said character selection latch circuit and the row selection latch circuit are supplied to a character generator. Upon receipt of the information, the character generator produces the given dot information in parallel. The dot information are supplied to a shift-register where those are converted into a serial form of information.
Abstract: A truck safety recorder is utilized by the driver of a truck for recording the amounts of time that the driver has spent actually driving, the amount of time that the driver has been on duty, and the amount of off duty time that the driver has had for sleeping in accordance with Federal Motor Carrier Safety Regulations. The recorded information is displayed for inspection by highway officials. The truck safety recorder is removably secured to a holder mounted to the vehicle and may be carried on the person of the driver when the truck is not being driven. A clock subsystem within the truck safety recorder generates a periodic timing signal and includes a chronograph, stopwatch, and an alarm for the convenience of the user. A microprocessor subsystem responds to the periodic timing signal by incrementing amounts of time recorded by the truck safety recorder.
Abstract: A power rodding apparatus is often used in conjunction with laying telephone cable through underground conduits. For such applications the exact location of the end of the rod is important and is determined by a position detecting circuit. The circuit includes a magnetic sensor coupled to a shaft which rotates as a function of the amount of rod which has been extended or retracted from the rodding machine. The sensor also detects the direction of rotation and provides the information to digital logic which encodes the information and transmits it to a remote location. The received information is decoded and utilized to drive a digital display providing instantaneous information regarding the position of the end of the rod. A memory circuit is also provided which stores the total number of operating cycles as a general measure of rod wear.
Abstract: An electrical totalizer for forming an output signal with occurrences separated by a minimum time interval and representative of the total number of random occurrences in first and second circuits. First and second input circuits receive occurrences from, respectively, such first and second circuits. First and second bistable state circuits respond to separate strobes for changing states for each occurrence at, respectively, the first and second input circuits. A combining circuit is coupled to the first and second bistable state circuits for forming an output representation for each different occurrence at the input circuits. A separator forms, in an output signal, an output occurrence responsive to an applied strobe for each of the output representations. A strobing circuit is operative during repetitive cycles for applying, during each cycle, a strobe to each of the first and second bistable state circuits and to the separator in a predetermined sequence.
Abstract: Steering logic interconnects the individual portions of a partitioned counter and are controlled by test logic to selectively apply a clock input to the first stage of each portion of the counter in sequence and to detect overflow of the individual portions so as to determine whether the various stages of each portion are properly connected together, as well as to determine whether the steering logic properly interconnects the various portions of the counter.
Abstract: A device for the manual production of digital pulses in a forward-backward counter comprises pulse-producing elements arranged helically on a rotating axle. The pulse-receiving elements are arranged linearly along the rotating axle in one or several rows. The distance between the pulse absorbing elements is unequal to the pitch of the helical line, whereby the pulse-receiving elements are acted upon individually in succession or in several groups in succession. The interaction between pulse-producing and pulse-receiving elements can be based on electronic, electromechanical or electromagnetic phenomena. The dimensions of the device are miniaturizable to the extent that the entire device can be housed together with the storage or microprocessor subordinate to it in an integrated electronic module of practicable size.
Abstract: A quantity converting and indicating apparatus for use in automatic remote systems for inspecting consumed amounts of gas, city water, electric power or the like, by which a detected value in the decimal system displayed on such a counter as a gas meter is converted to a binary system value convenient for transmission by a channel such as a telephone circuit. The apparatus is provided with plural cams (2) cooperative with a figure wheel (4) of the counter for converting the detected value to the binary system value, plural vibrators (6a) placed facing each cam and fixed each at one end, flexible vibrator controlling members (5) placed adjacent to the concaves and convexes (2a, 2b) of each cam and facing the respective vibrators at their other ends for controlling the vibrators, means (10) for activating the vibrators, and means (7, 8) for converting the vibration to an A.C. signal having a frequency in a band adopted for transmission by means such as a telephone circuit.
Abstract: A demand recorder includes a microprocessor for receiving data pulses representative of measured events and formats the incoming data into demand intervals. After a predetermined number of demand intervals, called a collection period, the microprocessor transfers the data for more permanent storage to a solid state memory which may be removed for remote processing. The system has battery carryover during a power outage, but the microprocessor prevents data transfers to the solid state memory. At the end of a collection period in which a power outage occurred, the microprocessor transfers the current data to a secondary portion of random access memory. For subsequent demand intervals until power is restored and including any thermal recovery periods, the processor formats event data by assigning index numbers for demand intervals in order of occurrence and stores data only for those demand intervals in which power consumption was actually measured.
Abstract: In the disclosed tape recorder, wherein separate sources of electric power actuate the tape drive and energize a display for showing the running direction of a tape, the display showing the running direction of the tape is disabled unless the source that energizes the drive is effective.
Abstract: A calibration method and standard for calibrating particle counting instruments such as blood platelet counting instruments in which the particles have a distribution of sizes, wherein the method includes the following steps performable in any order. A first known concentration of particles having a mean size which is substantially near the lower extreme size distribution of particles normally counted by the instrument being calibrated are counted and the counts thus obtained are compared with the known count of the concentration. A second known concentration of particles are then counted with the instrument to be calibrated in which the mean size of the second particles is substantially near the upper extreme size distribution of the particles normally counted by the instrument. The count thus obtained is then compared to the known count of the concentration.
Abstract: Microprocessor apparatus in which the CPU generates as an integral function memory refresh addresses for an external dynamic memory without degradation of CPU performance. The CPU architecture is optimized by dividing the CPU devices selectively into groups during different time periods by the use of switching devices in the internal bus structure.
November 9, 1979
Date of Patent:
May 25, 1982
Masatoshi Shima, Federico Faggin, Ralph K. Ungermann
Abstract: Integrated circuits contained in a rail are passed through cylindrical electrodes. Two electrodes are connected to an oscillator to transmit out of phase fields. A receiving electrode's output has the residual oscillator frequency component removed by a nulling network and summation device, whose output is fed to a band pass amplifier and balanced demodulator, which receives a phase shifted input from the oscillator. Demodulator output components at and above the oscillator frequency are removed by a low pass filter. A demodulator output above the reference voltage triggers a counter.
Abstract: A vital relay driver whose response time can be readily controlled such that the release time of the relay may be varied, yet may be held to very close tolerances. The vital relay driver is controlled by a microprocessor dedicated to this function, such processor generating a dynamic signal of fixed frequency in dependence on a cycle number which is continually replenished; otherwise the microprocessor stops producing the dynamic signal and the relay is released in a closely known time.