Patents Examined by Kenneth A. Wieder
  • Patent number: 5666061
    Abstract: The measurement of moisture content in granular materials is ordinarily a difficult measurement to make. The invention of this application sets forth a new method and apparatus for measuring moisture content in a wide variety of materials by means of application of an apparatus that makes measurement of moisture content independent of density of the material measured, and thereby unaffected by ambient conditions. The apparatus also allows the practitioner of this invention to readily and accurately measure moisture content.
    Type: Grant
    Filed: November 9, 1994
    Date of Patent: September 9, 1997
    Assignee: James Instruments Inc.
    Inventor: Jerald G. Assenheim
  • Patent number: 5666060
    Abstract: A relay test apparatus for testing a protective relay operation of a protective relay system comprises GPS receivers, respectively connected to the protective relays, each GPS receiver analyzing time data included in a signal transmitted from a satellite and outputting a time signal, simulation signal generators, respectively connected to the protective relays, each simulation signal generator generating a simulation signal and inputting the simulation signal to a corresponding protective relay, and synchronous starting units, respectively provided in the protective relays, each synchronous starting unit starting a corresponding simulation signal generator to generate the simulation signal, when time signals output from the GPS receivers coincide with a preset time at a same time.
    Type: Grant
    Filed: August 21, 1996
    Date of Patent: September 9, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukio Sukegawa, Tetsuo Matsushima
  • Patent number: 5666058
    Abstract: A method is used which reduces measurement errors, especially of permittivity, which result when electromagnetic induction-type probes measure electrical properties of solutions. Part of the electromagnetic induction current, which the electromagnetic induction-type probe tries to induce in the test solution, flows in the stray capacitance, which is formed by the dielectric in the probe. This partial current reduces the current that is linked to the current detector transformer, and affects the measured value of the electrostatic capacity component, i.e., the permittivity, of the test solution. This phenomenon is modeled and is expressed by a distributed constant circuit which is simplified to a T-shaped 2-terminal pair equivalent circuit. A correction equation that corrects the errors due to the aforementioned currents is obtained by means of this simplified equivalent circuit, and the measurement errors are reduced.
    Type: Grant
    Filed: December 27, 1995
    Date of Patent: September 9, 1997
    Assignee: Hewlett-Packard Company
    Inventor: Hideki Wakamatsu
  • Patent number: 5666048
    Abstract: A technique and circuit for measuring direct current flowing through a conductor at a high voltage employs a capacitor connected in series with the conductor, and a neon lamp connected in parallel with the capacitor. The series connected capacitor and conductor are connected to a high voltage source such that the current flowing through the series connected capacitor and conductor charges up the capacitor. Since the capacitor and the neon lamp are connected in parallel, the voltage across the electrodes of the neon lamp follows the voltage across the capacitor. When the voltage across the electrodes of the neon lamp reaches the lamp's ignition voltage, the neon lamp fires, and discharges the capacitor until the voltage across the electrodes of the neon lamp falls to the lamp's extinction voltage. The light signal generated by the neon lamp is picked up by a fiber optic cable and transmitted to a remote receiver for processing.
    Type: Grant
    Filed: June 26, 1995
    Date of Patent: September 9, 1997
    Assignee: Beckman Instruments, Inc.
    Inventors: Donald P. Labriola, II, John R. Fassett
  • Patent number: 5666065
    Abstract: The firing circuit of an inflatable restraint system is tested to verify operation of two FETs in series with a squib which are used to apply current to the squib. For the test the squib is biased to an intermediate voltage and each FET is turned on alone to apply battery or ground voltage to the squib. High and low voltage detectors sense the voltage excursion past respective thresholds to verify FET operation, and a logic circuit immediately turns off the FET to result in a very short FET on time. If a short is present before the FET is commanded on, a detector and the logic circuit prevents FET conduction to avoid firing or degrading the squib.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: September 9, 1997
    Assignee: Delco Electronics Corp.
    Inventors: Richard Joseph Ravas, Terrell Anderson, Robert Keith Constable
  • Patent number: 5666064
    Abstract: A semiconductor device comprises a plurality of leads respectively made up of an inner lead and an outer lead, a semiconductor chip electrically connected to the inner leads of the leads, and a package encapsulating at least the inner leads of the leads and the semiconductor chip so that the outer leads extend outwardly of the package. The package has an upper part and a lower part which have mutually different sizes such that a stepped part is formed between the upper and lower parts by the different sizes, and each of the outer leads have a wide part which is wider than other parts of the outer lead extending outwardly of the package only within the stepped part of the package.
    Type: Grant
    Filed: May 15, 1995
    Date of Patent: September 9, 1997
    Assignees: Fujitsu Limited, Kyushu Fujitsu Elecronics Limited, Fujitsu Automation Limited
    Inventors: Junichi Kasai, Kazuto Tsuji, Norio Taniguchi, Takashi Mashiko, Masao Sakuma, Yukio Saigo, Yoshiyuki Yoneda, Masashi Takenaka
  • Patent number: 5663656
    Abstract: A system and method for executing on board diagnostics in connection with automated test hardware and maintaining an event history on a circuit board having a microprocessor and diagnostic routines stored in read only memory (ROM). The testing of a circuit board by automated test equipment causes a microprocessor on the circuit board to execute the diagnostic routines stored in read only memory on the circuit board. Upon completion of the diagnostic routines, the results generated by the routines are stored in non-volatile memory (NVRAM) on the circuit board. Upon completion of the remaining circuit board testing, the results of that testing are also written to the non-volatile memory on the circuit board. Other events occurring during in the production and use of the circuit board may also be written to the non-volatile memory on the circuit board to maintain a log for diagnostic and statistical purposes.
    Type: Grant
    Filed: March 13, 1996
    Date of Patent: September 2, 1997
    Assignee: EMC Corporation
    Inventors: Robert Wilson, Harold F. Pritoni, Jr.
  • Patent number: 5663651
    Abstract: The present invention provides a test pattern and method for separately measuring a plug resistance and interfacial resistance of a contact resistance with high precision including the steps of: (a) providing on a semiconductor chip a test pattern as described above; (b) applying a predetermined voltage between the electrode pad patterns of one of a pair of first and second electrode pad patterns and a pair of third and fourth electrode pad patterns and measuring a current flowing between the electrode pad patterns of the one pair in an open state between the electrode pad patterns of the other pair; (c) repeating this measuring method between the electrode pad patterns of each pair; and (d) determining a first plug resistance of the first or fourth contact hole and a second plug resistance of the second or third contact hole from the voltage and the first to third currents.
    Type: Grant
    Filed: October 11, 1995
    Date of Patent: September 2, 1997
    Assignee: NEC Corporation
    Inventor: Hiromitsu Hada
  • Patent number: 5663650
    Abstract: A portable grain moisture meter has a large 16 character digital display allowing an alphabetical list of grain selections to be selectably displayed in full text format and subsequently tested for moisture content with the test results also displayed on the same display. The meter also has provisions for calibrating the meter to a remotely located meter and has dual temperature transducers for achieving automatic grain temperature compensation by monitoring both the grain temperature along with the cell temperature.
    Type: Grant
    Filed: August 1, 1995
    Date of Patent: September 2, 1997
    Assignee: Farmex, Inc.
    Inventor: Mike McMahon
  • Patent number: 5661403
    Abstract: An apparatus and method for measuring conduction current through a sample portion of the surface of the solid conductor that is in contact with a liquid conductor, such as the solid electrolyte of a liquid-solid-liquid battery, is provided. The apparatus includes a probe having a hollow insulating probe body with an interior adapted for holding a small amount of the liquid conductor. The probe body insulates the probe liquid conductor from the surrounding liquid conductor and includes a tip having an opening in communication with the probe interior. The tip is adapted for making sealed contact with the solid conductor surface. The conduction current through the sample area can thereby be isolated and measured.
    Type: Grant
    Filed: June 20, 1995
    Date of Patent: August 26, 1997
    Inventor: Franklin F. Mackenzie
  • Patent number: 5661407
    Abstract: The invention provides efficient probe testing of integrated circuits. Bonding pads of the integrated circuits are provided with logic state components and data recording components. Logic circuits of the above components are serially connected to form shift registers. The shift registers permit input and output of data by an integrated circuit test device through a small number of test pads. The number of test pads remain the same for different types of integrated circuits. A single set of test pads may be used to probe test all the integrated circuits of a single semiconductor wafer.
    Type: Grant
    Filed: September 21, 1995
    Date of Patent: August 26, 1997
    Assignee: Kawasaki Steel Corporation
    Inventor: Yukio Shibata
  • Patent number: 5659253
    Abstract: An RF detector circuit (28), which may be utilized in an output power control loop (10) for an RF transmitter, includes a bridge circuit (50) including a first arm (52) containing a first diode (D2) which rectifies the RF signal and a second arm (54) which contains a second diode (D3) series-coupled to the first diode (D2), and having an RF bypass capacitor (C4). The second diode (D3) serves as a temperature compensator for the first diode (D2). The outputs of the bridge circuit (50) are connected to the inputs of a differential amplifier circuit (32) which provides a signal for use in the power control loop (10). The detector input signal is derived from the sense output of a directional coupler (22). In a second embodiment the compensating diode (D13) has its cathode coupled to the cathode of the rectifying diode (D12), and the full voltage across the rectifying diode (D12) is applied to the differential amplifier circuit (32).
    Type: Grant
    Filed: May 5, 1995
    Date of Patent: August 19, 1997
    Assignee: Lucent Technologies Inc.
    Inventor: Erik B. Busking
  • Patent number: 5659254
    Abstract: A capacitance detector comprises switches for charging and discharging a sensing part, an integrator constituted by a condenser and an operational amplifier for integrating a charging current or a discharging current which is generated according to the charging and discharging the sensing part, a switch for charging an output voltage of the operational amplifier and for feedbacking an electric charge to the integrator, and a condenser. The capacitance detector can be provided by the operational amplifier having a low response performance and a small output current and no hold sample circuit, thereby a circuit scale of the capacitance type sensor can be made small.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: August 19, 1997
    Assignees: Hitachi, Ltd., Hitachi Automotive Engineering Co., Ltd.
    Inventors: Masahiro Matsumoto, Seiko Suzuki, Masayuki Miki, Masayoshi Suzuki, Keiji Hanzawa, Takao Sasayama
  • Patent number: 5659251
    Abstract: A highly accurate electromagnetic-induction-type conductivity and dielectric constant meter is obtained by using a calibration box (instrument) and a structure as below. The conductivity and dielectric constant meter employs an electromagnetic inductive probe which includes a primary transformer composed of a toroidal core with a wound primary coil, a secondary transformer composed of a toroidal core with a wound secondary coil, an electrostatic shield shielding the transformers, and cables that connect the probe to a meter. To eliminate the electrostatic capacity produced by causes other than electromagnetic induction, the structure of the probe is symmetrical. In a first embodiment, the secondary transformer is placed between two parts of the primary transformer, which has two cores of the same shape that are placed symmetrically.
    Type: Grant
    Filed: May 5, 1995
    Date of Patent: August 19, 1997
    Assignee: Hewlett-Packard Company
    Inventor: Hideki Wakamatsu
  • Patent number: 5659252
    Abstract: A method and apparatus for detecting and indicating the number of times a CRT unit arcs. The apparatus is constructed of a ferrite split toroid core wound with wire which is coupled around the focus lead and/or ground lead of a CRT through which a current spike will occur during an arcing event. The wound wire is coupled to a current pulse detector which in turn is coupled to a monostable mode timer and counter for counting the number of arcing events. The counter is coupled to a display device for displaying the number of times the CRT has arced.
    Type: Grant
    Filed: August 25, 1995
    Date of Patent: August 19, 1997
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Mahmoud Badenlou
  • Patent number: 5656931
    Abstract: A fault current sensor device detects and distinguishes abnormal current events on alternating current overhead and underground power transmission lines. The sensor distinguishes whether the momentary or sustained fault is a line-to-ground fault, line-to-line fault or a three-phase fault. The sensor determines whether the overload has occurred on all three phases, or only on one or two phases, of the power line in an unbalanced situation. The device can be remotely reprogrammed to alter its trigger or threshold level and can be remotely reset after a fault has occurred.
    Type: Grant
    Filed: January 20, 1995
    Date of Patent: August 12, 1997
    Assignee: Pacific Gas and Electric Company
    Inventors: Ken Lau, Jimmie Yee, Rodger Mayeda, Julian Riccomini, Mary Ilyin
  • Patent number: 5656928
    Abstract: Measuring apparatus includes a first element having its impedance dependant on the state of its surroundings and a second element having a variable impedance connected to the first element. A voltage at the connection point between the first and second elements is converted into a digital value and the impedance of the second element is set based on the converted digital value. The surrounding state (e.g., humidity) is determined based on the converted digital value.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: August 12, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventors: Koji Suzuki, Junichi Intoh
  • Patent number: 5656944
    Abstract: An improved burn-in voltage detection circuit for a semiconductor chip capable of detecting a predetermined voltage level related to a burn-in operation using a specific element irrespective of manufacturing variation, which includes an external voltage detection circuit for detecting whether an external voltage level is higher than a prescribed internal reference voltage level, and in response producing a burn-in enable signal; and a burn-in conversion detection circuit including a hysteresis characteristic, activated by the burn-in enable signal and responsive to the externally applied voltage and the internal reference voltage, for producing a burn-in signal of a first state as the external voltage is increased in magnitude above the level of the prescribed internal reference voltage by a component of the hysteresis characteristic, and a burn-in signal of a second state as the external voltage is reduced in magnitude below the level of the prescribed internal reference voltage by a component of the hystere
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: August 12, 1997
    Assignee: LG Semicon Co., Ltd.
    Inventor: Young-Keun Choi
  • Patent number: 5656929
    Abstract: An economical, wide range and accurate power measurement technique switches an RF detector between an applied RF IN to be measured and a COMPARISON RF IN, to thus develop a difference signal. The difference signal is filtered, amplified by a logarithmic amplifier, and then converted into a DC error signal by a synchronous detector operating in step with the switching of the RF detector. The DC error signal is applied to an integrator whose output is a loop control signal. Assuming a square law detector, the square of the loop control signal is linearly proportional to the applied RF IN once a servo loop is hulled by making COMPARISON RF IN equal to RF IN. The desired power measurement is performed by digitizing the loop control signal and performing the appropriate arithmetic operations thereon. The loop control signal is also applied to an analog multiplier, where it combines with an internal RF reference signal to produce, at the output of an attenuator following the multiplier, the COMPARISON RF SIGNAL.
    Type: Grant
    Filed: October 25, 1995
    Date of Patent: August 12, 1997
    Assignee: Hewlett-Packard Company
    Inventor: Melvin D. Humpherys
  • Patent number: 5656941
    Abstract: TAB tape is used to contact integrated circuit chip electrodes (without actual metallurgical bonding) at approximately 10 grams per lead contact force. The chip is clamped to the TAB leads, and held in place so that the tape site can be transported, tested, and burned-in like a TAB chip on tape. A TAB tape frame is utilized with the inner lead bond fingers angled upwards so that the ends of the fingers perform a scrubbing action on the chip contacts when the IC chip is engaged with the TAB tape slide carrier socket. A silicone bead provides a spring-like action underneath the fingers.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: August 12, 1997
    Inventors: Thomas Alan Bishop, Ernest Ricky Nolan