Abstract: A communication subsystem includes a plurality of peripheral interface devices, one or more network interface devices and, optionally, one or more gateway interface devices. Each and every interface device includes a uniform data transport controller that autonomously controls data traffic across the device associated therewith and executes all requisite communication protocol conversions.

Abstract: A communication network is disclosed having a customer interactive special service facility, such as a conference arrangement. At the customer's request, or if trouble is encountered, an operator position is alerted with the identity of the special service facility. Using this identity, the operator can cause the status of the special service facility to be displayed at the operator's position and thereafter exercise control over the facility.

Abstract: In a system for communicating primary and secondary data from a transmitter to a receiver, each of a first plurality of primary data word values is communicated by the transmitter by transmitting an individual channel symbol associated with that value, while each of at least two other primary data word values are communicated by transmitting a selected one of at least two other channel symbols associated with that primary data word value. A predetermined one of the two channel symbols associated with the first primary data word value is transmitted only when secondary data having a first value is to be communicated, and a predetermined one of the two channel symbols associated with the second primary data word value is transmitted only when secondary data having a second value is to be communicated. In the receiver, both the primary and secondary data word values are recovered from the channel symbols thus transmitted.

Abstract: Method and apparatus is disclosed for maintaining a dynamic logical ring in a token passing local area network such that each bus interface unit coupled to the network can freely and unilaterally initiate participation therein by monitoring the transmission bus until it is not busy and, thereafter, transmitting a solicit successor packet to initiate entrance to the ring. Further, method is disclosed for re-establishing the ring after a bus interface unit fails or a token is destroyed. Lastly, method and apparatus is disclosed for establishing the logical ring after initialization.

Abstract: A multiaccess communications system for a communications network in which a plurality of nodes are connected to a head end by a common transmission path to perform wideband transmission of packets between the nodes, particularly a multiaccess communications system such as a carrier sensing multiaccess (CSMA) system or a collision sensing CSMA (CSMA/CD) system. A single transmission cable or a pair of transmission cables are efficiently shared by various channels. Each of the nodes is provided with a transceiver in association with the cable or the cables. All the channels are effectively utilized by means of a relatively simple system construction.

Abstract: An optical fiber communications system with a plurality of bidirectional channels and a protection channel is disclosed. Each channel has a respective identity which is transmitted in the traffic of that channel and in the event of a protection switch is identified in the protection channel traffic. A protection switch is effected by detecting a channel failure at the receive end of a span, transmitting a protection request on the return channel back to the transmit end of the span, and using this request in a controller for the channel to effect a protection switch, using an individual selector for the channel, if a priority scheme allows. The controllers are enabled or disabled under software control following a protection switch in accordance with the prevailing priority scheme. The arrangement provides for rapid protection switching.

Abstract: Synchronization apparatus in a telecommunication system of the TDM type in which information is transmitted in assigned time slots, in simplex data transmission between a plurality of equal transmitter/receiver modules (A-N) connected to a common bus. The bus is divided into three sections, all transmitters (S) being successively connected to the first section (B1) and all receivers (R) being connected to the final section (B3) in the same order as the transmitters. The time delay between transmitters and bus is the same for all transmitters and constitutes a fixed value, whereby the total delay on the first section of the bus is determined by the number of transmitters connected. The same condition applies to the receivers so that the delay on the final section (B3) of the bus also is fixed value.

Abstract: There is provided a method of multiplexing digital signals which includes multiplexing serial digital signals of a plurality of channels having a given transmission rate and each of which has frame synchronizing signals to a single serial signal, converting signals excluding the frame synchronizing signals of one selected channel to a format which allows inverse-conversion and which does not allow detection of the frame synchronizing signals and using the frame synchronizing signals of the one selected channel as frame synchronizing signals of the single serial signal. There is also provided apparatus for performing the method which includes circuitry for the steps referred to above.

Abstract: In a system for communicating primary and secondary data from a transmitter to a receiver, each of a first plurality of primary data word values is communicated by transmitting an individual channel symbol associated with that value, while at least one other primary data word value is communicated by transmitting a selected one of at least two other channel symbols associated with that one other value. The selected symbol is a function of the value of an individual secondary data word. In the receiver, both the primary and secondary data word values are recovered from the channel symbols thus transmitted.

Abstract: This invention provides a high-speed switching processor which may be employed as a component of a link switch or a hub switch in a burst-switching communications system. When so employed, transmission speeds for integrated voice and data services over communications links between switches may be equivalent to the T1 rate or higher. A burst is a plurality of bytes which represents, for example, a block of data or a spurt of voice energy sensed by silence/voice detectors located at voice ports.

Abstract: In a telephone system in which digitally coded speech or data is transmitted in burst mode between a subscriber's set and the local exchange the bursts may be of the same length in either direction or longer in one direction than the other in dependence upon the information to be transmitted. Binary digit values making up the bursts are assembled for transmission in and held following reception of a shift register, and different output points along the register are selected in dependence upon the length of burst to be transmitted.

Abstract: Apparatus 117 interfaces system multiplexing/demultiplexing (MUX/DMUX) station circuitry 113, which exchanges pulse code modulated (PCM) signal samples of voice, data and control information in an interleaved port group format with a plurality of the system user ports 120 in each of a succession of sample time intervals, with the system time slot interchange (TSI) matrix 110 which switches the PCM voice, data and control signal samples in each sample time interval in groups of common signal type.

Abstract: A circuit arrangement is provided for switching serial data packets through a network destined for one of a plurality of possible outgoing lines. Minimal delay is achieved by shifting the data through a shift register having length equivalent to the destination address of the incoming serial data packet. The shift register addresses a memory which in turns controls a switch network so that the incoming packet is switched with minimal delay to an appropriate outbound line. By utilizing random access memory to translate from destination address to switch position, the system may be altered to correct for changes in the overall network caused by network failures or expansion network or to allow dynamic load balancing by directing data through the switch to a control computer which in turn rewrites the memory.

Abstract: A time compression multiplex digital transmission system having an improved frame synchronization circuit in which a limited window is gated open at a master station to search for the final synchronization bit of the incoming burst signal from a slave station. Thereafter the window is expanded to open just prior to the anticipated arrival of the initial synchronization bit of the following burst. Once the presence of this initial synchronization bit is confirmed frame synchronization of the incoming burst signal is established and the window is then gated substantially coextensively with that incoming signal.

Abstract: A circuit arrangement for conference circuits in digital communications systems, particularly in PCM telephone systems, provide digitized voice signals of the conference participants which are added in the conference circuit and are transmitted to all conference participants minus a voice signal generated by the respective participant. In the conference circuit, linear samples are transmitted to a subtractor in a frame-delayed manner by an intermediate memory and are compared by a transverse filter to the sum of all preceding samples respectively multiplied by a correction value derived dependent on the phase position to the sum of a momentary sample. As a result, each conference subscriber receives the sum of the voice signal of all conference subscribers minus his own voice signal, whereby the echo signals of the conference participants are suppressed except for one's own echo signal.

Abstract: Digital data is transmitted over AC power lines at typically a 300 baud rate and at a frequency of 130 kilohertz representing a binary ONE and 131 kilohertz representing a binary ZERO. Apparatus in the receiver relay including a quadrature detector converts the high frequency signals to digital binary signals which are applied to a microprocessor. The microprocessor generates signals to control relays in accordance with the information received from the AC power lines.

Abstract: A method of transmitting signals of different information rates between a subscriber and a central exchange of a service integrated system operating in time multiplex wherein the signals to be transmitted are combined at the transmitting end by means of multiplexers and the transmitted signals are recovered at the receiving end by means of demultiplexers. The frequency of the time multiplex frame, i.e. the frame frequency, is selected to be equal to the smallest information rate of the signals to be transmitted and one information unit of the signal having the smallest information rate is transmitted per frame.

Abstract: A contention-resolution protocol on a single shared bus with asynchronous time-division multiplexing and random access is disclosed. The scheme is equivalent to finding the extremum of a set of random numbers. Each station maintains a common window. A station contending for the use of the bus generates a number. If the number generated falls in the window, the station contends in the next slot of time, otherwise it has to wait until the current contention has been resolved and a packet has been transmitted. A collision-detection rule is applied that detects whether one or more stations have contended. If more than one station has contended, or if no station has contended, a window-control rule is applied at each station to expand, shrink or otherwise change the window. The process is repeated until exactly one station has contended. The packet of data can then be sent.

Abstract: The disclosed circuit employs a single programmable timer and address decoder which identifies a plurality of bursts received from other stations in a TDMA communications network by means by identifying their origin addresses, and then starts associated timing intervals in the programmable timer for each burst. The instant when the intervals being timed terminate, corresponds approximately to the instant at which the local station should commence its transmission burst. The programmable timer and synchronizer associates each of a plurality of timing intervals with each of the plurality of transmitting stations in the TDMA network, and terminates each respective interval at approximately the same instant in a given local station, thus allowing the time for commencement of the local station's transmission burst to be reliably determined without regard for the participation of any more than one other of the plurality of transmitting stations in the TDMA network.

Abstract: Programmable feature card circuitry includes: a signal processor with parallel input/output (I/O) data ports and responsive to command of the PBX call processor, signal memory, and a signal interface for converting the PBX signal format to a processor compatible format; the signal memory including program memory for storing signal processor program signals representing the programmed algorithm to be performed by the signal processor in the execution of the user selected PBX support function and including data memory for storing data signals from the PBX, the signal processor executing the stored programmed algorithm in response to the command signals from the PBX call processor.