Abstract: The present invention is a monitor that detects a design verification event and reports a status event to a database. One embodiment of the present invention comprises a monitor declaration, zero or more signal declarations, zero or more bus declarations and one or more logic expressions. A logic expression, formulated using the declared signals and buses, is used to evaluate whether a specific verification event has occurred. The present invention further comprises a monitor where the signal of the signal declaration of the monitor is an N-Nary signal. Additionally, the present invention comprises a parser to translate the monitor source file code into a standard computer language code.

Abstract: An apparatus for aiding a machinist in preparing a machining program. A machining simulator simulates a basic machining program. Values of machining variables are obtained during the simulation and stored in a simulation result data memory. A spindle load determiner, a cutting speed determiner, and a rotating speed determiner analyze the machining variable values of a certain machining process to determine the machining efficiency of that process. A navigation information memory stores a plurality of messages for giving advice on how to change the cutting conditions. A message, which depends on the analysis of the machining variable values, is selected from the memory and is shown on a display. Accordingly, an operator can easily modify the basic machining program by following the message on the display, even if the operator does not have much knowledge or experience.

Abstract: An apparatus for calculating immunity from a radiated electromagnetic field which makes possible high-speed simulation of the electric current flowing through an electronic apparatus due to a radio wave radiated from an antenna, and a method and a storage medium storing programs used for the same which divides a radio wave radiated from an antenna into a carrier wave, upper sideband wave, and lower sideband wave, and uses the moment method to simulate the effect of the radio wave on an electronic apparatus by calculating the mutual impedance for one frequency component out of the above three frequency components and using that mutual impedance to solve the simultaneous equations under the moment method so as to calculate the electric current flowing through the electronic apparatus.

Abstract: This invention is to provide an information processing system and method in which when the paper size of a document is to be changed, layout constituent elements are rearranged while keeping margin sizes unchanged and keeping a predetermined ratio between the shape of the effective area and the shape of each layout constituent element, thereby freely and easily setting the shape of each object frame as a layout constituent element without entering the binding margin or the physical printing disable area. In rearranging a plurality of layout constituent elements in a document on the basis of an instruction for changing the paper size of the document, the effective area size of the document after the change in paper size is calculated. On the basis of the calculated effective area size, the size and position of each layout constituent element are calculated such that a margin of the document becomes constant before and after the change in paper size.

Abstract: A system, method, and computer program product is presented for simulating a system of hardware components. Each component is simulated in a hardware definition language such as VERILOG. Each component is represented as a simulated device under test (DUT) that is incorporated into a simulation module. The invention synchronizes the simulation modules by issuing clock credit to each simulation module. Each simulation module can only operate when clock credit is available, and can only operate for some number of clock cycles corresponding to the value of the clock credit. Operation is said to consume the clock credit. After a simulation module has consumed its clock credit, its DUT halts. Once every simulation module has consumed its clock credit and halted, another clock credit can be issued. This allows checkpointing of the operation of each DUT and simulates parallelism of the DUTs using executable images of manageable size.

Abstract: A method and apparatus are provided for assembling and operating a physical system having a plurality of structural elements and structural interconnections from a remote location. The method includes the step of creating a graphical representation of the physical system at the remote location showing the elements and connections of the system to be assembled. The method further includes the steps of converting the graphical representation into an element list delineating the elements and the interconnections, transferring the element list from the remote location to an element controller and assembling and operating the system by the element controller in accordance with the element list.

Abstract: The present invention comprises a device which is inert and “thermally-equivalent” to actual ordnance. The device can travel with live ordnance and track the propellant temperatures in order to get a more precise propellant temperature for the ordnance. The device comprises a thermally equivalent inert grain instrumented with thermocouples, connected to a data recorder, and packaged in scaled-down ordnance hardware. The hardware is scaled down to enable the device to more easily travel with live munitions.

Abstract: 3-D structure design system and method thereof capable of preparing drawings and performing quantity calculation at the same time, and largely eliminating troubles caused when designing a concrete structure by handling the design of concrete-made structures with a cubic 3-D data from the very beginning. The system comprising: data input device for inputting structure data; 3-D structural data search device for searching data on a portion between members and data on a connection between members on the basis of the input data on the concrete-made structure, checking an interference portion between members, aligning members through the result of rivaling between members, automatically adjusting the overlapping of members, and searching the input data on members as data conforming to the concrete structure; body quantities search device for calculation; and result display device for displaying/outputting a search result.

Abstract: For use in an integral equation formulation of capacitance, a system for, and method of, generating a representation of charge distribution for a given capacitive structure (which may be an integrated circuit). In one embodiment, the system includes: (1) a charge variation function generator that creates a multidimensional charge variation function that is not directly dependent on a conductive geometry of the structure and (2) a conductive geometry generator, associated with the charge variation generator, that creates a conductive geometry that is independent of charge variation in the structure, the charge variation function and the conductive geometry employable in the integral equation formulation to reduce a complexity thereof.

Abstract: A method and apparatus for simulating a circuit is described. In one embodiment, the method comprises representing a plurality of identical components in a reduced form as a circuit having a single instance of the identical component with encoding for each input of the single instance to represent corresponding inputs to all of the plurality of identical components and decoding for each output port of the single instance to create output ports for the outputs associated with all of the plurality of identical components and symbolically simulating the reduced form of the circuit with simulation results being the same as results of symbolically simulating the plurality of identical components.

Abstract: The invention relates to a process for producing a diagram of an installation using apparatuses, each apparatus being supplied with gas, comprising: the consultation of one or more databases (5) comprising, for each apparatus, data on the flow rate, the nature, the purity of the gas supplying the apparatus, and the supply pressure of that gas for that apparatus, the selection, for each apparatus, of a value, or of a limit value, of duration or of frequency of use, the calculation, for each apparatus, of the consumption, or of the limit consumption, according to the utilisation value and to the flow rate data, the calculation, for each gas and for each gas purity, of the total of the consumptions of all of the apparatuses, the indication of technical constraints, the consultation of a database (5) for proposing, for each gas and each gas purity, a packaging, as a function of the consumption and of the technical constraints relating to the storage of the gas and/or to their delivery.

Abstract: A method for reducing power consumption by using power estimation data obtained from at the gate-level for a core's representative input stimuli data (instructions), and propagating the power estimation data to a higher (object-oriented) system-level model, which is parameterizable and executable. Depending on the kind of cores, various parameterizable look-up table techniques are used to facilitate self-analyzing core models. As a result, the method is faster than gate-level power estimation techniques and power-related system-level design decisions.

Abstract: A method and an apparatus allows complete and efficient verification of cross-architecture ISA emulation. A random verification framework runs concurrently on two different computer architectures. The framework operates without regard to existing native applications and relies instead on binary instructions in a native ISA. The framework determines emulation errors at a machine instruction level. A random code generator generates one or more sequences of native machine instructions and corresponding initial machine states in a pseudo-random fashion. The native instructions are generated from an entire set of the native ISA. The instructions and the state information are provided to initialize a native computer architecture. The same instructions and state information are provided using standard machine-to-machine languages, such as TCP/IP, for example, to a target computer architecture. A binary emulator then translates the native instructions so that the instructions may be executed on the target computer.

Abstract: A method that creates a string that models a trace, the string having a collection of lumped elements, where at least one of the lumped elements has a cross capacitor. The method reduces the string to a pi model where the pi model has a cross capacitor. The method simulates the application of an applied noise voltage to the cross capacitor.

Abstract: A method and apparatus that utilize time-domain measurements of a nonlinear device produce or extract a behavioral model from embeddings of these measurements. The method of producing a behavioral model comprises applying an input signal to the nonlinear device, sampling the input signal to produce input data, measuring a response of the device to produce output data, creating an embedded data set, fitting a function to the embedded data set, and verifying the fitted function. The apparatus comprises a signal generator that produces an input signal that is applied to the nonlinear device, the device producing an output signal in response. The apparatus further comprises a data acquisition system that samples and digitizes the input and output signals and a signal processing computer that produces an embedded data set from the digitized signals, fits a function to the embedded data set, and verifies the fitted function.

Abstract: A simulation device and method to simulate the electric current flowing in electronic devices using the moment method, and to execute accurate simulation processing when the electronic device has an amplifier. An allocating device allocates defining dipoles to the input terminal and output terminal of an amplifier of an electronic device for the purpose of deriving the electric current flowing in the element. A creating device creates a simultaneous equation of the moment method having a form such that the amplifier input impedance is inserted into the input terminal dipole allocated by the allocating device, and the amplifier output impedance, or its inverse, and a dependent energy source responding to the amplification characteristics of the amplifier are inserted into the output terminal dipole allocated by the allocating device. A solving device solves the simultaneous equation of the moment method created by creating device.

Abstract: An apparatus and method utilize a buffer interposed in a common signal path between asynchronous clock domains in a hardware-based logic emulation environment to manage the communication of time-multiplexed data signals between the clock domains during hardware-based emulation. The buffer is effectively used to latch each data signal communicated across the common signal path so that the clock domain that receives the signals can retrieve each such signal at appropriate points in the receiver clock domain's evaluation cycle. Independently-controlled write/read pointers are maintained in a buffer control circuit to independently address the buffer for the transmitter and receiver sides of an asynchronous communication path.

Abstract: A method and apparatus which reduces the start-up delay that may occur when switching programs in audio and/or video streaming applications while maintaining high quality steady-state performance thereof. A program source (e.g., an audio and/or video data stream) is encoded and transmitted as two or more separate bit streams (e.g., sequences of data packets), the transmission of one of these bit streams being delayed by a given amount of time relative to the transmission of the other bit stream(s). At the receiving end of the transmission channel, the two or more bit streams are buffered by receive buffers having different sizes (thereby resulting in different time delays when the contents thereof are decoded), wherein the time delay difference corresponds (inversely) to the relative delay times prior to transmission.

Abstract: A method and apparatus for enabling computer aided design of architectural projects is provided that includes an area for storing building code resources, accessibility resources, and format resources. By inputting a selection of a predetermined search terms corresponding to one of physical environmental features, assembled building components, and building elements, a user is able to access the appropriate applicable regulations for that feature. Information from the resources is displayed on a display mechanism. Once the user has downloaded the applicable resources, navigation between the downloaded documents is made possible. In this manner, a user is able to obtain computerized assistance without being required to input an initial plan. Additionally, a customized search apparatus and method are provided. After selecting a term, the user can select the resource search described above or can select a customized search which aids in the selection of items to be used for building.

Abstract: A mask simulation process is introduced into a conventional OPC procedure, prior to simulation of a photoresist pattern. Reticle simulation may be achieved using very short wavelengths of light as compared to the mask feature size. Alternatively, reticle simulation may be made through adjustments in a computer aided design process.