Abstract: A power amplifier and a bridge circuit in a power amplifier, thereinto, the power amplifier includes a comparator, a bridge circuit and a low-pass filter. The comparator is adapted to receive a first analog signal, compare the first analog signal with a reference signal and output a square wave signal. The bridge circuit is adapted to amplify the square wave signal and output the amplified square wave signal. The low-pass filter is adapted to convert the amplified square wave signal into a second analog signal. The bridge circuit includes a first MEMS switch and a second MEMS switch. The first MEMS switch and the second MEMS switch turn on alternately when the polarity of the square wave changes, and output a first voltage signal or a second voltage signal respectively. The amplified square wave signal includes the first voltage signal and the second voltage signal output alternately.

Abstract: A transconductor stage is a linearized class AB amplifier having embedded noise filtering that enables a biasing of an in-phase/quadrature (I/Q) modulator core with a low quiescent current. Linearization of the transconductor stage is increased by introducing a small amount of negative feedback into the transconductor stage via a feedback circuitry and an error amplifier. A dominant open loop pole in a path between the error amplifier and an output stage of the transconductor stage forms a dominant pole low-pass filter. A low-pass filter transfer function created when a loop including the feedback circuitry is closed attenuates noise introduced by baseband circuitry that supplies baseband signals to the transconductor stage. A master output stage biases a plurality of slave output stages that are in parallel with the master output stage. Each slave output stage is coupled to an individual modulator core such as a Gilbert cell mixer core.

Abstract: A transmitter for supplying a large current upon phase change of an output voltage is disclosed.

Abstract: An amplifier circuit on a single die comprises a low voltage amplifier with a first common mode voltage and having an input and an output. A power amplifier has a second common mode voltage whose input is operably coupled to an output of the low voltage amplifier. The first common mode voltage and second common mode voltage are unequal. A compensation circuit is operably coupled to an input of the power amplifier and arranged to inject a DC-current or apply a common mode voltage into the power amplifier that is representative of a difference between the first common mode voltage and the second common mode voltage.

Abstract: An amplifier circuit with overshoot suppress scheme including an input amplifier, an output amplifier, and a diode is provided. A first and a second input ends of the output amplifier are coupled to a differential output pair of the input amplifier. A first end of the diode is coupled to an output end of the output amplifier. A second end of the diode is coupled to the first input end of the output amplifier. When the voltage difference between the output and the input ends of the output amplifier is greater then the barrier voltage of the diode, the diode is turned on, so that the output end of the output amplifier is coupled to the input end of the output amplifier. In the transient state, it rapidly smoothes the overshoot signal. In the steady state, the diode is cut off to maintain the normal operation of the operational amplifier.

Abstract: The present invention covers novel approaches to the differential amplification of an input signal. Embodiments of the present invention have precise gain, swing to within micro-volts (?V) of ground, and have high CMRR without the need for precision resistors or tuned potentiometers. Embodiments of the present invention are particularly suited for the amplification of an instrumentation signal for delivery to an analog-to-digital converter. Examples of such signals include the product of a strain-gauge front end, a temperature sensor front end, and certain devices for bioelectronics detection.

Abstract: An amplifier circuit comprising: a MOSFET amplifier circuit; a BJT amplifier circuit; a MOSFET switch circuit arranged for switching between the MOSFET amplifier circuit and the BJT amplifier circuit to implement different gain modes of the amplifier circuit.

Abstract: The present disclosure describes a variable gain transconductor having gain and/or linearity performance that are selectively controllable in operation. In one embodiment the gain and/or linearity performance are selectively controllable in response to the strength of an input signal, such as an incoming radio frequency (RF) signal to a radio receiver. In one embodiment, gain and/or linearity performance of the variable gain transconductor are selectively controllable by selecting or deselecting a number of operating bias cells. In one embodiment, gain and/or linearity performance of the variable gain transconductor are selectively controllable by selecting or deselecting a number of operating transconductance (gm) cells. In one embodiment, gain and/or linearity performance of the variable gain transconductor are selectively controllable by selecting or deselecting a combination of operating bias cells and gm cells.

Abstract: Systems and methods for providing a self-mixing adaptive bias circuit that may include a mixer, low-pass filter or a phase shifter, and a bias feeding block. The self-mixing adaptive bias circuit may generate an adaptive bias signal depending on input signal power level. As the input power level goes up, the adaptive bias circuit increases the bias voltage or bias current such that the amplifier will save current consumption at low power operation levels and obtain better linearity at high power operation levels compared to conventional biasing techniques. Moreover, the adaptive bias output signal can be used to cancel the third-order intermodulation terms (IM3) to further enhance the linearity as a secondary effect.

Abstract: An embodiment provides a device for generating an output signal as a function of an input signal, wherein a plurality of circuit sections generate partial signals and the output signal is composed from the partial signals.

Abstract: An amplifier system with digital adaptive power boost includes a charge pump for providing a power supply to an amplifier. The charge pump may switch between a fixed input DC voltage and a boosted value for a certain period of time in response to an increase in an input signal to the amplifier. The charge pump may use a switching transistor which is switched on only when the input signal to the amplifier exceeds a threshold. The amplifier system may be used for envelope tracking, especially for envelope tracking of low duty cycle signals, e.g., xDSL or vDSL.

Abstract: A line driver includes an output terminal set for outputting an output signal, a differential amplifier for amplifying an input signal, a series resistor set coupled between the differential amplifier and the output terminal set, a negative-feedback resistor set coupled to the differential amplifier, a feedback variable resistor set coupled between the differential amplifier and the output terminal set, and an adjusting unit coupled to the feedback variable resistor set. The adjusting unit is operable to adjust resistances of the feedback variable resistor set according to the output signal.

Abstract: System and methods involving pattern molds are provided. In this regard, a representative system includes a mold assembly unit having a movable fixture holder operative to engage a portion of a pattern mold and position the pattern mold for assembly.

Abstract: A cascode amplification unit includes a plurality of cascode amplifiers connected in parallel. Each of the cascode amplifiers has two transistors. A cascode current source unit includes a plurality of cascode current sources connected in parallel. Each of the cascode current sources has two transistors. Both the output end of the cascode amplification unit and the output end of the cascode current source unit are connected to a load circuit. The control circuit turns on and off each cascode transistor of the cascode amplifier and each cascode transistor of the cascode current source so that an amount of current passing through the load circuit is constant.

Abstract: An RF power amplifier has a final-stage amplifier stage which generates an RF transmit output signal, a signal detector which detects an RF transmit output level, a first detector, a second detector and a control circuit. The final-stage amplifier stage includes a transistor and a load element and performs saturation type nonlinear amplification and non-saturation type linear amplification. The first detector and the control circuit maintain the RF transmit output signal approximately constant with respect to a variation in load at an antenna at the saturation type nonlinear amplification. The second detector and the control circuit reduce an increase in the output voltage of the final stage transistor with respect to an overload state of the antenna at the non-saturation type linear amplification.

Abstract: The present disclosure relates to phase margin modification in operational transconductance amplifiers.

Abstract: Aspects of a method and system for extending dynamic range of an RF signal are provided. In this regard, an amplitude signal that is representative of an amplitude of a pair of baseband signals may be generated, an amplitude of the generated amplitude signal may be modified according to a function; and an amplitude of the baseband signals may be modified according to an inverse of the function. The modifications may adjust the peak-amplitude-to-average-amplitude ratio of one or more signals. An intermediate signal may be generated from the modified baseband signals and the amplitude of the intermediate signal may be amplitude modulated by the intermediate signal. The intermediate signal may be amplitude modulated by controlling a gain of a power amplifier. The intermediate signal may be amplitude modulated by controlling a current source and/or voltage source supplying power to a power amplifier.

Abstract: The present disclosure relates to a capacitively-coupled non-uniformly distributed amplifier (NDA) having an input line and an output line that are coupled to one another through an input network and DA segments. The input network includes a group of capacitive elements coupled between the input line and the DA segments to extend a gain-bandwidth product of the NDA. The output line includes inductive elements, and since the NDA is non-uniformly distributed, an inductance of each inductive element decreases moving from an input end of the output line to an output end of the output line to compensate for decreasing impedance along the output line. To compensate for phase velocity variations along the output line, a capacitance of each capacitive element that is coupled to the input line decreases moving from an input end of the input line to an output end of the input line.

Abstract: A signal is modulated by generating a pulse-width modulation signal and applying the pulse-width modulation signal to an input of a switched-mode amplifier. An output of the amplifier is coupled to a filter operable to impart either differential mode oscillations or common mode oscillations at the amplifier output based on the duty cycle of the pulse-width modulation signal. The duty cycle of the pulse-width modulation signal is varied to impart amplitude modulations at the amplifier output.

Abstract: An OP-amp circuit includes a first circuit unit configured to generate an operating voltage in response to an enable signal, a second circuit unit configured to amplify a difference between respective voltages received through an inverting terminal and a non-inverting terminal in response to the operating voltage and to output a result of the amplification as a first drive voltage, a third circuit unit configured to output a second drive voltage according to a voltage level of the first drive voltage inputted thereto, and a fourth circuit unit configured to divide an input voltage inputted thereto into a divided voltage according to two resistances having respective resistive values varying according to the first and second drive voltages and to output the divided voltage through an output terminal.