Patents Examined by Kien C Ly
  • Patent number: 11152424
    Abstract: A display device includes at least one first and second electrodes extending in a first direction, at least one first and second light emitting elements disposed therebetween, a first contact electrode partially covering the first electrode and contacting a first end of the first light emitting element, a second contact electrode partially covering the second electrode and contacting a third end of the second light emitting element, and a third contact electrode disposed between the first and second contact electrodes and contacting a second end of the first light emitting element and a fourth end of the second light emitting element, in which a distance between the first and second electrodes is greater than a longitudinal length of at least one of the first and second light emitting elements, and the first and second light emitting elements are connected in series between the first and second electrodes.
    Type: Grant
    Filed: January 14, 2019
    Date of Patent: October 19, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Xin Xing Li, Tae Jin Kong, Hee Keun Lee, Hyun Min Cho, Chang Il Tae
  • Patent number: 11145543
    Abstract: A semiconductor device and method of making the same, wherein in accordance with an embodiment of the present invention, the device includes a first conductive line including a first conductive material, and a second conductive line including a second conductive material. A via connects the first conductive line to the second conductive line, wherein the via includes conductive via material, wherein the via material top surface is coated with a liner material, wherein the via is a bottomless via.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: October 12, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Lawrence A. Clevenger, Baozhen Li, Kirk D. Peterson, Terry A. Spooner, Junli Wang
  • Patent number: 11145692
    Abstract: Embodiments of the disclosed subject matter provide a wearable device that includes an organic light emitting diode (OLED) light source to output light having one peak wavelength from a single OLED emissive layer, and a first barrier layer that is disposed over or between the single OLED emissive layer and one or more down-conversion layers. One or more regions of the single OLED emissive layer are independently switchable and controllable so that the wearable device is configurable to output a plurality of wavelengths of light. One of the plurality of wavelengths of light that is output is near infrared light.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: October 12, 2021
    Assignee: Universal Display Corporation
    Inventors: Michael Hack, Mark E. Thompson, Eric A. Margulies, Nicholas J. Thompson, Michael Stuart Weaver
  • Patent number: 11147156
    Abstract: A composite member includes a substrate composed of a composite material containing a metal and a non-metal. One surface of the substrate has spherical warpage of which radius of curvature R is not smaller than 5000 mm and not greater than 35000 mm. A sphericity error is not greater than 10.0 ?m, the sphericity error being defined as an average distance between a plurality of measurement points on a contour of a warped portion of the substrate and approximate arcs defined by the plurality of measurement points. The substrate has a thermal conductivity not lower than 150 W/m·K and a coefficient of linear expansion not greater than 10 ppm/K.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: October 12, 2021
    Assignees: Sumitomo Electric Industries, Ltd., AL.M.T. CORP.
    Inventors: Isao Iwayama, Shigeki Koyama, Masashi Okamoto, Yuta Inoue, Hiroyuki Kontani, Takehisa Yamamoto
  • Patent number: 11139444
    Abstract: Embodiments of the disclosed subject matter provide a device having a substrate, at least one organic light-emitting layer disposed over the substrate, and at least one down-conversion layer. The at least one down-conversion layer may generate the NIR emission by absorbing at least a portion of the light emitted by the at least one organic light emitting layer, and re-emitting light at a longer NIR wavelength or range of wavelengths having a peak NIR emission that may be greater than 700 nm, greater than 750 nm, or greater than 800 nm. An out-of-plane optical density of the at least one down-conversion layer may be less than 0.1 for all wavelengths of light in a range from 400 nm to 600 nm.
    Type: Grant
    Filed: December 12, 2018
    Date of Patent: October 5, 2021
    Assignee: Universal Display Corporation
    Inventors: Eric A. Margulies, Nicholas J. Thompson, Michael Stuart Weaver
  • Patent number: 11139338
    Abstract: A light emitting device including a substrate, first and second light emitting diodes disposed thereon and including a first semiconductor layer, an active layer, and a second semiconductor layer, a first upper electrode electrically connected to the first semiconductor layer and insulated from the second semiconductor layer of the first light emitting diode, a second upper electrode electrically connected to the first semiconductor layer and insulated from the second semiconductor layer of the second light emitting diode, in which the first and second light emitting diodes are spaced apart from each other to expose the substrate, the first upper electrode has a protrusion electrically connected to the second semiconductor layer of the second light emitting diode and covering portions of the exposed substrate, the first light emitting diode, and the second light emitting diode, and the second upper electrode has a groove.
    Type: Grant
    Filed: April 24, 2020
    Date of Patent: October 5, 2021
    Assignee: Seoul Viosys Co., Ltd.
    Inventors: Jong Min Jang, Jong Hyeon Chae, Joon Sup Lee, Daewoong Suh, Hyun A Kim, Won Young Roh, Min Woo Kang
  • Patent number: 11121252
    Abstract: The present disclosure provides an LDMOS device and a manufacturing method thereof.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: September 14, 2021
    Assignees: Semiconductor Manufacturing (Beijing) Intel Corporation, Semiconductor Manufacturing (Shanghai) International Corporation
    Inventors: Deyan Chen, Mao Li, Leong Tee Koh, Dae-Sub Jung
  • Patent number: 11121075
    Abstract: Aspects of the disclosure are directed to an integrated circuit. The integrated circuit may include a signaling interconnect having a narrow trench disposed within a metallization layer, and a power rail having a wide trench disposed within the metallization layer, wherein the signaling interconnect comprises non-copper material and the power rail comprises copper. The non-copper material may include at least one of ruthenium (Ru), tungsten (W), aluminum (Al), and cobalt (Co). The signaling interconnect and power rail may be processed in a common chemical mechanical polishing step and have approximately the same trench depth. A metal cap may be deposited on top of the power rail.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: September 14, 2021
    Assignee: Qualcomm Incorporated
    Inventors: Mustafa Badaroglu, Kern Rim
  • Patent number: 11114463
    Abstract: A semiconductor device includes gate electrodes stacked along a direction perpendicular to an upper surface of a substrate, the gate electrodes extending to different lengths in a first direction, and each gate electrode including subgate electrodes spaced apart from each other in a second direction perpendicular to the first direction, and gate connection portions connecting subgate electrodes of a same gate electrode of the gate electrodes to each other, channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, and dummy channels extending through the gate electrodes perpendicularly to the upper surface of the substrate, the dummy channels including first dummy channels arranged in rows and columns, and second dummy channels arranged between the first dummy channels in a region including the gate connection portions.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: September 7, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Jun Shin, Hyun Mog Park, Joong Shik Shin
  • Patent number: 11101419
    Abstract: A package structure of light-emitting diode includes a conductive chip-bonding base board, a conductive wire-bonding base board, a light-emitting diode chip, a first wire, a second wire, and a transparent glue bulk. The light-emitting diode chip is electrically connected to the chip-bonding base board and the wire-bonding base board via the first wire and the second wire. The transparent glue bulk wraps the light-emitting diode chip, the first wire, and the second wire. The transparent glue bulk forms a light-guide structure extending through the gap between the chip-bonding base board and the wire-bonding base board, such that both of the two side surfaces of the package structure of light-emitting diode are able to emit light.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: August 24, 2021
    Assignee: SHENZHEN YONG YU PHOTOELECTRIC CO, LTD
    Inventor: Yong-Bing Zhang
  • Patent number: 11101226
    Abstract: A method and a high-frequency module that includes a high frequency die that may include multiple die pads; a substrate that may include a first buildup layer, a second buildup layer and a core that is positioned between the first buildup layer and a second buildup layer; a line card that may include multiple line card pads; and multiple conductors that pass through the substrate without reaching a majority of a depth of the core, and couple the multiple die pads to the multiple line card pads.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: August 24, 2021
    Assignees: DustPhotonics Ltd., XSIGHT LABS LTD.
    Inventors: Guy Koren, Ben Rubovitch
  • Patent number: 11094746
    Abstract: An imaging device includes: pixels arranged one-dimensionally or two-dimensionally, each of the pixels including an electrode that is electrically connected to the other pixels, a charge capturing unit that is separated from the other pixels, and a photoelectric conversion layer that is located between the electrode and the charge capturing unit, the photoelectric conversion layer being continuous among the pixels. The photoelectric conversion layer contains semiconductor carbon nanotubes, and one of a first substance and a second substance, the first substance having an electron affinity larger than that of the semiconducting carbon nanotubes, the second substance having a ionization energy smaller than that of the semiconductor carbon nanotubes.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: August 17, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Katsuya Nozawa
  • Patent number: 11088301
    Abstract: The present disclosure relates to a display device and, in particular, a display device using a semiconductor light-emitting device. The display device according to the present disclosure comprises: a substrate having a wiring electrode; a plurality of semiconductor light-emitting elements are electrically connected to the wiring electrode; a plurality of fluorescent substance layers for converting a wavelength of light; a wavelength conversion layer having a plurality of light-emitting elements formed from a plurality of fluorescent substance layers, and a color filter disposed so as to cover the wavelength conversion layer, where at least one of the plurality of fluorescent substance layers has a plurality of layers.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: August 10, 2021
    Assignee: LG ELECTRONICS INC.
    Inventors: Hwanjoon Choi, Yonghan Lee
  • Patent number: 11087810
    Abstract: A perpendicularly magnetized magnetic tunnel junction (p-MTJ) is disclosed wherein a free layer (FL) has a first interface with a MgO tunnel barrier, a second interface with a Mo or W Hk enhancing layer, and is comprised of FexCoyBz wherein x is 66-80, y is 5-9, z is 15-28, and (x+y+z)=100 to simultaneously provide a magnetoresistive ratio >100%, resistance x area product <5 ohm/?m2, switching voltage <0.15 V (direct current), and sufficient Hk to ensure thermal stability to 400° C. annealing. The FL may further comprise one or more M elements such as O or N to give (FexCoyBz)wM100-w where w is >90 atomic %. Alternatively, the FL is a trilayer with a FeB layer contacting MgO to induce Hk at the first interface, a middle FeCoB layer for enhanced magnetoresistive ratio, and a Fe or FeB layer adjoining the Hk enhancing layer to increase thermal stability.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: August 10, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hideaki Fukuzawa, Vignesh Sundar, Yu-Jen Wang, Ru-Ying Tong
  • Patent number: 11081531
    Abstract: An organic light emitting diode display device includes a lower substrate, a plurality of lower electrodes, a light emitting layer, an upper electrode, and a first functional module. The lower substrate includes a first module region that includes sub-pixel regions and transmissive regions, and a display region that surrounds the first module region and includes the sub-pixel regions. The lower electrodes are respectively disposed on the lower substrate in the sub-pixel regions in the first module region. The light emitting layer is disposed on the lower electrodes, and includes a first opening between two adjacent lower electrodes. The upper electrode is disposed on the light emitting layer, and includes a second opening that overlaps the first opening. The first functional module is disposed on a bottom surface of the lower substrate in the first module region.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: August 3, 2021
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Wonje Cho
  • Patent number: 11081457
    Abstract: In an embodiment, a semiconductor package includes a first transistor device having first and second opposing surfaces, a first power electrode and a control electrode arranged on the first surface and a second power electrode arranged on the second surface. A first metallization structure arranged on the first surface includes a plurality of outer contact pads which includes a protective layer of solder, Ag or Sn. A second metallization structure is arranged on the second surface. A conductive connection extending from the first surface to the second surface electrically connects the second power electrode to an outer contact pad of the first metallization structure. A first epoxy layer arranged on side faces and on the first surface of the transistor device includes openings which define a lateral size of the plurality of outer contact pads and a package footprint.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: August 3, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Thomas Feil, Danny Clavette, Paul Ganitzer, Martin Poelzl, Carsten von Koblinski
  • Patent number: 11075323
    Abstract: A method of producing a radiation-emitting component includes: A) providing a dielectric layer that degrades against environmental influences; B) applying a first protective layer to the dielectric layer by an atomic layer deposition method, wherein the first protective layer includes elemental Si or in a compound; and C) applying a second protective layer to the first protective layer, the second protective layer including elemental Si, wherein a layer thickness of the first protective layer is less than or equal to 1 nm so that the first protective layer reduces or prevents a degradation of the dielectric layer.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: July 27, 2021
    Assignee: OSRAM OLED GmbH
    Inventor: Andreas Rückerl
  • Patent number: 11069639
    Abstract: In an embodiment, a module includes a first electronic device in a first device region and a second electronic device in a second device region. The first electronic device is operably coupled to the second electronic device to form a circuit. Side faces of the first electronic device and of the second electronic device are embedded in, and in direct contact with, a first epoxy layer.
    Type: Grant
    Filed: February 22, 2019
    Date of Patent: July 20, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Thomas Feil, Danny Clavette, Carsten von Koblinski
  • Patent number: 11062924
    Abstract: A semiconductor packaging apparatus and methods of manufacturing semiconductor devices using the same. The semiconductor packaging apparatus includes a process unit, and a controller associated with the process unit. The process unit includes a bonding part that bonds a semiconductor substrate and a carrier substrate to each other to form a bonded substrate, a cooling part that cools the bonded substrate, and a detection part in the cooling part and configured to detect a defect of the bonded substrate. The controller is configured to control the process unit using data obtained from the detection part.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: July 13, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Junghyun Cho, Sang-Geun Park, Dongseok Baek, Jaehyuk Choi
  • Patent number: 11063150
    Abstract: A semiconductor device may include active fins each of which extends in a first direction on a substrate, the active fins being spaced apart from each other in a second direction different from the first direction, a conductive structure extending in the second direction on the substrate, the conductive structure contacting the active fins, a first diffusion break pattern between the substrate and the conductive structure, the first diffusion break pattern dividing a first active fin of the active fins into a plurality of pieces aligned in the first direction, and a second diffusion break pattern adjacent to the conductive structure on the substrate, the second diffusion break pattern having an upper surface higher than a lower surface of the conductive structure, and dividing a second active fin of the active fins into a plurality of pieces aligned in the first direction.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: July 13, 2021
    Assignee: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Sang-Min Yoo, Byung-Sung Kim, Ju-Youn Kim, Bong-Seok Suh, Hyung-Joo Na, Sung-Moon Lee, Joo-Ho Jung, Eui-Chul Hwang