Abstract: A light-emitting panel, a method making same, and a display panel are disclosed in the present disclosure. The light-emitting panel includes a light-emitting board which includes a substrate; a first metal layer disposed on the substrate; a gate insulating layer covering the first metal layer; and a second metal layer on a side of the gate insulating layer away from the first metal layer. The second metal layer includes a connection portion located in the bonding area of the light-emitting board, and a conductive protection layer formed by chemical plating is disposed on a surface of the connection portion.

Abstract: Disclosed in the embodiments of the present disclosure are a display panel and a display device. The display panel includes: a display area and a peripheral area surrounding the display area, the display area includes a first display area and a second display area; a plurality of virtual pixel circuits and a plurality of drive pixel circuits, the plurality of virtual pixel circuits are arranged in the peripheral area, and the plurality of drive pixel circuits are arranged in the second display area; the plurality of first light emitting devices are arranged in the first display area, and the plurality of second light emitting devices are arranged in the second display area; the virtual pixel circuit is electrically connected with the first light emitting device, and the drive pixel circuit is electrically connected with the second light emitting device.

Abstract: This organic-EL display apparatus comprises: a substrate with a drive circuit comprising a thin-film transistor (TFT), a planarizing layer to cover the drive circuit, and an organic light-emitting element formed upon the surface of the planarizing layer facing the opposite direction from the drive circuit. The TFT comprises a drain electrode, a source electrode, and a semiconductor layer that includes regions to be a channel of TFT and partially overlaps with the source and drain electrodes. Respective parts of a first conductor layer forming the drain electrode and a second conductor layer forming the source electrode are arranged in an alternating manner along a prescribed direction, and the region to be the channel is sandwiched between the part of the first conductor layer and the part of the second conductor layer.

Abstract: A semiconductor device with multiple silicide regions is provided. In embodiments a first silicide precursor and a second silicide precursor are deposited on a source/drain region. A first silicide with a first phase is formed, and the second silicide precursor is insoluble within the first phase of the first silicide. The first phase of the first silicide is modified to a second phase of the first silicide, and the second silicide precursor being soluble within the second phase of the first silicide. A second silicide is formed with the second silicide precursor and the second phase of the first silicide.

Abstract: An OLED substrate is provided, which comprises a light emitting region and a transparent region, wherein the OLED substrate comprises a substrate and a display layer on the substrate, and a portion of the display layer located in the transparent region has a first hollow part. A method for manufacturing an OLED substrate and a transparent display comprising an OLED substrate are further provided.

Abstract: A display device includes a display panel including a display area and a non-display area surrounding the display area, and a metal wiring layer disposed on at least a portion of the non-display area, an encapsulation substrate disposed on the display panel, a sealing member which is disposed between the display panel and the encapsulation substrate and bonds the display panel to the encapsulation substrate and a first fusion region provided in at least a partial region between the sealing member and the encapsulation substrate, where the first fusion region has no physical boundary, and where at least a portion of the sealing member is disposed on the metal wiring layer in the non-display area, and the first fusion region is separated from the metal wiring layer while overlapping the metal wiring layer in a thickness direction.

Abstract: A semiconductor device includes a memory stack on a substrate, the memory stack including gate electrodes, insulating layers and mold layers, the mold layers being disposed at the same levels as the gate electrodes in a through electrode area, a channel structure extending vertically through the gate electrodes in a cell array area, and a dam structure disposed between the isolation insulating layers and surrounding the through electrode area in a top view. The dam structure includes a dam insulating layer having a dam shape, an inner insulating layer inside the dam insulating layer, and an outer insulating layer outside the dam insulating layer. The inner insulating layer includes first protrusions protruding in a horizontal direction, and the outer insulating layer includes second protrusions protruding in the horizontal direction.

Abstract: A method includes forming a fin extending above an isolation region. A sacrificial gate stack having a first sidewall and a second sidewall opposite the first sidewall is formed over the fin. A first spacer is formed on the first sidewall of the sacrificial gate stack. A second spacer is formed on the second sidewall of the sacrificial gate stack. A patterned mask having an opening therein is formed over the sacrificial gate stack, the first spacer and the second spacer. The patterned mask extends along a top surface and a sidewall of the first spacer. The second spacer is exposed through the opening in the patterned mask. The fin is patterned using the patterned mask, the sacrificial gate stack, the first spacer and the second spacer as a combined mask to form a recess in the fin. A source/drain region is epitaxially grown in the recess.

Abstract: An array substrate is provided, including a substrate, wherein the substrate is provided with a plurality of electrodes and a plurality of first signal lines, each of the electrodes being correspondingly connected with a first signal line. In some examples, the first signal lines extend in the same direction. In some examples, at least two of the plurality of first signal lines are located in different layers of an insulating spacer from each other. In some examples, orthographic projections on the substrate of at least two of the first signal lines in the different layers at least partially overlap. Accordingly, a light field display device comprising the array substrate is also provided. The array substrate can reduce a light-emitting point size and increase a density distribution of light-emitting points.

Abstract: A semiconductor memory device is provided. The semiconductor memory device includes a via above a substrate, a dielectric layer over the via, a first source/drain feature above the dielectric layer, a first channel feature above the first source/drain feature, a second source/drain feature above the first channel feature, and a gate line laterally spaced apart from the first source/drain feature, the first channel feature and the second source/drain feature. The gate line passes through the dielectric layer and is on the via.

Abstract: An electro-optical device includes a DA conversion circuit to convert 10 bits of data into an analog voltage output to a data line. The DA conversion circuit includes a first DA conversion circuit to convert upper 5 bits into a voltage and outputs converted voltage to the data line, a second DA conversion circuit to convert lower 5 bits into a voltage and outputs converted voltage to a relay line, and a coupling capacitance including one end electrically coupled to the second DA conversion circuit and another end electrically coupled to the data line, wherein the first DA conversion circuit includes a capacitance element corresponding to the upper 5 bits and is arranged in the Y direction along the data line, and the second DA conversion circuit includes a capacitance element corresponding to the lower 5 bits and is arranged in the Y direction along the data line.

Abstract: Some embodiments relate to a method for manufacturing a memory device. The method includes forming a bottom electrode over a substrate. A heat dispersion layer is formed over the bottom electrode. A dielectric layer is formed over the heat dispersion layer. A top electrode is formed over the dielectric layer. The heat dispersion layer comprises a first dielectric material.

Abstract: A method of manufacturing a display apparatus includes providing a substrate, forming a display unit defining an opening portion in a display region over the substrate, forming a thin film encapsulation layer to seal the display unit, forming a touch electrode over the thin film encapsulation layer, forming a touch insulating film covering the touch electrode such that the thin film encapsulation layer and the touch insulating film are sequentially stacked and formed over the substrate in the opening portion, forming a touch contact hole by removing a portion of the touch insulating film to expose a portion of the touch electrode, and removing a portion of the touch insulating film and a portion of the thin film encapsulation layer formed in the opening portion to expose a portion of the substrate during the forming of the touch contact hole.

Abstract: The present disclosure provides an organic light-emitting display panel, a method of manufacturing the organic light-emitting display panel, and a display apparatus. The organic light-emitting display panel includes: a substrate having an opening passing through the substrate; a pixel array disposed on the substrate and including a plurality of pixels; an isolation part disposed between the plurality of pixels and the opening and surrounding the opening, wherein the isolation part includes: a first layer disposed on the substrate, wherein the first layer includes a first portion and a second portion which are sequentially stacked in a direction away from the substrate, and an orthogonal projection of the first portion on the substrate falls within an orthogonal projection of the second portion on the substrate; and a second layer disposed on a surface of the first layer away from the substrate.

Abstract: A display apparatus includes a substrate including a first display area and a second display area. The second display area includes a transmission area, a plurality of first opposite electrodes and a plurality of second opposite electrodes each corresponding to the first display area, and a plurality of third opposite electrodes and a plurality of fourth opposite electrodes each corresponding to the second display area and surrounding at least a portion of the transmission area. A shape of each of the plurality of first opposite electrodes is the same as that of each of the plurality of third opposite electrodes.

Abstract: Provided are a display panel including: a first component, a second component, and a bending component connecting the first component and the second component; wherein, the first component has a display surface, and the bending component has a via passing through the bending component in a direction perpendicular to the display surface. A display device is also provided.

Abstract: Embodiment described herein provide a thermal treatment process following a high-pressure anneal process to keep hydrogen at an interface between a channel region and a gate dielectric layer in a field effect transistor while removing hydrogen from the bulk portion of the gate dielectric layer. The thermal treatment process can reduce the amount of threshold voltage shift caused by a high-pressure anneal. The high-pressure anneal and the thermal treatment process may be performed any time after formation of the gate dielectric layer, thus, causing no disruption to the existing process flow.

Abstract: A display device includes a substrate including a first surface, and a second surface opposite the first surface, and defining a through portion passing therethrough, a pixel array including a plurality of pixels surrounding the through portion at the first surface, a plurality of scan lines extending along a first direction for providing scan signals to the pixels, and a plurality of data lines extending along a second direction crossing the first direction for providing data signals to the pixels, the plurality of data lines including first and second data lines adjacent the through portion at different layers, and having at least a portion thereof curved along a perimeter of the through portion.

Abstract: A semiconductor device includes a first device fin and a second device fin that are each located in a first region of the semiconductor device. The first region has a first pattern density. A first dummy fin is located in the first region. The first dummy fin is disposed between the first device fin and the second device fin. The first dummy fin has a first height. A third device fin and a fourth device fin are each located in a second region of the semiconductor device. The second region has a second pattern density that is greater the first pattern density. A second dummy fin is located in the second region. The second dummy fin is disposed between the third device fin and the fourth device fin. The second dummy fin has a second height that is greater than the first height.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to diode triggered Silicon controlled rectifiers and methods of manufacture. The structure includes a diode string comprising a first type of diodes and a second type of diode in bulk technology in series with the diode string of the first type of diodes.