Patents Examined by Lucien U. Toplu
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Patent number: 5887167Abstract: A synchronization arrangement provides writer and reader entities access to an information resource, such as a trace buffer, located in a registry of a computer. The arrangement comprises a counter upon which atomic increments are performed to allocate entries of the trace buffer for temporarily storing trace message fragments provided by the writer entities. The arrangement also comprises reassembly queues for temporarily storing the message fragments sequentially retrieved from the trace buffer by the reader entities.Type: GrantFiled: November 3, 1995Date of Patent: March 23, 1999Assignee: Apple Computer, Inc.Inventor: Carl D. Sutton
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Patent number: 5884077Abstract: A method and system are disclosed in which, when the load of a processor in a given computer is high, a processor is borrowed from another computer. The computer from which the processor is borrowed is selected based on an acquired load state of the other computer, and a processor lending request is issued to the selected computer. The computer which received the processor lending request selects a processor for lending, and causes the selected processor to execute a process of the computer which issued the lending request. This distributes the load on the processor by utilizing the processor resources of other computers.Type: GrantFiled: August 30, 1995Date of Patent: March 16, 1999Assignee: Canon Kabushiki KaishaInventor: Shigeo Suzuki
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Patent number: 5881291Abstract: A compiler and compilation method for processing a source program in a programming language in the Scheme/Lisp family into a representation known as continuation-passing style (CPS) before generating object code, with optimization also being involved in the processing. To simplify the code generator and optimization, and to allow the same code generator to be used for both non-loop as well as for loop functions, novel algorithms are described which find in the standard CPS intermediate tree sets of non-continuation lambda expressions with a common continuation, which can then be converted to optimized CPS code that can be processed by the same code generator as non-loop continuation functions.Type: GrantFiled: August 20, 1997Date of Patent: March 9, 1999Inventor: Jeffrey E. Piazza
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Patent number: 5881286Abstract: A computer-implemented method and apparatus in a computer system for inter-process communication. A first procedure allocates a first buffer in a first memory space shared by the first procedure (e.g. a client process) and a second procedure (e.g. a kernel or server process). The first procedure then marshals arguments for communicating with the second procedure in the first buffer. The first procedure indicates that a message for the second procedure is being passed and passes a first reference to the first buffer in the first memory space to the second procedure. The second procedure detects the indication of the message by the first procedure. The second procedure then references the first buffer and copies the arguments contained in the first buffer into a temporary buffer. The second procedure can then deallocate the first buffer.Type: GrantFiled: February 12, 1997Date of Patent: March 9, 1999Assignee: Sun Microsystems, Inc.Inventors: Panagiotis Kougiouris, Graham Hamilton
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Patent number: 5878205Abstract: A method and system are provided for executing a service processor request within a data processing system having one or more processors within a central processing complex, each of the processors within the central processing complex including allocatable processor resources. Each of the processors within the central processing complex is provided with the capability of processing selected service processor requests by reserving a portion of the allocatable processor resources within each of the processors for such purpose. A service processor request within the central processing complex is initially processed utilizing at least one of the processors in response to receiving a service processor request, if sufficient processor resources are available to process the service processor request within the reserved portion of the allocatable resources.Type: GrantFiled: November 27, 1996Date of Patent: March 2, 1999Assignee: International Business Machines CorporationInventors: Paul Gregory Greenstein, John Ted Rodell, Michael Allen Wright
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Patent number: 5872970Abstract: A system and method for automating the process of monitoring batch production jobs, being executed on a plurality of computer systems, for abnormal ends (ABENDs) and exceptions, and for integrating a plurality of tools needed to monitor and fix jobs to provide Production Operations personnel a single, integrated environment for performing these tasks. The present invention automates the monitoring process by searching for exceptions and reporting them to the user. The present invention comprises a computer workstation, operating in a client/server environment, connected to multiple logical data centers via a standard data communications link to provide the user with a single interface for multiple platforms (MVS, UNIX, OS/2, etc.) and to continuously monitor all specified jobs at each logical data center for ABENDs and exceptions.Type: GrantFiled: June 28, 1996Date of Patent: February 16, 1999Assignee: MCIWORLDCOM, Inc.Inventors: Christopher C. Pickett, John F. Baker, Robert V. Hardisty, IV, Anthony A. Main, Gilbert O. Kindt, Jr., Elizabeth A. Mackey
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Patent number: 5872962Abstract: The present invention provides a program control system comprises plural programs each of which includes an instruction to execute a process corresponding to each of plural statuses of the system, a program memory for storing the plural programs, a program counter for outputting an address of the memory at which a part of the plural programs to be executed is stored, the address including a flag which indicates one of the plural statuses, and execution means for reading one of the programs from the program memory in accordance with the address output by the program counter and executing the read program.Type: GrantFiled: April 18, 1996Date of Patent: February 16, 1999Assignee: Fuji Xerox Co., Ltd.Inventors: Takanori Hisanaga, Fumiyoshi Kawase, Koh Kamizawa
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Patent number: 5867691Abstract: An inter-hierarchy synchronizing system and an LSI include a plurality of function blocks taking a hierarchical structure and having timing systems expressed by timing variables independent of each other and inter-hierarchy synchronizing blocks disposed these hierarchies. This synchronizing block has: an input event temporary storage part for receiving and storing an input event generation signal group from a higher-level block; an activation timing judging part for judging activations of a plurality of function blocks and transmitting activation signals; an output event temporary storage part for receiving and storing output event generation signals including a completion signal from lower-level blocks; and a final completion signal judging part for judging a final completion state on the basis of a signal from the output event temporary storage part and transmitting a final completion signal to the high-block.Type: GrantFiled: March 15, 1993Date of Patent: February 2, 1999Assignee: Kabushiki Kaisha ToshibaInventor: Hajime Shiraishi
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Patent number: 5862376Abstract: In a system and method for managing repeated lock requests to synchronize an object with a particular thread, each lockable object has a lock datum and each thread can repeatedly request a lock for an object without knowing whether the thread is already synchronized with the object. Associated with each thread are a pair of locking registers and a pair of stack data structures. The registers reference the last object whose lock was acquired by the thread and contain a redundancy count indicating the number of consecutive lock requests for the object. The stack data structures contain references to other objects that are currently synchronized with the thread and an associated redundancy count for each such object. A locking procedure acquires the lock of an object only if a reference to the object is not contained in the registers or the stack data structures.Type: GrantFiled: June 24, 1996Date of Patent: January 19, 1999Assignee: Sun Microsystems, Inc.Inventors: Guy L. Steele, Jr., William N. Joy
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Patent number: 5857195Abstract: A method of developing a self-describing database management system comprises the steps of holding definition data of a database management system to be developed as data on a database and creating a database management system to be developed by the use of an existing database management system. The database management system to be developed comprises a data definition processing execution program and a bind processing execution program. These two programs include a process to permit access to definition data which form database, and are executed based on the definition data on the database.Type: GrantFiled: May 21, 1996Date of Patent: January 5, 1999Assignee: Fujitsu LimitedInventors: Katsumi Hayashi, Kazuhiko Saitou, Hiroshi Ohsato, Masaaki Mitani, Tomohiro Hayashi, Takashi Obata, Yutaka Sekine, Mitsuhiro Ura, Takuji Ishii
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Patent number: 5850551Abstract: A compiler comprises a loop detecting unit for extracting information of loops, and a high-speed loop applying unit generating a first loop exclusive instruction, placing the instruction immediately before the entry of a loop, generating second loop exclusive instructions, and placing the instruction at each place to branch to the entry of the loop.Type: GrantFiled: January 22, 1996Date of Patent: December 15, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Shuichi Takayama, Nobuo Higaki, Nobuki Tominaga, Shinya Miyaji
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Patent number: 5845116Abstract: A distributed computing system, having a plurality of computers that differ from each other in terms of performance, load, and type, uniformly manages local priority schemes adapted in the respective computers by utilizing the concept of "urgency" or "time limit". Each of the computers includes a priority level conversion procedure for performing a conversion between an urgency level and a priority level of processing in accordance with the performance and the load of the computer, and a priority level changing procedure for changing a priority level of a program, which executes the processing, in accordance with a priority level indicated by the priority level conversion procedure.Type: GrantFiled: April 13, 1995Date of Patent: December 1, 1998Assignee: Hitachi, Ltd.Inventors: Masahiko Saito, Takanori Yokoyama, Masaru Shimada, Kunihiko Tsunedomi, Tomoaki Nakamura
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Patent number: 5835767Abstract: A method and system are disclosed for limiting the processing power of a CPU or CPUs in a multi-processing system comprising at least one constrained or hobbled CPU and a main memory. The novel method includes executing a high priority process on the CPU which effectively interrupts the processing of a task at a predetermined time T.sub.1 during a full time cycle T.sub.0 -T.sub.2 rendering the CPU unavailable for a predetermined period of time (T.sub.1 to T.sub.2) which represents a predetermined percentage of the CPUs full computing power. The task that is interrupted is continued at the start of the next time cycle of the CPU so that all tasks are completed. The power of any CPU so hobbled may be decreased by a predetermined percentage of full power by decreasing the processing time cycle between T.sub.0 and T.sub.1, without the need for hardware or operating system modification.Type: GrantFiled: August 19, 1994Date of Patent: November 10, 1998Assignee: Unisys CorporationInventor: James J. Leigh
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Patent number: 5835765Abstract: A computer operation management system comprises a computer having a central processing unit, a main memory and, an auxiliary memory, an operating system for operating the computer so as for the computer to execute plural application, programs simultaneously and a process manager for monitoring an execution status of plural application programs to control the number of application programs simultaneously executed and their execution priorities.Type: GrantFiled: October 4, 1995Date of Patent: November 10, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Hajime Matsumoto
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Patent number: 5826084Abstract: A microprocessor (26) may multi-task a plurality of programs, and those programs include a virtual program (38 or 40) operable in a virtual mode and a monitor program (34) operable using protected mode semantics. The microprocessor includes input circuitry (INTR) for receiving an external interrupt request signal corresponding to an external interrupt directed to the virtual program, and additional input circuitry (INT#0-7) for receiving an external interrupt number corresponding to the external interrupt directed to the virtual program. The microprocessor further includes an interrupt handling circuit (30) comprising circuitry for identifying an interrupt vector and presenting an interrupt corresponding to the external interrupt request number. Lastly, the microprocessor includes control circuitry (28) coupled to the interrupt handling circuit.Type: GrantFiled: March 25, 1997Date of Patent: October 20, 1998Assignee: Texas Instruments IncorporatedInventors: James E. Brooks, Robert R. Collins, Jonathan H. Shiell
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Patent number: 5826239Abstract: A system and method for distributed resource management in a computer network operating under control of workflow management software system (WFMS) to manage plural resources to perform a workflow process that includes multiple process activities, uses two-step resource assignment to manage resources at two levels. The resources are grouped by capabilities into resource groups controlled by a local resource manager (LRM), which maintains dynamic status of each resource, such as availability and load, as well as their roles and addresses. A global resource manager (GRM) stores resource data only about the groups: capabilities and status. The WFMS invokes the GRM, requesting a specified resource activity. The GRM checks the stored capabilities and status among the resource groups, selects the resource group capable of the specified activity and available, and forwards the request to the LRM for the selected group.Type: GrantFiled: December 17, 1996Date of Patent: October 20, 1998Assignee: Hewlett-Packard CompanyInventors: Weimin Du, Graham Eddy, Ming-Chien Shan
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Patent number: 5822585Abstract: An object-oriented framework is used to build cooperative objects. Objects can span processes on different machines connected by a network. The objects are used to build distributed or cooperative applications which execute in multiple environments without having to write significant additional code to enable such functionality. Each cooperative object has two parts: an agent object and a server object. Requests for services are made to agent objects by the application program (via an asynchronous interface) as if they were local objects. The server object performs the requested service in the server process, possibly using other server objects or systems (e.g., DB/2), and returns the result to the associated agent object. A Distributor and Dispatcher object in each process handle communication between agent and server objects. The Distributor receives all incoming messages and routes them to the appropriate objects in the process. The Dispatcher is used for sending messages to other objects.Type: GrantFiled: May 30, 1997Date of Patent: October 13, 1998Assignee: Compuware CorporationInventors: William Noble, Michael Knight, Karen Nelson-Katt
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Patent number: 5822584Abstract: A new and improved apparatus and method for rebuilding a replacement disk of a fault tolerant, mass storage drive array subsystem of a computer system. The method calls for a microprocessor to check a stripe for consistency. If the stripe is inconsistent, the microprocessor rebuilds a predetermined number of stripes. If the checked stripe is consistent, then the microprocessor checks a next stripe and repeats the above-described process. Because the drive array subsystem receives both system requests and rebuild requests, the present invention allows a user to select the drive array subsystem's priority in processing system requests versus rebuild requests, thereby allowing greater system access to the drive array subsystem during peak times of system requests.Type: GrantFiled: October 13, 1995Date of Patent: October 13, 1998Assignee: Compaq Computer CorporationInventors: Mark J. Thompson, Stephen M. Schultz
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Patent number: 5819093Abstract: A system and method for providing a distributed debugger system for a distributed target computer application are disclosed wherein the programmer/developer of the application can be at one host machine and wherein the application being developed makes use of objects and object implementations which may be located on a different host machine which is unknown to the programmer/developer. The system and method provides solutions to problems which are encountered in trying to debug a new application which is associated with the use of objects in a widely distributed, object oriented, client-server system. In a distributed object environment, requests and replies are made through an Object Request Broker (ORB) that is aware of the locations and status of objects. One architecture which is suitable for implementing such an ORB is provided by the Common Object Request Broker Architecture (CORBA) specification.Type: GrantFiled: March 3, 1995Date of Patent: October 6, 1998Assignee: Sun Microsystems, Inc.Inventors: Andrew E. Davidson, Jon A. Masamitsu
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Patent number: 5819031Abstract: A method of controlling a micro device linked to a mainframe in such a manner that a file present in the mainframe can be accessed from the micro device. In response to a request for file access from a user program, reference is made to a table in which a plurality of command sequences for use in composing transmission packets is stored, corresponding respectively to a plurality of kinds of requests. Each of the command sequences includes a plurality of commands, which are executed to obtain respective components of a transmission packet. A transmission packet is composed in accordance with the command sequence corresponding to the kind of request from the user program, and the resulting transmission packet is transmitted to the mainframe.Type: GrantFiled: November 22, 1994Date of Patent: October 6, 1998Assignee: Canon Kabushiki KaishaInventor: Shinichi Iwamoto