Patents Examined by Mamadou Diallo
  • Patent number: 10163691
    Abstract: A method of fabricating a semiconductor device includes forming a low-k dielectric layer over a substrate and depositing a cap layer over the low-k dielectric layer. A treatment process is performed to the cap layer. After the treatment process to the cap layer is performed, the low-k dielectric layer is etched to form a plurality of trenches using the cap layer as an etching mask.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Cheng Shih, Chia Cheng Chou, Chung-Chi Ko
  • Patent number: 10156647
    Abstract: A method is for the deconvolution of a statistically noisy spectral dataset is described comprising the steps of: a. obtaining a spectroscopically resolved dataset of measured flux from a sample that has been collected using a suitable detector radiation system; b. generating an initial estimate of the true spectrum; c. modifying the estimate of the true spectrum by a response function of the detector used to collect the measured flux dataset so as to generate an estimate flux dataset; d. computing a merit value for statistical fit between the measured flux dataset and the estimate flux dataset; e. applying a perturbation to a value of the estimate of the true spectrum; f.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: December 18, 2018
    Assignee: Kromek Limited
    Inventors: Benjamin John Cantwell, Andrew Keith Powell, Ian Radley
  • Patent number: 10156466
    Abstract: A server system for remote monitoring includes a wireless communication interface, a processor, and a storage device. The wireless communication interface receives at least one data packet over wireless communications from a remote monitoring system. The processor processes the data packet including sensor information from a sensor coupled to the remote monitoring system. The storage device stores the sensor information.
    Type: Grant
    Filed: October 2, 2015
    Date of Patent: December 18, 2018
    Assignee: Arthroscopic Surgery Associates Corporation
    Inventors: Gregory M. Glenn, Damon Silva, Timothy Henry
  • Patent number: 10157819
    Abstract: In a method of manufacturing a semiconductor device, a thermal treatment is performed on a substrate, thereby forming a defect free layer in an upper layer of the substrate, where a remaining layer of the substrate is a bulk layer. A density of defects in the bulk layer is equal to or more than 1×108 cm?3, where the defects are bulk micro defects. An electronic device is formed over the defect free layer. An opening is formed in the defect free layer such that the opening does not reach the bulk layer. The opening is filled with a conductive material, thereby forming a via. The bulk layer is removed so that a bottom part of the via is exposed. A density of defects in the defect free layer is less than 100 cm?3.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pu-Fang Chen, Victor Y. Lu
  • Patent number: 10157922
    Abstract: A semiconductor device includes an active region comprising a source/drain region and a plurality of poly strips spaced apart and arranged along a first direction crossing over the active region. The first direction is substantially perpendicular to a lengthwise direction of the active region. A first metal pattern is disposed on the poly strips and arranged along the first direction. A plurality of first interconnect plugs is interposed in between the poly strips and the first metal pattern and in between the active region and the first metal pattern. A position of the first interconnect plugs being variable along the first direction.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: December 18, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Cheng Lin, Kam-Tou Sio, Jiann-Tyng Tzeng, Charles Chew-Yuen Young
  • Patent number: 10153416
    Abstract: A package body for a semiconductor device includes a lead frame, an insulating package, and a reflective coating layer. The lead frame has a first electrode and a second electrode separated from each other. The insulating package provides a housing structure and forming a package cavity therein. The package cavity has a reflective side surface formed by the insulating package. The reflective coating layer partially covers the first electrode and the second electrode and forms a reflective bottom surface of the package cavity. Each of the first electrode and the second electrode may have an angled cut. The insulating package may be made of a binder-filler composite containing white pigments. The package body may be an all diffusive integrated reflecting surfaces (AR-IRS) package body, and may be used in an encapsulant-free semiconductor package.
    Type: Grant
    Filed: January 25, 2018
    Date of Patent: December 11, 2018
    Assignee: RADIANT CHOICE LIMITED
    Inventors: Nguyen The Tran, Jiun-Pyng You
  • Patent number: 10145860
    Abstract: Two speed measurements of a moving body are generated using a single signal. A sensor generates a composite signal having a series of pulses where each pulse is generated when an element on a moving body passes the sensor. A sensor conditioning unit decouples the composite signal to generate a first conditioned sub-signal having only an AC signal corresponding to an AC component of the composite signal and a second conditioned sub-signal corresponding to the composite signal that may have either or both AC and DC components. A timer/counter input unit computes a first speed measurement by determining a count of pulses in the first conditioned sub-signal and a first time period or the time period of one pulse. The second conditioned sub-signal is transmitted to an analog-to-digital converter (ADC) and is sampled at a sampling rate to generate a sampled second conditioned sub-signal.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: December 4, 2018
    Assignee: EPRO GMBH
    Inventors: Ernst Hermann Schophuis, Hermann Beeke, Hermann Holtmannspötter
  • Patent number: 10145871
    Abstract: A system for data acquisition and processing includes a selector for obtaining samples from one or more sensors, each of which is configured to collect a sample during one or more sampling intervals forming a dwell period. The selector is configured to obtain only a subset of samples of a complete set of samples that can be collected during a dwell period. A solver is configured to solve an underdetermined system based on the collected samples and a mapping relation/phase function, to jointly determine one or more angles and one or more frequencies of transmissions received by the one or more sensors.
    Type: Grant
    Filed: April 29, 2015
    Date of Patent: December 4, 2018
    Assignee: SIGNIFICS AND ELEMENTS, LLC
    Inventors: Muthu M. Baskaran, Thomas Henretty, Ann Johnson, M. H. Langston, Richard A. Lethin, Janice O. McMahon, Benoit J. Meister, Paul Mountcastle
  • Patent number: 10147605
    Abstract: A process of forming an epitaxial substrate that includes nitride semiconductor layers is disclosed. The process includes steps of; (a) growing a nucleus forming layer on the substrate, and (b) growing a nitride semiconductor layer on the nucleus forming layer. The step (a) sets first and second growth temperatures in an upstream side and a downstream side, respectively, of the substrate for the flow of the source gases, where the first temperature of the upstream side is at least 5° C. but at most 10° C. lower than the second temperature of the downstream side, and the second temperature is higher than 1100° C.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: December 4, 2018
    Assignee: SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Tadashi Watanabe, Hajime Matsuda
  • Patent number: 10141344
    Abstract: A semiconductor device having favorable electric characteristics is provided. The semiconductor device includes a first transistor and second transistor. The first transistor includes a first conductor over a substrate; a first insulator thereover; a first oxide thereover; a second insulator over thereover; a second conductor including a side surface substantially aligned with a side surface of the second insulator and being over the second insulator; a third insulator including a side surface substantially aligned with a side surface of the second conductor and being over the second conductor; a fourth insulator in contact with a side surface of the second insulator, a side surface of the second conductor, and a side surface of the third insulator; and a fifth insulator in contact with the first oxide and the fourth insulator.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: November 27, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kiyoshi Kato, Yuta Endo, Ryo Tokumaru
  • Patent number: 10134674
    Abstract: A method of fabricating a metallization layer of a semiconductor device in which copper is used for an interconnect material and cobalt is used to encapsulate the copper. A material is introduced that will interact with the cobalt to cause a hexagonal-close-packed (HCP) crystal structure of cobalt to change to a face-centered-cubic (FCC) crystal structure of cobalt, the FCC crystal structure providing a resistance of the cobalt to migrate.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: November 20, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Benjamin David Briggs, James J. Kelly, Koichi Motoyama, Roger Allan Quon, Michael Rizzolo, Theodorus Eduardus Standaert
  • Patent number: 10135036
    Abstract: In an organic electroluminescence device (100), a hole transport layer (22) is formed of a cured resin obtained by a ring opening polymerization of a polymerizable compound (a) containing a ring opening polymerizable group in the presence of a polymerization initiator (b). In addition, both of a maximum peak height Rp and a maximum valley depth Rv in an upper surface of the hole transport layer (22) are less than or equal to 14 nm. Accordingly, an organic electroluminescence device having excellent mass productivity and high luminescent efficiency is realized.
    Type: Grant
    Filed: December 14, 2017
    Date of Patent: November 20, 2018
    Assignee: PIONEER CORPORATION
    Inventors: Takahito Oyamada, Naoya Yuzuriha
  • Patent number: 10134829
    Abstract: A display device includes a non-display area adjacent a display area, a thin film transistor, a display element, a thin film encapsulation layer, an organic insulating layer, a power voltage line, and a protective layer. The thin film transistor is on the display area and is connected to the display element. The thin film encapsulation layer covers the display element. The organic insulating layer is between the thin film transistor and display element and extends to the non-display area. The organic insulating layer includes a central portion corresponding to the display area, an outer portion surrounding the central portion, and a division region dividing the central portion and the outer portion and surrounding the display area. The power voltage line is in the non-display area and includes a portion corresponding to the division region. The protective layer covers an upper surface of the power voltage line in the division region.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: November 20, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Juncheol Shin, Jeongho Lee, Hokyoon Kwon, Yanghee Kim
  • Patent number: 10126772
    Abstract: A method for dispatching buildings participating in a demand response program including retrieving a plurality of baseline energy use data sets for the buildings from a baseline data stores; generating data sets for each of the buildings, each having energy consumption values along with corresponding time and outside temperature values, where the energy consumption values within each set are shifted by one of a plurality of lag values relative to the corresponding time and outside temperature values, and where each lag value; performing a regression analysis on each set to yield corresponding regression model parameters and a corresponding residual; determining a least valued indicating a corresponding energy lag for each of the buildings; and using outside temperatures, regression model parameters, and energy lags for all of the buildings to estimate a cumulative energy consumption for the buildings, and to predict a dispatch order reception time for a demand response program event.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: November 13, 2018
    Assignee: ENERNOC, INC.
    Inventors: Husain Al-Mohssen, Richard R. Paradis, Angela S. Bassa
  • Patent number: 10121658
    Abstract: The present invention relates to a method of fabricating a black phosphorus thin film and a black phosphorus thin film thereof and, more particularly, to a method of fabricating a black phosphorus ultrathin film by forming the black phosphorous ultrathin film in a chamber by active oxygen and removing accompanying black phosphorus oxide film water. The black phosphorus ultrathin film has a surface that does not substantially have defects and is uniform in a large area, and has a surface roughness property of 1 nm or less, to represent a high application property to an optoelectronic device and a field effect transistor.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: November 6, 2018
    Assignee: Korea Research Institute of Standards and Science
    Inventors: Hyuksang Kwon, Jeong Won Kim, Eun Seong Lee
  • Patent number: 10121664
    Abstract: A thin film containing a dopant is deposited on a surface of a semiconductor wafer. The semiconductor wafer on which the thin film containing the dopant is deposited is rapidly heated to a first peak temperature by irradiation with light from halogen lamps, so that the dopant is diffused from the thin film into the surface of the semiconductor wafer. The thermal diffusion using the rapid heating achieves the introduction of the necessary and sufficient dopant into the semiconductor wafer without producing defects. The surface of the semiconductor wafer is heated to a second peak temperature by further irradiating the semiconductor wafer with flashes of light from flash lamps, so that the dopant is activated. The flash irradiation which is extremely short in irradiation time achieves a high activation rate without excessive diffusion of the dopant.
    Type: Grant
    Filed: November 21, 2017
    Date of Patent: November 6, 2018
    Assignee: Screen Holdings Co., Ltd.
    Inventors: Kazuhiko Fuse, Hideaki Tanimura, Shinichi Kato
  • Patent number: 10107657
    Abstract: A system (2) for monitoring resource flows at a number of devices (D1, D2, D3) includes a receiving unit (4) which receives data from a number of sensors (S1, S2, S3, S4, S5) configured to detect the flow rate and/or the change in the flow rate at device level, and a number of meters (M1, M2, M3) configured to measure the flow for at least a part of the devices (D1, D2, D3). The system (2) has a calculation module (8) configured to receive information from the sensors (S1, S2, S3, S4, S5) and the meters (M1, M2, M3), and the calculation module (8) includes a mathematical statistical model (38) configured to estimate and/or predict flow of resource and/or performance (e.g., activity) of at least a selection of the devices (D1, D2, D3).
    Type: Grant
    Filed: October 5, 2015
    Date of Patent: October 23, 2018
    Assignee: REMONI APS
    Inventor: Bo Eskerod Madsen
  • Patent number: 10110002
    Abstract: A system and method for reducing an electrical load in a facility with a building automation system, includes first receiving information for a demand response event from an automated demand response server at an automated demand response client. After receipt of a new demand response event, the system determines a plurality of devices of the building automation system to be controlled during the demand response event. Next, the system prepares a schedule of control actions for the plurality of devices during the demand response event. The system then sends control messages to the building automation system to execute the control actions for the plurality of devices according to the schedule of control actions for the demand response event.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: October 23, 2018
    Assignee: Siemens Industry, Inc.
    Inventors: Raphael Imhof, Pornsak Songkakul, Michael J. Marchi, Thomas Rule, Paula Hiller, Florian Ersch
  • Patent number: 10108176
    Abstract: Technology for milling selected portions of a workpiece by a cutting tool of a numerical control machine is described. The described technology provides methods and apparatuses for milling areas of a part so that more aggressive machining parameters can be used in the toolpath, thereby resulting in reduced machining time and load. The technology creates a series of toolpath contours where arcs in the toolpath contours are non-concentric with arcs in other toolpath contours. The selected portions of the workpiece are milled by moving the cutting tool in accordance with the toolpath.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: October 23, 2018
    Assignee: Celeritive Technologies, Inc.
    Inventors: Evan C. Sherbrooke, Glenn Coleman
  • Patent number: 10109690
    Abstract: An object is to provide an organic light-emitting panel and an organic light-emitting device capable of reducing ink repellence at portions of banks intersecting an insulating layer. Light-emitting units of the organic light-emitting panel are separated by the insulating layer and the banks. The insulating layer is disposed between first electrode units that are adjacent in a first direction, and the banks are disposed between first electrode units that are adjacent in a second direction. Portions of the banks that intersect with the insulating layer extend over the insulating layer in the first direction. Each of the portions of the banks over the insulating layer, in lateral cross-section, have a surface where an inclination angle ?1 and an inclination angle ?2 between the surface and a surface of the insulating layer satisfy ?1>20° and ?2>20°.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: October 23, 2018
    Assignee: JOLED INC.
    Inventors: Nobuto Hosono, Tsuyoshi Yamamoto