Patents Examined by Mamadou Diallo
  • Patent number: 10103240
    Abstract: A lateral super junction JFET is formed from stacked alternating P type and N type semiconductor layers over a P-epi layer supported on an N+ substrate. An N+ drain column extends down through the super junction structure and the P-epi to connect to the N+ substrate to make the device a bottom drain device. N+ source column and P+ gate column extend through the super junction but stop at the P-epi layer. A gate-drain avalanche clamp diode is formed from the bottom the P+ gate column through the P-epi to the N+ drain substrate.
    Type: Grant
    Filed: February 10, 2013
    Date of Patent: October 16, 2018
    Assignee: Alpha and Omega Semiconductor Incorporated
    Inventors: Madhur Bobde, Lingpeng Guann, Anup Bhalla, Hamza Yilmaz
  • Patent number: 10102311
    Abstract: A method for estimating a property of an earth formation includes: obtaining a sample of rock; scanning the sample to determine internal rock damage; measuring a deformation parameter of the sample; constructing a mathematical model of the sample that replicates the determined and measured internal rock damage distribution; simulating the one or more tests using the mathematical model; obtaining a rock deformation parameter using the one or more simulated tests corresponding to the measured rock deformation parameter; comparing the rock deformation parameter obtained from the one or more simulated tests to the corresponding measured rock deformation parameter; adjusting parameters of the mathematical model based upon the rock parameter obtained from simulation not being within a selected range of the measured rock parameter; and providing the mathematical model as a verified mathematical model based upon the rock parameter obtained from simulation being within a selected range of the measured rock parameter.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: October 16, 2018
    Assignee: BAKER HUGHES, A GE COMPANY, LLC
    Inventors: Marc Holland, Tobias Hoeink, Wouter Van Der Zee
  • Patent number: 10099000
    Abstract: Methods and systems for identifying a malfunction in the extracorporeal blood circulation of a dialysis machine are disclosed. The malfunction may be identified by detecting at least one state parameter; determining a first evaluation criterion for identifying a malfunction in the extracorporeal blood circulation (FEB); using the first evaluation criterion, making a decision with respect to the presence of a malfunction in the extracorporeal blood circulation, generating a first error signal, and monitoring the detected state parameter; determining at least one further evaluation criterion; using the at least one further evaluation criterion, making a decision with respect to the presence of a malfunction in the extracorporeal blood circulation and generating at least one further error signal; combining the first error signal and the at least one further error signal to result in a combined error signal; and triggering an alarm if the combined error signal exceeds a predetermined limit value.
    Type: Grant
    Filed: February 27, 2015
    Date of Patent: October 16, 2018
    Assignee: B. BRAUN AVITUM AG
    Inventors: Christof Strohhoefer, Jens Schreiber, Jennifer Steger
  • Patent number: 10103299
    Abstract: A light emitting device includes a base member, a light emitting element, a wire, a protective film, first and second resin members, and a light shielding portion. The base member has a conductive member. The wire connects the light emitting element and the conductive member. The protective film covers the conductive member to be spaced apart from a portion of a connecting portion. The first resin member has a first gas barrier property with respect to hydrogen sulfide and a first light resistance. The second resin member has a second gas barrier property with respect to hydrogen sulfide lower than the first gas barrier property and a second light resistance higher than the first light resistance. The light shielding portion is disposed on a surface of the base member and disposed on a line connecting the light emitting element and the first resin member.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: October 16, 2018
    Assignee: NICHIA CORPORATION
    Inventors: Hiroaki Ukawa, Yusuke Hayashi
  • Patent number: 10101153
    Abstract: The invention relates to a method for detecting deviations of an object surface using a comparison between measured data of the surface and specified reference data. A surface description, at least portions of which are parametric, is generated as a target surface model using the specified reference data, and the comparison is carried out using the target surface model and the measured data. The invention likewise relates to a device for detecting deviations of an object surface using a comparison between measured data of the surface and specified reference data.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: October 16, 2018
    Assignee: INB Vision AG
    Inventors: Bernd Michaelis, Tilo Lilienblum, Sebastian Von Enzberg
  • Patent number: 10096569
    Abstract: The present disclosure relates to a method for manufacturing a semiconductor device. The method includes providing a first electronic component including a first metal contact and a second electronic component including a second metal contact, changing a lattice of the first metal contact, and bonding the first metal contact to the second metal contact under a predetermined pressure and a predetermined temperature.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: October 9, 2018
    Assignees: ADVANCED SEMICONDUCTOR ENGINEERING, INC., NATIONAL CHUNG HSING UNIVERSITY
    Inventors: Ying-Ta Chiu, Shang-Kun Huang, Yong-Da Chiu, Jenn-Ming Song
  • Patent number: 10087049
    Abstract: There is disclosed a method of testing an optical door sensor 100 having an emitter 102 for emitting a light signal 104 and a receiver 106 for detecting the light signal 104, the optical door sensor 100 having at least one sensor operating parameter and further having a baseline state in which the receiver 102 can detect a light signal from the emitter 106. The method comprises setting the optical door sensor in an offset state 204, 304, in which a sensor operating parameter is offset from a baseline setting by an offset amount, the baseline setting corresponding to the baseline state of the optical door sensor; conducting a signal test 206 with the optical door sensor in the offset state; and generating an alert 216 when the signal test result is negative for the offset state and the offset amount is less than or equal to a limit margin. The signal test comprises: emitting a light signal from the emitter 208 and determining whether the light signal is detected by the receiver 210.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: October 2, 2018
    Assignee: Ensota Limited
    Inventors: Peter Collins, John Curzon
  • Patent number: 10090382
    Abstract: The disclosure relates to forming single diffusion break (SDB) and end isolation regions in an integrated circuit (IC) structure, and resulting structures. An IC structure according to the disclosure includes: a plurality of fins positioned on a substrate; a plurality of gate structures each positioned on the plurality of fins and extending transversely across the plurality of fins; an insulator region positioned on and extending transversely across the plurality of fins between a pair of the plurality of gate structures; at least one single diffusion break (SDB) region positioned within the insulator region and one of the plurality of fins, the at least one SDB extending from an upper surface of the substrate to an upper surface of the insulator region; and an end isolation region positioned laterally adjacent to a lateral end of one of the plurality of gate structures.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: October 2, 2018
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Hong Yu, Xinyuan Dou, Hui Zhan, Zhenyu Hu
  • Patent number: 10082589
    Abstract: A group of techniques can be used to determine if components of a seismic spread have deviated from a planned path during a coil or other curved and substantially circular acquisition pattern. In one aspect, and in general, the presently disclosed techniques include a computer-readable program storage medium for determining the deviation of spread array element from a planned curved path during a towed-array marine seismic survey. The method comprises: determining a nominal position of the spread array element at a given point in the planned curved path; determining the actual position of the spread array element; and performing an error analysis predicated on the nominal and actual positions.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: September 25, 2018
    Assignee: WesternGeco L.L.C.
    Inventors: Johan Hauan, Rune Hagelund, Stig Solheim
  • Patent number: 10083831
    Abstract: A substrate includes: a support substrate having a first main surface and a surface layer region which includes at least the first main surface and is formed of any one material selected from the group consisting of boron nitride, molybdenum disulfide, tungsten disulfide, niobium disulfide, and aluminum nitride; and a graphene film disposed on the first main surface and having an atomic arrangement oriented in relation to an atomic arrangement of the material forming the surface layer region. Accordingly, the substrate is provided that enables a high mobility to be stably ensured in an electronic device manufactured to include the graphene film forming an electrically conductive portion.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: September 25, 2018
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Masaya Okada, Fuminori Mitsuhashi, Yasunori Tateno, Masaki Ueno
  • Patent number: 10078319
    Abstract: HVAC schedules may be programmed for a thermostat using a combination of pre-existing schedules or templates and automated schedule learning. For example, a pre-existing schedule may be initiated on the thermostat and the automated schedule learning may be used to update the pre-existing schedule based on users' interactions with the thermostat. The preexisting HVAC schedules may be stored on a device or received from a social networking service or another online service that includes shared HVAC schedules.
    Type: Grant
    Filed: December 18, 2015
    Date of Patent: September 18, 2018
    Assignee: Google LLC
    Inventors: Yoky Matsuoka, Anthony M. Fadell, Matthew L. Rogers, David Sloo, Eric A. Lee, Steven A. Hales, Mark D. Stefanski, Rangoli Sharan
  • Patent number: 10079215
    Abstract: An electronic chip including: a plurality of first semiconductor bars of a first conductivity type and of second semiconductor bars of a second conductivity type arranged alternately and contiguously on a region of the first conductivity type; two detection contacts arranged at the ends of each second bar; a circuit for detecting the resistance between the detection contacts of each second bar; insulating trenches extending in the second bars down to a first depth between circuit elements; and insulating walls extending across the entire width of each second bar down to a second depth greater than the first depth.
    Type: Grant
    Filed: October 20, 2017
    Date of Patent: September 18, 2018
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Alexandre Sarafianos, Mathieu Lisart, Jimmy Fort
  • Patent number: 10076089
    Abstract: Described herein is a method of controlling soil moisture, water accumulation and fertilizer distribution in land. Elevation location data for land areas are extracted from two or more pixels of a topographic image including topographic data. Each pixel represents a land area. Wetness indices for the land areas are determined from the elevation and location data, based on the slope between two or more defined areas of land and an upslope contributing area per unit contour length. At risk defined areas of land, e.g., those at risk of accumulating water are identified based on wetness indices. Water is transported from the at risk defined areas of land to another location. The transporting of water reduces the risk of accumulating water in the at risk defined areas of land and improves crop growth potential in those areas.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: September 18, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Upendra D. Chitnis, Levente Klein, Fernando J. Marianno
  • Patent number: 10074970
    Abstract: A CAN bus explosion proof node structure is disclosed which includes a physical parameter sensor, a physical parameter measurement circuit, a master controller, a data storage module, a communication interface module, and a power voltage and current limiting module. The master controller performs service processing of the digital signals, compares them with respective threshold levels to determine whether dangerous situations occur for the explosion proof node, and sends out an alarm when dangerous situations occur for the explosion proof node. The power voltage and current limiting module limits a maximum open circuit voltage and a maximum short circuit current of input power so that explosive gas and dust will not ignite when the nodes are in normal operation or experience failures.
    Type: Grant
    Filed: September 28, 2015
    Date of Patent: September 11, 2018
    Assignees: METTLER TOLEDO (CHANGZHOU) PRECISION INSTRUMENT LTD., METTLER TOLEDO (CHANGZHOU) MEASUREMENT TECHNOLOGY LTD., METTLER TOLEDO (CHANGZHOU) SCALE & SYSTEM LTD.
    Inventors: Ying Zhang, Zhitie Lin, Yangjie Xu
  • Patent number: 10074586
    Abstract: A thermal dissipation device includes a main body and a support member. The main body has an upper surface, a lower surface opposite to the upper surface, and a lateral surface. The main body defines an injection hole extending through the main body, and includes an inner ring protruding from the upper surface and adjacent to the injection hole and an outer ring protruding from the upper surface and adjacent to the lateral surface. The support member connects to the lateral surface of the main body. An upper surface of the inner ring is higher than an upper surface of the outer ring. A first intersection point between the inner ring and the upper surface of the main body is higher than a second intersection point between the outer ring and the upper surface of the main body.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: September 11, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Pin Hung Chiu, Yu Li Chung, Shu Ling Su, Yi Tzu Lin
  • Patent number: 10060834
    Abstract: A failure prediction apparatus includes a state feature amount acquisition unit that acquires plural state feature amounts indicating features of an operating state of an apparatus to be monitored, a statistic acquisition unit that acquires statistics of an environmental physical amount indicating an installation environment of the apparatus to be monitored for a specific period, and a calculation unit that acquires a selection condition corresponding to the statistics acquired by the statistic acquisition unit among plural selection conditions, and calculates probability of a failure occurring in the apparatus to be monitored, using the state feature amount satisfying the acquired selection condition, wherein the plural selection conditions are predetermined for each category of the statistics, and are conditions for selecting each of the state feature amounts required to calculate the probability of the failure occurring in the apparatus to be monitored.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: August 28, 2018
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Norikazu Yamada, Takashi Kusakai
  • Patent number: 10056403
    Abstract: A semiconductor memory includes a memory cell region that includes multiple memory cells stacked above a semiconductor substrate, first and second dummy regions on opposite sides of the memory cell region, each dummy region including multiple dummy cells stacked above the semiconductor substrate, and a wiring that electrically connects dummy cells of the first and second dummy regions that are at a same level above the semiconductor substrate.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: August 21, 2018
    Assignee: Toshiba Memory Corporation
    Inventors: Tomoo Hishida, Sadatoshi Murakami, Ryota Katsumata, Masao Iwase
  • Patent number: 10048217
    Abstract: A method and apparatus for the direct measurement of specific heat at constant pressure (Cp). A control fluid of a known amount is supplied to a near adiabatic test chamber having a volume. A collapsible bladder within the test chamber is inflated with an incompressible fluid, changing the volume of the test chamber. The change in pressure and temperature of the control fluid relative to the change in volume of the test chamber is measured. The steps are repeated with a sample fluid. The isentropic enthalpy and specific heat at constant pressure of the sample fluid is determined.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: August 14, 2018
    Assignee: SOUTHWEST RESEARCH INSTITUTE
    Inventors: Klaus Brun, Sarah B. Simons, Jeffrey A. Bennett
  • Patent number: 10043765
    Abstract: An integrated circuit structure and formation thereof. The integrated circuit structure includes a substrate and a front-end-of-the-line (FEOL) portion. The FEOL portion rests on top of and in contact with the substrate. The integrated circuit structure includes a memory level portion. The memory level portion rests on top of and in contact with the FEOL portion. The integrated circuit structure includes a back-end-of-the-line (BEOL) portion. The BEOL portion rests on top of and in contact with the memory level portion. The integrated circuit structure includes a multiple layer that includes one or more pairs of reactive materials. The multiple layer is one or more of: i) on top of the BEOL portion; ii) within the BEOL portion; iii) within the memory level portion; iv) within the FEOL portion; v) embedded in the substrate; and vi) on bottom of a thinned substrate.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: August 7, 2018
    Assignee: International Business Machines Corporation
    Inventors: Cyril Cabral, Jr., Kenneth P. Rodbell
  • Patent number: 10035702
    Abstract: A method and system for preparing a semiconductor wafer are disclosed. In a first aspect, the method comprises providing a passivation layer over a patterned top metal on the semiconductor wafer, etching the passivation layer to open a bond pad in the semiconductor wafer using a first mask, depositing a protection layer on the semiconductor wafer, patterning the protective layer using a second mask, and etching the passivation layer to open other electrodes in the semiconductor wafer using a third mask. The system comprises a MEMS device that further comprises a first substrate and a second substrate bonded to the first substrate, wherein the second substrate is prepared by the aforementioned steps of the method.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: July 31, 2018
    Assignee: INVENSENSE, INC.
    Inventor: Daesung Lee