Patents Examined by Margaret D Klunk
  • Patent number: 10343253
    Abstract: Methods, non-transitory computer readable media, and systems are provided for detecting an endpoint of a chemical mechanical planarization (CMP) process on a semiconductor substrate. The method comprises generating a reference signal, generating a first signal with which to control a CMP system, generating a second signal using a combination of the first signal and the reference signal, commanding the CMP system with the second signal, generating a response signal that indicates an operational characteristic of the CMP system that is responsive to the second signal and a friction property of the semiconductor substrate, and filtering the response signal using the reference signal to determine the endpoint of the CMP process.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: July 9, 2019
    Assignee: GLOBALFOUNDRIES, INC.
    Inventors: Abner Bello, Michael Wedlake
  • Patent number: 10325800
    Abstract: Techniques are disclosed for methods and apparatuses for increasing the breakdown voltage while substantially reducing the voltage leakage of an electrostatic chuck at temperatures exceeding about 300 degrees Celsius in a processing chamber.
    Type: Grant
    Filed: August 26, 2014
    Date of Patent: June 18, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Prashant Kulshreshtha, Kwangduk Douglas Lee, Bok Hoen Kim, Zheng John Ye, Swayambhu Prasad Behera, Ganesh Balasubramanian, Juan Carlos Rocha-Alvarez, Jian J. Chen
  • Patent number: 10315233
    Abstract: A flexible substrate treatment device comprising at least one tank that accommodates treatment liquid, winding rollers including a main roller and a driven roller located above the treatment liquid, a positioning roller located in the treating liquid in each tank, a detecting unit configured to detect radius or diameter of at least one of the winding rollers, and a movable discharge member fixed to a side wall of each tank, including a movable discharge port configured to discharge the treatment liquid and a discharge port position controlling mechanism, wherein the movable discharge port can be moved in a direction X perpendicular to a bottom wall of the tank.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: June 11, 2019
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Weifeng Zhou
  • Patent number: 10279311
    Abstract: A chemical mechanical polishing (CMP) chamber is disclosed. The CMP chamber includes a chamber body, a door mounted on the chamber body and a chamber substructure being one selected from a group consisting of a moisture separator separating a moisture generated in the CMP chamber, a supplementary exhaust port, a transparent window mounted on the door, a sampling port mounted on the door, a sealing material including a metal frame, an o-ring for sealing the door and a combination thereof.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: May 7, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-I Peng, Hsiang-Pi Chang, Cary Chia-Chiung Lo, Teng-Chun Tsai, Kuo-Yin Lin, Chih-Yuan Yang
  • Patent number: 10264662
    Abstract: Provided is a capacitively coupled plasma processing apparatus which improves a controllability of the RF bias function and reliably prevents unwanted resonance from being generated on a RF transmission line between a counter electrode and ground potential to enhance reliability of the plasma process. In the capacitive coupled type plasma processing apparatus, three kinds of RF powers from a first, second and third RF power supplies (35, 36, 38) are superimposed and applied to susceptor (lower electrode) (16). In such a three-frequency superimposing and applying application scheme, the frequency-impedance characteristic around upper electrode (48) is considered to prevent a serial resonance from occurring on an RF transmission line around upper electrode (48) in consideration of all the low order frequencies of the IMD relevant to and affecting the plasma process.
    Type: Grant
    Filed: January 9, 2013
    Date of Patent: April 16, 2019
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Manabu Iwata, Naoyuki Umehara, Hiroki Endo
  • Patent number: 10187965
    Abstract: A plasma confinement apparatus, and method for confining a plasma are described and which includes, in one form of the invention, a plurality of electrically insulated components which are disposed in predetermined spaced relation, one relative to the others, and surrounding a processing region of a plasma processing apparatus, and wherein a plurality of passageways are defined between the respective insulated components; and at least one electrically conductive and grounded component forms an electrical field shielding for the processing region.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: January 22, 2019
    Assignee: ADVANCED MICRO-FABRICATION EQUIPMENT, INC. CHINA
    Inventors: Tuqiang Ni, Jinyuan Chen, Qing Qian, Yuehong Fu, Zhaoyang Xu, Xusheng Zhou, Ye Wang
  • Patent number: 10153182
    Abstract: A substrate processing apparatus that performs processing by immersing a substrate into a processing liquid obtained by mixing phosphoric acid with a diluent includes a concentration sensing means for sensing the concentration of the processing liquid by measuring the absorbance characteristics of the processing liquid. The concentration sensing means includes a light-transmitting section that introduces the processing liquid into the inside to let the processing liquid pass therethrough, a light-emitting section that radiates light having a predetermined wavelength to the light-transmitting section, a light-receiving section that receives the light therefrom via the light-transmitting section, a first lens that condenses the light emitted from the light-emitting section to the light-transmitting section, a second lens that condenses the light that has passed through the light-transmitting section to the light-receiving section, and a cooling mechanism that cools at least one of these.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: December 11, 2018
    Assignees: Kurashiki Boseki Kabushiki Kaisha, Tokyo Electron Limited
    Inventors: Noboru Higashi, Satoru Hiraki, Hiromi Kiyose, Hideaki Sato, Hiroshi Komiya
  • Patent number: 10077207
    Abstract: This disclosure is directed to an improved process for making glass articles having optical coating and easy-to clean coating thereon, an apparatus for the process and a product made using the process. In particular, the disclosure is directed to a process in which the application of the optical coating and the easy-to-clean coating can be sequentially applied using a single apparatus. Using the combination of the coating apparatus and the substrate carrier described herein results in a glass article having both optical and easy-to-clean coating that have improved scratch resistance durability and optical performance, and in addition the resulting articles are “shadow free.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: September 18, 2018
    Assignee: Corning Incorporated
    Inventors: Christopher Morton Lee, Xiao-feng Lu, Michael Xu Ouyang, Junhong Zhang
  • Patent number: 9960071
    Abstract: A polishing apparatus according to an embodiment includes a first polishing part, a second polishing part, and an annular part. The second polishing part includes a mounting surface for a semiconductor substrate, and rubs the semiconductor substrate mounted on the mounting surface while pressing the semiconductor substrate against the first polishing part. The annular part includes a support part provided in the second polishing part, and a plurality of convex portions that project from the support part toward the first polishing part, are arranged in a circumferential direction around the mounting surface while being supported by the support part, and are movable in a radial direction of the semiconductor substrate.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: May 1, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki Nakayama, Masayoshi Adachi
  • Patent number: 9953852
    Abstract: A liquid processing apparatus of the present disclosure performs a liquid processing by supplying a processing liquid to a substrate that is rotating. A substrate holding unit configured to be rotatable around a vertical axis is provided with a holding surface to attract and hold a bottom surface of the substrate horizontally. A guide unit is formed integrally with the substrate holding unit, disposed around the substrate held in the substrate holding unit, and provided at a position equal to or lower than a height of a top surface of a periphery of the substrate. The guide unit includes a guide surface configured to guide the processing liquid. A rotary cup rotates integrally with the substrate holding unit, and guides the processing liquid towards the cup between the rotary cup and the guide unit.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: April 24, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Jiro Higashijima, Yuichi Douki, Masami Akimoto, Shigehisa Inoue
  • Patent number: 9887096
    Abstract: A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a gas phase etch created from a remote plasma etch. The remote plasma excites a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents combine with water vapor. Reactants thereby produced etch the patterned heterogeneous structures to remove two separate regions of differing silicon oxide at different etch rates. The methods may be used to remove low density silicon oxide while removing less high density silicon oxide.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: February 6, 2018
    Assignee: Applied Materials, Inc.
    Inventors: Seung H. Park, Yunyu Wang, Jingchun Zhang, Anchuan Wang, Nitin K. Ingle
  • Patent number: 9850583
    Abstract: Disclosed is an apparatus and method for forming lubricant recesses having minute configurations by applying a photolithograph method in a curved inner surface, such as a cylinder bore surface of a cylinder block, the inside of a cylinder liner, the inside of a compressor cylinder, a big end of a connecting rod, a big end bearing, a shaft insertion hole of a rocker arm, or the like in an internal combustion engine.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: December 26, 2017
    Assignee: Hwabaek Engineering Co., LTD.
    Inventors: Kang Lee, Young Hwan Uhm, Jung Min Han
  • Patent number: 9842750
    Abstract: Disclosed is a plasma processing device that provides an object to be treated with plasma treatment. A wafer as an object to be treated, which is attached on the upper surface of adhesive sheet held by a holder frame, is mounted on a stage. In a vacuum chamber that covers the stage therein, plasma is generated, by which the wafer mounted on the stage undergoes plasma treatment. The plasma processing device contains a cover member made of dielectric material. During the plasma treatment on the wafer, the holder frame is covered with a cover member placed at a predetermined position above the stage, at the same time, the wafer is exposed from an opening formed in the center of the cover member.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: December 12, 2017
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Tetsuhiro Iwai
  • Patent number: 9783889
    Abstract: In some embodiments, an apparatus for variable substrate temperature control may include a heater moveable along a central axis of a substrate support; a seal ring disposed about the heater, the seal ring configured to interface with a shadow ring disposed above the heater to form a seal; a plurality of spacer pins configured to support a substrate and disposed within a plurality of through holes formed in the heater, the plurality of spacer pins moveable parallel to the central axis, wherein the plurality of spacer pins control a first distance between the substrate and the heater and a second distance between the substrate and the shadow ring; and a resilient element disposed beneath the seal ring to bias the seal ring toward a backside surface of the heater.
    Type: Grant
    Filed: March 26, 2012
    Date of Patent: October 10, 2017
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Gwo-Chuan Tzu, Xiaoxiong Yuan, Amit Khandelwal, Avgerinos V. Gelatos, Olkan Cuvalci, Kai Wu, Michael P. Karazim
  • Patent number: 9691629
    Abstract: Compositions useful for the selective removal of silicon nitride materials relative to polysilicon, silicon oxide materials and/or silicide materials from a microelectronic device having same thereon. The removal compositions include fluorosilicic acid, silicic acid, and at least one organic solvent. Typical process temperatures are less than about 100° C. and typical selectivity for nitride versus oxide etch is about 200:1 to about 2000:1. Under typical process conditions, nickel-based silicides as well as titanium and tantalum nitrides are largely unaffected, and polysilicon etch rates are less than about 1 ? min?1.
    Type: Grant
    Filed: October 12, 2015
    Date of Patent: June 27, 2017
    Assignee: Entegris, Inc.
    Inventors: Emanuel I. Cooper, Eileen Sparks, William R. Bowers, Mark A. Biscotto, Kevin P. Yanders, Michael B. Korzenski
  • Patent number: 9561356
    Abstract: Out-of-plane microneedle manufacturing process comprising the simultaneous creation of a network of microneedles and the creation of a polygonal shaped hat (2) above each microneedle (1) under formation, said process comprising the following steps: providing bridges (3) between the hats (3), maintaining the bridges (3) during the remaining microneedle manufacturing steps, removing the bridges (3), together with the hats (2), when the microneedles (1) are formed.
    Type: Grant
    Filed: January 6, 2016
    Date of Patent: February 7, 2017
    Assignee: Debiotech S.A.
    Inventors: Astrid Cachemaille, François Cannehan
  • Patent number: 9564287
    Abstract: A substrate processing method uses a substrate processing apparatus including a chamber for accommodating a substrate, a lower electrode to mount the substrate, a first RF power applying unit for applying an RF power for plasma generation into the chamber, and a second RF power applying unit for applying an RF power for bias to the lower electrode. The RF power for plasma generation is controlled to be intermittently changed by changing an output of the first RF power applying unit at a predetermined timing. If no plasma state or an afterglow state exists in the chamber by a control of the first RF power applying unit, an output of the second RF power applying unit is controlled to be in an OFF state or decreased below an output of the second RF power applying unit when the output of the first RF power applying unit is a set output.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: February 7, 2017
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Takeshi Ohse, Shinji Himori, Jun Abe, Norikazu Yamada
  • Patent number: 9558954
    Abstract: The present invention relates to systems and methods associated with selective wet etching and textured surface planarization. The systems and methods described herein can be used to etch a component of a multi-layer stack, such as a GaN layer. In some embodiments, the multi-layer stack can include a substrate having a patterned surface and a light generating region. The substrate can be removed from the first multi-layer stack to form a second multi-layer stack. In some embodiments, the pattern on the surface of the substrate can leave behind a pattern on a surface of the second multi-layer stack. Accordingly, in some cases, the surface of the second multi-layer stack can be wet etched, for example, to smoothen the surface. In some embodiments, removing the substrate can expose an N-face of a GaN layer, and the wet etch can be performed such that the N-face of the GaN layer is etched. In some embodiments, the multi-layer stack includes a light generating region and can be part of a light emitting device.
    Type: Grant
    Filed: April 22, 2011
    Date of Patent: January 31, 2017
    Assignee: Luminus Devices, Inc.
    Inventors: Scott W. Duncan, Hong Lu
  • Patent number: 9543173
    Abstract: An apparatus and a method for selectively etching an encapsulant forming a package of resinous material around an electronic device includes an electronic device package mountable on the etch head; a conductive electrode in electrical contact with package leads of the electronic device package to apply a first voltage to the package leads of the electronic device; a first pump configured to pump a first quantity of the etchant solution from the source into the etch head where the etchant solution is electrically biased to a second voltage different from the first voltage and is cooled to a temperature below the ambient temperature. An etch cavity is formed on an exterior surface of the electronic device package. When the etchant solution has etched through an exterior surface of the electronic device package, the conductive bond wires of the electronic device is prevented from being etched by the applied first voltage.
    Type: Grant
    Filed: May 16, 2013
    Date of Patent: January 10, 2017
    Assignee: Nisene Technology Group
    Inventor: Alan M. Wagner
  • Patent number: 9401286
    Abstract: Disclosed is a plasma processing device that provides an object to be treated with plasma treatment. A wafer as an object to be treated, which is attached on the upper surface of adhesive sheet held by a holder frame, is mounted on a stage. In a vacuum chamber that covers the stage therein, plasma is generated, by which the wafer mounted on the stage undergoes plasma treatment. The plasma processing device contains a cover member made of dielectric material. During the plasma treatment on the wafer, the holder frame is covered with a cover member placed at a predetermined position above the stage, at the same time, the wafer is exposed from an opening formed in the center of the cover member.
    Type: Grant
    Filed: July 10, 2013
    Date of Patent: July 26, 2016
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Tetsuhiro Iwai