Abstract: Out-of-plane microneedle manufacturing process comprising the simultaneous creation of a network of microneedles and the creation of a polygonal shaped hat (2) above each microneedle (1) under formation, said process comprising the following steps: providing bridges (3) between the hats (3), maintaining the bridges (3) during the remaining microneedle manufacturing steps, removing the bridges (3), together with the hats (2), when the microneedles (1) are formed.

Abstract: The present invention relates to systems and methods associated with selective wet etching and textured surface planarization. The systems and methods described herein can be used to etch a component of a multi-layer stack, such as a GaN layer. In some embodiments, the multi-layer stack can include a substrate having a patterned surface and a light generating region. The substrate can be removed from the first multi-layer stack to form a second multi-layer stack. In some embodiments, the pattern on the surface of the substrate can leave behind a pattern on a surface of the second multi-layer stack. Accordingly, in some cases, the surface of the second multi-layer stack can be wet etched, for example, to smoothen the surface. In some embodiments, removing the substrate can expose an N-face of a GaN layer, and the wet etch can be performed such that the N-face of the GaN layer is etched. In some embodiments, the multi-layer stack includes a light generating region and can be part of a light emitting device.

Abstract: An apparatus and a method for selectively etching an encapsulant forming a package of resinous material around an electronic device includes an electronic device package mountable on the etch head; a conductive electrode in electrical contact with package leads of the electronic device package to apply a first voltage to the package leads of the electronic device; a first pump configured to pump a first quantity of the etchant solution from the source into the etch head where the etchant solution is electrically biased to a second voltage different from the first voltage and is cooled to a temperature below the ambient temperature. An etch cavity is formed on an exterior surface of the electronic device package. When the etchant solution has etched through an exterior surface of the electronic device package, the conductive bond wires of the electronic device is prevented from being etched by the applied first voltage.

Abstract: Disclosed is a plasma processing device that provides an object to be treated with plasma treatment. A wafer as an object to be treated, which is attached on the upper surface of adhesive sheet held by a holder frame, is mounted on a stage. In a vacuum chamber that covers the stage therein, plasma is generated, by which the wafer mounted on the stage undergoes plasma treatment. The plasma processing device contains a cover member made of dielectric material. During the plasma treatment on the wafer, the holder frame is covered with a cover member placed at a predetermined position above the stage, at the same time, the wafer is exposed from an opening formed in the center of the cover member.

Abstract: A method for chemical mechanical polishing of a substrate includes polishing the substrate at a stock removal rate of greater than about 2.5 ?/min to achieve a Ra of not greater than about 5.0 ?. The substrate can be a III-V substrate or a SiC substrate. The polishing utilizes a chemical mechanical polishing slurry comprising ultra-dispersed diamonds and at least 80 wt % water.

Abstract: A constituent part is included in a plasma processing apparatus for performing a plasma process on a substrate mounted on a susceptor by using a plasma generated in a processing chamber. The constituent part has at least one recessed corner formed by intersection of two surfaces. The recessed corner is exposed to the plasma when the plasma is generated in the processing chamber. An intersection angle of the two surfaces seen from a plasma side is 115 degrees to 180 degrees.

Abstract: Provided are a multi-selective polishing slurry composition and a semiconductor element production method using the same. A silicon film provided with element patterns is formed on the uppermost part of a substrate having a first region and a second region. The element pattern density on the first region is higher than the element pattern density on the second region. Formed in sequence on top of the element patterns are a first silicon oxide film, a silicon nitride film and a second silicon oxide film. The substrate is subjected to chemical-mechanical polishing until the silicon film is exposed, by using a polishing slurry composition containing a polishing agent, a silicon nitride film passivation agent and a silicon film passivation agent.

Abstract: The present invention is directed to a method and an apparatus for manufacturing a semiconductor device including step S22 to form an insulating film on a front surface of a semiconductor wafer that is a surface on which a semiconductor element is to be formed and on a back surface that is a surface opposing the front surface, step S26 to remove the insulating film formed on the back surface by selectively providing a first chemical on the back surface of the semiconductor wafer, and step S30 to remove the insulating film formed on the front surface by simultaneously immersing the plurality of semiconductor wafers in a second chemical.

Abstract: A system and method of plasma processing includes a plasma chamber including a substrate support and an upper electrode opposite the substrate support, the upper electrode having a plurality of concentric temperature control zones and a controller coupled to the plasma chamber.

Abstract: An etching method and apparatus for etching a silicon oxide film selectively with respect to a silicon nitride film formed on a substrate are provided. A processing gas containing a plasma excitation gas and a CHF-based gas is introduced into a processing chamber such that a flow rate ratio of the CHF-based gas to the plasma excitation gas is 1/15 or higher. By generating a plasma in the processing chamber, the silicon oxide film is etched selectively with respect to the silicon nitride film formed on the substrate in the processing chamber.

Abstract: A system for processing a substrate includes a plasma chamber to generate a plasma therein. The system also includes a process chamber to house the substrate, where the process chamber is adjacent the plasma chamber. The system also includes a rotatable extraction electrode disposed between the plasma chamber and substrate, where the rotatable extraction electrode is configured to extract an ion beam from the plasma, and configured to scan the ion beam over the substrate without movement of the substrate by rotation about an extraction electrode axis.

Abstract: A method of selectively etching a three-dimensional (3-D) structure includes generating a plasma in contact with the 3-D structure, and illuminating a designated portion of the 3-D structure with a laser beam while the plasma is being generated. Nonilluminated portions of the 3-D structure are etched at a first etch rate, and the designated portion of the 3-D structure is etched at a second etch rate, where the second etch rate is different from the first etch rate.

Abstract: Lithography method for etching very dense patterns on a substrate, based on a combination of several less dense partial patterns; a sacrificial layer is formed on a substrate and is etched according to a first partial pattern; spacers are formed on edges of elements of the sacrificial layer, the spacers defining a second partial pattern; then the sacrificial layer is removed leaving only the spacers remaining. A layer sensitive to an electron beam is subsequently deposited between the spacers to a thickness less than or equal to the height of the spacers, and this sensitive layer is exposed using an electron beam according to a third partial pattern such that there remains on the substrate a final pattern of regions lacking spacers and a sensitive layer, this pattern resulting from the combination of the second and third partial patterns and having higher density than each of the partial patterns.

Abstract: Compositions useful for the selective removal of silicon nitride materials relative to poly-silicon, silicon oxide materials and/or silicide materials from a microelectronic device having same thereon. The removal compositions include fluorosilicic acid, silicic acid, and at least one organic solvent. Typical process temperatures are less than about 100° C. and typical selectivity for nitride versus oxide etch is about 200:1 to about 2000:1. Under typical process conditions, nickel-based silicides as well as titanium and tantalum nitrides are largely unaffected, and polysilicon etch rates are less than about 1 ? min?1.

Abstract: A method of forming a planar surface for a semiconductor device structure. The method comprises forming a particle film comprising a plurality of discrete particles on a non-planar surface of a semiconductor device structure. The semiconductor device structure is subjected to at least one chemical-mechanical polishing process after forming the particle film on the non-planar surface of the semiconductor device structure. Methods of forming a semiconductor device structure are also described.

Abstract: Surface-modifying layers, including neutral layers for vertical domain-forming block copolymers of styrene and methyl methacrylate are provided. Also provided are self-assembled block copolymer structures incorporating the surface modifying layers, methods of fabricating such structures and methods of using the structures in BCP lithography applications. The surface-modifying layers comprise a crosslinked copolymer film, wherein the crosslinked copolymers are random copolymers polymerized from styrene monomers and/or (meth)acrylate monomers and crosslinkable epoxy group-functionalized monomers. The crosslinked copolymer films are characterized by a high content of the crosslinkable epoxy group-functionalized monomer.

Abstract: Plasma processing systems and methods for using pre-dissociated and/or pre-ionized tuning gases are disclosed herein. In one embodiment, a plasma processing system includes a reaction chamber, a support element in the reaction chamber, and one or more cathode discharge assemblies in the reaction chamber. The reaction chamber is configured to produce a plasma in an interior volume of the chamber. The support element positions a microelectronic workpiece in the reaction chamber, and the cathode discharge assembly supplies an at least partially dissociated and/or ionized tuning gas to the workpiece in the chamber.

Abstract: A polishing slurry for a chemical mechanical planarization process includes polishing particles and polyhedral nanoscale particles having a smaller size than the polishing particles and including a bond of silicon (Si) and oxygen (O).

Abstract: Embodiments of the present invention relate to systems and methods for designing and manufacturing hard masks used in the creation of patterned magnetic media and, more particularly, patterned magnetic recording media used in hard disk drives (e.g., bit patterned media (BPM)). In some embodiments, the hard mask incorporates at least one layer of Ta (tantalum) and at least one layer of C (carbon) and is used during ion implantation of a pattern onto magnetic media. The hard mask can be fabricated with a high aspect ratio to achieve small feature sizes while maintaining its effectiveness as a mask, is robust enough to withstand the ion implantation process, and can be removed after the ion implantation process with minimal damage to the magnetic media.

Abstract: A method of etching exposed silicon oxide on patterned heterogeneous structures is described and includes a gas phase etch created from a remote plasma etch. The remote plasma excites a fluorine-containing precursor. Plasma effluents from the remote plasma are flowed into a substrate processing region where the plasma effluents combine with water vapor. Reactants thereby produced etch the patterned heterogeneous structures to remove two separate regions of differing silicon oxide at different etch rates. The methods may be used to remove low density silicon oxide while removing less high density silicon oxide.