Abstract: A memory system may include a memory device including a plurality of memory blocks and a controller suitable for determining whether to change from a normal mode to a dirty mode based on a size of free space of a host a sum of an amount of restoration of garbage collection for victim blocks and a size of all free blocks in the memory device. In the dirty mode, the controller controls the memory device to perform a garbage collection operation on the victim blocks at a frequency greater than frequency at which a garbage collection operation is performed in the normal mode.

Abstract: Described apparatuses and methods track access metadata pertaining to activity within respective address ranges. The access metadata can be used to inform prefetch operations within the respective address ranges. The prefetch operations may involve deriving access patterns from access metadata covering the respective ranges. Suitable address range sizes for accurate pattern detection, however, can vary significantly from region to region of the address space based on, inter alia, workloads produced by programs utilizing the regions. Advantageously, the described apparatuses and methods can adapt the address ranges covered by the access metadata for improved prefetch performance. A data structure may be used to manage the address ranges in which access metadata are tracked. The address ranges can be adapted to improve prefetch performance through low-overhead operations implemented within the data structure.

Abstract: Described apparatuses and methods track access metadata pertaining to activity within respective address ranges. The access metadata can be used to inform prefetch operations within the respective address ranges. The prefetch operations may involve deriving access patterns from access metadata covering the respective ranges. Suitable address range sizes for accurate pattern detection, however, can vary significantly from region to region of the address space based on, inter alia, workloads produced by programs utilizing the regions. Advantageously, the described apparatuses and methods can adapt the address ranges covered by the access metadata for improved prefetch performance. A data structure may be used to manage the address ranges in which access metadata are tracked. The address ranges can be adapted to improve prefetch performance through low-overhead operations implemented within the data structure.

Abstract: A method for non-disruptive upgrade of a storage system is provided. The method includes disabling, by an interlock, access by one or more processors of the storage system to the first memory, responsive to a request. The method includes persisting configuration information in the first memory to the solid-state memory, with the access to the first memory disabled by the interlock, wherein the persisting, the first memory and the solid-state memory are supported by an energy reserve. The method includes enabling, by the interlock, access by the one or more processors to the first memory, responsive to completing the persisting, and writing, by the one or more processors of the storage system, to the first memory, to perform the upgrade with further configuration information, with the access enabled by the interlock and wherein at least the persisting is accomplished without power cycling.

Abstract: Methods, systems, and devices for data stream processing for media management are described. A set of transfer units of a plurality of transfer units associated with a cursor of a garbage collection procedure are selected. The selecting is based on a set of data streams corresponding to the cursor and each transfer unit of the set of transfer units is associated with a same data stream of the set of data streams. A plurality of write commands are issued in connection with the garbage collection procedure for the cursor. Each write command includes an instruction to write a transfer unit of the set of transfer units to a respective destination address of the memory sub-system.

Abstract: A memory device and a method for reducing read disturb errors of the memory device are provided. The memory device includes a plurality of memory cells arranged in series and organized into a plurality of blocks, a plurality of word lines respectively coupled to corresponding memory cells, and a controller coupled to the word lines for performing page read operations on the pages in respective blocks through corresponding word lines, in which each of the blocks comprises a plurality of pages of two or more types. The controller accumulates a page read count of the pages of each type in respective blocks, and arranges data to be stored according to the page read count and a latency factor corresponding to the pages of each type in each of the blocks.

Abstract: Systems and methods for managing content in a flash memory. A locking data structure is used to control access to data structures and the locking data structure is implemented in flash memory. The locking data structure is updated by overwriting the data such that the associated data structure is identified as locked or unlocked.

Abstract: A system includes one or more memory devices storing instructions, and one or more processors configured to execute the instructions to perform steps of a method for providing customer data access during a migration process. The system may initiate a transfer of customer data from a source data server to a system platform and transfer a subset of the customer data to a temporary data storage. The system may modify the temporary copy of customer data and generate an instruction to modify the permanent copy of customer data. In response to the completion of the transfer of customer data from the source data server to the system mainframe, the system may then transfer and execute the instruction to modify the permanent copy of customer data.

Abstract: The example embodiments disclose a system and method, a computer program product, and a computer system for improving solid-state drive performance. The example embodiments may include generating, by an affinity adapter located external to the solid-state drive, a plurality of affinities for each of a plurality of data to a respective plurality of subdivisions of data of a solid-state drive, wherein each of the plurality of data is associated with a logical block address (LBA) and each of the respective plurality of subdivisions has a physical block address (PBA).

Abstract: A method for restoring virtual machines in accordance with one or more embodiments of the invention includes obtaining, by a data protection manager, a restoration request, and in response to the restoration request: identifying a plurality of virtual machines (VMs) to restore based on the restoration request, determining a restoration process based on the plurality of virtual machines, and initiating a deployment of a production agent based on the restoration process, wherein the production agent initiates a restoration on at least a portion of the plurality of VMs.

Abstract: Host data stored in one or more source physical extents of non-volatile data storage is identified as valid and determined to be infrequently written by host I/O requests, and is therefore compressed to generate a highly compressed version of the valid host data. The highly compressed version is then stored into at least one target physical extent. The valid host data may be initially compressed before it is stored in the source physical extent(s), and may be re-compressed to generate the highly compressed version. If the valid host data is also infrequently read, it may be recompressed using larger blocks of host data than were used to perform the initial compression. The performance tier of the target physical extent may be different from (e.g. lower than) the performance tier of the source physical extent. The technology may be embodied in a background process such as a garbage collector.

Abstract: A memory system includes a plurality of memory blocks each including a plurality of pages, each page including a plurality of offsets, and a controller. The controller includes a memory and performs a garbage collection operation on a victim block using the memory. The controller selects the victim block from among the plurality of memory blocks, calculates an invalid offset ratio by checking whether an invalid offset exists among a plurality of offsets in a valid page included in the victim block. When the invalid offset ratio is included in a predetermined threshold range, the controller calculates a sequential ratio of the valid page, predicts a logical address of the invalid offset depending on the sequential ratio, and stores, in the memory, valid data stored in a plurality of valid offsets in the valid page and valid data stored in a memory region corresponding to the predicted logical address.

Abstract: Customers of shared resources in a multi-tenant environment can modify operational parameters of electronic resources. A customer can be provisioned a data volume of a specified size, storage type (e.g., hard disk drive or solid state device), committed rate of input/output operations per second, and/or geographical location, for example. The customer can subsequently modify any such operational parameters by submitting an appropriate request, or the operational parameters can be adjusted automatically based on any of a number of criteria. Data volumes for the customer can be migrated, split, or combined in order to provide the shared resources in accordance with the modified operational parameters.

Abstract: Enhanced read-ahead capabilities for storage devices are disclosed herein. In an implementation, data for a given write operation may be written to storage such that the location of the next write is stored with the data. Later, when the data is being read from storage, other data may be pre-fetched from the location of the next write that was written with the data. If the next location is the target of a subsequent read operation, the other data may be returned to the host immediately, since it will have already been read from the location where it was stored, thereby speeding-up the subsequent read operation.

Abstract: In a computer system, an automatic memory management module operates by receiving, from a mutator, memory allocation requests for particular objects to be stored in a random-access memory and allocating particular logical addresses within a logical address space to the particular objects. The automatic memory management module distinguishes the particular objects according to at least one criterion and allocates logical addresses from a first sub-space and logical addresses from a second sub-space. A memory management unit maps the allocated logical addresses from the second sub-space to physical memory in the random-access memory. The logical addresses within the first sub-space are compacted in combination with moving corresponding objects in the random-access memory.

Abstract: The method for performing read-ahead operations in the data storage systems is disclosed and includes determining a sequential address space interval of a request and a time of the request, placing the data into a read-ahead interval list if the address space interval exceeds a threshold, and placing the data about request intervals having a length shorter than the threshold into a random request interval list, identifying a partial overlap between the address space interval of the current request and the interval stored in one of the lists, verifying whether the length of the address space interval exceeds a threshold and if so—placing the data about this sequential interval into the read-ahead interval list, performing read-ahead of data.

Abstract: The invention relates to a method for updating a variable shared between multiple processor cores. The following steps are implemented during execution in one of the cores of a local scope atomic read-modify-write instruction (AFA), having a memory address (a1) of the shared variable as a parameter: performing operations of the atomic instruction in a cache line (L(a1)) allocated to the memory address; and locally locking the cache line (LCK) while authorizing access to the shared variable by cores connected to another cache memory of same level during execution of the local scope atomic instruction.

Abstract: This application provides a garbage data scrubbing method and a device, and relates to the field of terminals, to resolve a problem that delivering a discard message in a file system transaction affects a user foreground operation. The method includes: obtaining an IO busy/idle status of a terminal at a current moment, where the IO busy/idle status includes a busy state and an idle state (S301); and if the IO busy/idle status of the terminal at the current moment is the idle state, delivering a discard message to a storage device (S302), where the discard message includes an initial address and a size of to-be-scrubbed physical space in the storage device, and the discard message is used to unbind a mapping relationship between a physical address of the to-be-scrubbed physical space and a corresponding logical address.

Abstract: A system and technique are provided for providing a service address space. The system includes a service co-processor provided with a service address space. The service co-processor is attached to a main processor where the main processor is provided with a main address space. The service co-processor creates and maintains an independent copy of the main address space in the form of the service address space. The service co-processor receives from the main processor a command packet, determines a clock value for initiating a service function designated by the command packet, and updates the service address space until reaching the clock value. The service co-processor then performs the service function at the clock value.

Abstract: A memory device includes a memory array of non-volatile memory cells arranged in rows and columns and responder signal circuitry. The responder signal circuitry performs a calculation on a row of the memory array and generates a responder signal indicating that there is at least one cell in the row having a predefined value.