Patents Examined by Michael R. Fleming
  • Patent number: 5295230
    Abstract: An Expert System for providing diagnostics to a data communications network. Expert information is entered using a user friendly User Interface which reduces need for the participation of a Knowledge Engineer. The User Interface including a template for entering a plurality of attributes for a hypothesis tree node. Among the attributes are an identifier for identifying a second node connected to the hypothesis tree node by a branch of a hypothesis tree. If the second node has not been defined, it is added to and displayed in a list of undefined nodes. Once all attributes for a template are completed, an identifier for the hypothesis tree node is added to and displayed in a list of defined nodes.
    Type: Grant
    Filed: December 4, 1991
    Date of Patent: March 15, 1994
    Assignee: Racal-Datacom, Inc.
    Inventor: Ching Y. Kung
  • Patent number: 5295231
    Abstract: An operations control apparatus is disclosed which includes a unit for processing data for operations control of an object, which has an event controller element, a common data base element and a simulator element; a operations control data diagnosis unit; a management element for checking the processing of the respective elements in response to the state of the object, to prepare the optimum processing order of the respective elements and for instructing the same to the event controller elements; a failure mode and effect analysis sheet preparing and correcting element; and a diagnosis rules preparing and correcting element.
    Type: Grant
    Filed: February 20, 1991
    Date of Patent: March 15, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Toru Ogino
  • Patent number: 5295229
    Abstract: A circuit (14) and method which determine a degree of membership of an input in a membership set during a fuzzy logic operation. The degree of membership is calculated by a single "MEM" software instruction. The MEM instruction determines whether the system input has a degree of membership of zero, of a saturation level, or of some value in between. An operand assignment circuit (50) and an ALU (56) allow circuit (14) to determine the degree of membership more quickly. Assignment circuit (50) determines a multiplier for a multiplication operation based on a number of significant bits in the values to be multiplied. If the multiplier is smaller than the multiplicand, shorter multiplication operations may be performed. Additionally, ALU (56) operates in a split mode of operation which is able to perform two eight bit subtraction or multiplication operations concurrently which also results in these operations being performed more efficiently.
    Type: Grant
    Filed: June 17, 1992
    Date of Patent: March 15, 1994
    Assignee: Motorola, Inc.
    Inventors: J. Greg Viot, James M. Sibigtroth, James L. Broseghini
  • Patent number: 5295228
    Abstract: A learning machine has plural multiple-input single-output signal processing circuits connected in a hierarchical structure. The learning machine sets a threshold value, which is a evaluation standard for change in weight coefficients, high during the early part of the learning process and enables rough learning to progress without changing the weight coefficients for those multiple-input single-output signal processing circuits for which errors are sufficiently small. On the other hand, the learning machine gradually reduces the threshold value as learning progresses and advances learning by a non-linear optimization method (including a conjugate gradient method, a linear search method, or a combination of conjugate gradient and linear search methods) during the later part of the learning process, and thereby improves the learning speed.
    Type: Grant
    Filed: September 4, 1991
    Date of Patent: March 15, 1994
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Toshiyuki Koda, Yasuharu Shimeki, Shigeo Sakaue, Hiroshi Yamamoto
  • Patent number: 5295227
    Abstract: A neural network learning system is applied to extensive use in applications such as pattern and character recognizing operations, various controls, etc. The neural network learning system operates on, for example, a plurality of neural networks each having a different number of intermediate layer units to efficiently perform a learning process at a high speed with a reduced amount of hardware. A neural network system having a plurality of hierarchical neural networks each having an input layer, one or more intermediate layers and output layers is formed from a common input layer shared among two or more neural networks, or the common input layer and one or more intermediate layers and a learning controller for controlling a learning process performed by a plurality of neural networks.
    Type: Grant
    Filed: July 9, 1992
    Date of Patent: March 15, 1994
    Assignee: Fujitsu Limited
    Inventor: Masayuki Yokono
  • Patent number: 5295226
    Abstract: A fuzzy computer which carries out fuzzy operations using membership functions. This fuzzy computer readily processes implications made up of an antecedent expressed by fuzzy values and a consequent expressed by singleton values. This fuzzy computer includes a fuzzy processor, fuzzy controller and a MAX circuit block composite device used in same, and in addition, it contains grade-controllable membership function circuits, grade-controllable membership function generator circuits and center of gravity determination circuits which function as a useful circuit called a defuzzifier for converting fuzzy quantities to definitive values.
    Type: Grant
    Filed: September 2, 1992
    Date of Patent: March 15, 1994
    Assignee: Research Development Corporation of Japan
    Inventor: Takeshi Yamakawa
  • Patent number: 5293584
    Abstract: A speech recognition system displays a source text of one or more words in a source language. The system has an acoustic processor for generating a sequence of coded representations of an utterance to be recognized. The utterance comprises a series of one or more words in a target language different from the source language. A set of one or more speech hypotheses, each comprising one or more words from the target language, are produced. Each speech hypothesis is modeled with an acoustic model. An acoustic match score for each speech hypothesis comprises an estimate of the closeness of a match between the acoustic model of the speech hypothesis and the sequence of coded representations of the utterance. A translation match score for each speech hypothesis comprises an estimate of the probability of occurrence of the speech hypothesis given the occurrence of the source text. A hypothesis score for each hypothesis comprises a combination of the acoustic match score and the translation match score.
    Type: Grant
    Filed: May 21, 1992
    Date of Patent: March 8, 1994
    Assignee: International Business Machines Corporation
    Inventors: Peter F. Brown, Stephen A. Della Pietra, Vincent J. Della Pietra, Frederick Jelinek, Robert L. Mercer
  • Patent number: 5293456
    Abstract: A neural network for comparing a known input to an unknown input comprises a first layer for receiving a first known input tensor and a first unknown input tensor. A second layer receives the first known and unknown input tensors. The second layer has at least one first trainable weight tensor associated with the first known input tensor and at least one second trainable weight tensor associated with the first unknown input tensor. The second layer includes at least one first processing element for transforming the first known input tensor on the first trainable weight tensor to produce a first known output and at least one second processing element for transforming the first unknown input tensor on the second trainable weight tensor to produce a first unknown output. The first known output comprises a first known output tensor of at least rank zero and has a third trainable weight tensor associated therewith.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: March 8, 1994
    Assignee: E. I. du Pont de Nemours and Company
    Inventors: Ygal G. Guez, Richard G. Stafford
  • Patent number: 5293460
    Abstract: A velocity-variation minimization control method for a robot includes the steps of substituting a position vector for a start point, a velocity vector for the start point, a position vector for an end point, a velocity vector for the end point, and a provisional movement time into equations that express the position and velocity of the robot as cubic functions with respect to time, to obtain solutions for coefficients of the cubic functions. A sum of squares of differences between a velocity obtained using the coefficients and a target velocity is obtained. Then using convergence calculations are performed to obtain a value of the movement time that minimizes the sum of squares. The robot is then controlled in such a manner that the effector of the robot follows a path based on the converged movement time.
    Type: Grant
    Filed: April 15, 1991
    Date of Patent: March 8, 1994
    Assignee: Kawasaki Jukogyo Kabushiki Kaisha
    Inventors: Yoshiaki Nakatsuchi, Tatsuo Yano
  • Patent number: 5293452
    Abstract: A voice log-in system is based on a person's spoken name input only, using speaker-dependent acoustic name recognition models in a performing speaker-independent name recognition. In an enrollment phase, a dual pass endpointing procedure defines both the person's full name (broad endpoints), and the component names separated by pauses (precise endpoints). An HMM (Hidden Markov Model) recognition model generator generates a corresponding HMM name recognition model modified by the insertion of additional skip transitions for the pauses between component names. In a recognition/update phase, a spoken-name speech signal is input to an HMM name recognition engine which performs speaker-independent name recognition--the modified HMM name recognition model permits the name recognition operation to accommodate pauses between component names of variable duration.
    Type: Grant
    Filed: July 1, 1991
    Date of Patent: March 8, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Joseph Picone, Barbara J. Wheatley
  • Patent number: 5293588
    Abstract: A speech detection apparatus capable of reliably detecting speech segments in audio signals regardless of the levels of input audio signals and background noises. In the apparatus, a parameter of input audio signals is calculated frame by frame, and then compared with a threshold in order to judge each input frame as one of a speech segment and a noise segment, while the parameters of the input frames judged as the noise segments are stored in the buffer and the threshold is updated according to the parameters stored in the buffer. The apparatus may utilize a transformed parameter obtained from the parameter, in which the difference between speech and noise is emphasized, and noise standard patterns are constructed from the parameters of the input frames pre-estimated as noise segments.
    Type: Grant
    Filed: April 9, 1991
    Date of Patent: March 8, 1994
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hideki Satoh, Tsuneo Nitta
  • Patent number: 5293590
    Abstract: This invention relates to personal computers and, more particularly, to a personal computer having an interface controller providing an economical way to achieve access to a direct access storage device by a small computer system interface. In accordance with this invention, the system CPU is selectively allowed to access all or only a portion of the internal registers in an interface controller, enabling implementation in conjunction with a conventional subsystem microprocessor interface to the registers if desired. With this change, either interface has full access to the interface controller's internal registers. By allowing such access, the number of component parts required can be reduced where multitasking possibilities are not desired, and the cost of providing SCSI capability significantly reduced.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: March 8, 1994
    Assignee: International Business Machines Corp.
    Inventors: Don S. Keener, Richard W. Voorhees
  • Patent number: 5293451
    Abstract: A method and apparatus for modeling words based on match scores representing (a) the closeness of a match between probabilistic word models and the acoustic features of at least two utterances, and (b) the closeness of a match between word models and the spelling of the word. A match score is calculated for a selection set of one or more probabilistic word models. A match score is also calculated for an expansion set comprising the probabilistic word models in the selection set and one probabilistic word model from a candidate set. If the expansion set match score improves the selection set match score by a selected nonzero threshold value, the word is modelled with the word models in the expansion set. If the expansion set match score does not improve the selection set match score by the selected nonzero threshold value, the word is modelled with the words in the selection set.
    Type: Grant
    Filed: October 23, 1990
    Date of Patent: March 8, 1994
    Assignee: International Business Machines Corporation
    Inventors: Peter F. Brown, Steven V. De Gennaro, Peter V. Desouza, Mark E. Epstein
  • Patent number: 5293453
    Abstract: A communication system and method that translates a first plurality of information symbols into a plurality of code words, transmits the plurality of code words through a communication channel receives the plurality of code words transmitted through the communication channel, deciphers the plurality of code words transmitted through the communication channel into a second plurality of information symbols that correspond to the first set plurality of information symbols, wherein the plurality of code words are derived from a reverse dynamical flow within a first neural network.
    Type: Grant
    Filed: February 13, 1992
    Date of Patent: March 8, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Gary A. Frazier
  • Patent number: 5291609
    Abstract: An interface circuit for providing asynchronous interrupt service for multiple peripheral devices in accordance with instructions from a host computer includes two dual universal asynchronous receivers-transmitters ("UARTs"), a dual port random-access memory ("RAM") and a microprocessor (".mu.P"). The dual UARTs selectively read data separately from selected peripheral devices and selectively write that data to the dual port RAM for access by the host computer, and read data from the dual port RAM as stored therein by the host computer and write that data to a selected peripheral device, in accordance with addresses from the .mu.P. Following initiation of an interrupt sequence, the dual port RAM allows the host computer to selectively and asynchronously read data (e.g. from a peripheral device via a dual UART) therefrom and write necessary data or instructions (e.g. for the .mu.P or a peripheral device via a dual UART) thereto for the .mu.
    Type: Grant
    Filed: December 23, 1992
    Date of Patent: March 1, 1994
    Assignee: Sony Electronics Inc.
    Inventor: William S. Herz
  • Patent number: 5291608
    Abstract: A data processing system that executes a process and further includes the capability to provide an interrupt signal upon the occurrence of a predetermined event. An interrupt manager is provided that includes the capability to receive the interrupt signal and provide data indicative of the occurrence of the interrupt signal. Further the interrupt manager includes the capability to evaluate this data according to a predetermined criteria to determine if an event signal should be provided to a process. Lastly, a capability for providing the event signal only when initiated by the evaluating process is provided.
    Type: Grant
    Filed: November 10, 1992
    Date of Patent: March 1, 1994
    Assignee: International Business Machines Corporation
    Inventor: Gregory A. Flurry
  • Patent number: 5289581
    Abstract: A modified driver program for an external hard disk drive for a personal computer which manages a cache in RAM on the motherboard to speed up disk access operations is disclosed. A block of 2000 bytes contiguous to the driver code is reserved at boot time. An "on/off" data byte flag is managed to indicate whether the data in the cache is valid. For read operations of a size less than the size of the cache, a number of sequential blocks of data from the disk are stored in the cache. Any write operation potentially invalidates the cache data so the flag is set "off". On subsequent read operations, if the cache flag is "on", the driver code compares the contents of the cache to the requested data to see if it is stored in the cache. If it is, the data is read from the cache as opposed to the disk thereby speeding up the access.
    Type: Grant
    Filed: September 18, 1992
    Date of Patent: February 22, 1994
    Inventors: Leo Berenguel, Weii Lin
  • Patent number: 5289562
    Abstract: Disclosed is an Hidden Markov Model (HMM) training apparatus in which a capacity for discriminating between models is taken into consideration so as to allow a high level of recognition accuracy to be obtained. A probability of a vector sequence appearing from HMMs is computed with respect to an input vector and continuous mixture density HMMs. Through this computation, the nearest different-category HMM, with which the maximum probability is obtained and which belongs to a category different from that of a training vector sequence of a known category, is selected. The respective central vectors of continuous densities constituting the output probability densities of the same-category HMM belonging to the same category as that of the training vector sequence and the nearest different-category HMM are moved on the basis of the vector sequence.
    Type: Grant
    Filed: March 21, 1991
    Date of Patent: February 22, 1994
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shinobu Mizuta, Kunio Nakajima
  • Patent number: 5289583
    Abstract: Bus master for use in computer system includes logic for determining the number of words remaining to be transferred in a DMA operation to supply signals to permit arbitration to start for the next DMA request, thereby avoiding an idle cycle. A timeout state machine is also included to prevent the bus master state machine from hanging in a state with no exit. Errors can be masked to permit analysis of system problems.
    Type: Grant
    Filed: October 19, 1990
    Date of Patent: February 22, 1994
    Assignee: International Business Machines Corporation
    Inventors: Lisa L. Fischer, Stephen D. Hanna
  • Patent number: 5287430
    Abstract: A signal discrimination device using a neural network for discriminating input signals such as radar reception signals includes an adaptive code generator means for generating codes for representing the discrimination categories. The distances between the codes for closely related categories are smaller than the distances between the codes for remotely related categories. During the learning stage, the neural network is trained to output the codes for respective inputs. The discrimination result judgment means determines the categories by comparing the outputs of the neural network and the codes for the respective categories.
    Type: Grant
    Filed: April 14, 1992
    Date of Patent: February 15, 1994
    Assignee: Mirsubishi Denki Kabushiki Kaisha
    Inventors: Masafumi Iwamoto, Takamitsu Okada, Takahiko Fujisaka, Michimasa Kondoh