Abstract: A three-dimensional (3D) memory device includes a first substrate, a first semiconductor structure, and a second semiconductor structure. The first semiconductor structure is disposed on the first substrate. The first semiconductor structure includes a second substrate, and a peripheral device disposed over the second substrate, and the peripheral device is formed facing the first substrate. The second semiconductor structure is disposed on the first semiconductor structure. The second semiconductor structure includes a doped semiconductor layer, and a memory array structure disposed between the doped semiconductor layer and the first semiconductor structure.

Abstract: A three-dimensional semiconductor memory device includes a first substrate, a peripheral circuit structure on the first substrate, a cell array structure on the peripheral circuit structure, the cell array structure including a stack structure having alternating interlayer dielectric layers and gate electrodes, a first insulating layer covering the stack structure, and a second substrate on the stack structure and the first insulating layer, the stack structure being between a bottom surface of the second substrate and the peripheral circuit structure, a second insulating layer on the cell array structure, a first penetration contact penetrating the first insulating layer, the second substrate, and the second insulating layer, and a second penetration contact penetrating the first insulating layer and the second insulating layer, the second penetration contact being spaced apart from the second substrate, and the first and second penetration contacts having widths decreasing with increasing distance from the

Abstract: Embodiments of processing a substrate are provided herein. In some embodiments, a method of processing a substrate includes: depositing, via a first epitaxial growth process, an n-doped silicon material onto a substrate to form an n-doped layer while adjusting a ratio of dopant precursor to silicon precursor so that a dopant concentration of the n-doped layer increases from a bottom of the n-doped layer to a top of the n-doped layer; etching the n-doped layer to form a plurality of trenches having sidewalls that are tapered and a plurality of n-doped pillars therebetween; and filling the plurality of trenches with a p-doped material via a second epitaxial growth process to form a plurality of p-doped pillars.

Abstract: A display device includes first and second light-emitting diodes in respective first and second emission areas, an encapsulation layer thereon, and including at least one inorganic encapsulation layer and at least one organic encapsulation layer, a color conversion-transmission layer on the encapsulation layer, and including a color conversion part to convert light emitted from the first or second light-emitting diodes into a different color, and a light blocking partition wall surrounding the color conversion part, first and second color filters on the color conversion-transmission layer, and respectively corresponding to the first and second emission areas, wherein respective first end portions of the first and second color filters are spaced from each other while overlapping the light blocking partition wall, and are partly covered with a third color material having a color that is different from the first and second color filters.

Abstract: The present disclosure relates to an electronic component joining method and a joined structure. A solder layer made of a gold-tin alloy including 20 mass % or greater of tin is formed on a light-emitting element side, and a layer including gold as a main component is formed, as a joining layer for joining to the solder layer, on a submount side. The solder layer and the joining layer are heated at a temperature below the melting point of the gold-tin alloy of the solder layer to join the light-emitting element and the submount.

Abstract: A method for manufacturing a semiconductor structure includes: a substrate is provided, the substrate is provided with memory cell array region and peripheral circuit region; a first insulating dielectric layer is formed in memory cell array region and a second insulating dielectric layer is formed in peripheral circuit region, bit line structures are formed in first insulating dielectric layer, conductive structures are formed in second insulating dielectric layer, each bit line structure includes a bit line conductive structure and an isolation structure covering a top and a side wall of bit line conductive structure; isolation structure is etched to form a first gap in memory cell array region and second insulating dielectric layer between conductive structures is etched to form a second gap in peripheral circuit region; and a third insulating dielectric layer is formed on a side wall of first gap and a side wall of second gap.

Abstract: The present disclosure provides a display substrate, a fabrication method thereof and a display panel. The display substrate includes a substrate; and a pixel defining layer on the substrate. The display substrate further comprises a display area, a non-display area and a light-transmitting area, the display area and the non-display area at least partially surround the light-transmitting area, the pixel defining layer extends from the display area to the non-display area, the pixel defining layer is provided with a first opening, the first opening comprises a plurality of first sub-openings and a plurality of second sub-openings, the plurality of first sub-openings are in the display area, the plurality of second sub-openings are in the non-display area, and the plurality of second sub-openings are closer to the light-transmitting area than the plurality of first sub-openings.

Abstract: A display apparatus includes: a first display area; a second display area including a transmissive area; a substrate; a plurality of first light-emitting elements over the substrate at the first display area; a plurality of second light-emitting elements over the substrate at the second display area; an optical functional layer on the plurality of first light-emitting elements, and including a hole corresponding to the second display area; a metal layer on the plurality of second light-emitting elements, and including a through portion corresponding to the transmissive area of the second display area; and a capping layer between the metal layer and the plurality of second light-emitting elements.

Abstract: A wafer processing method includes an adhesive film bonding step of bonding an adhesive film on a side of a back surface of the wafer, an adhesive film cutting-off step of cutting off at least the adhesive film that is bonded on the side of the back surface of the wafer along streets from the side of the back surface of the wafer, a modified layer forming step of irradiating a laser beam of a wavelength that has transmissivity through the wafer with the laser beam focused inside the wafer, so that modified layers are formed along the streets, respectively, and a dividing step of, after performing the adhesive film cutting-off step and the modified layer forming step, applying an external force to the wafer so that the wafer is divided from the modified layers as starting points.

Abstract: The present application relates to the field of display technologies, and provides a display panel including a base substrate; a plurality of pixel structures arranged in an array on the base substrate including a main light-emitting portion and an auxiliary light-emitting portion independently driven and having a same light-emitting color, as well as a microstructure covering the main light-emitting portion and the auxiliary light-emitting portion, light emitted by the main light-emitting portion and the auxiliary light-emitting portion of the same organic light-emitting sub-pixel is emitted through the microstructure; and wherein the initial brightness of the organic light-emitting sub-pixel is the initial brightness of the main light-emitting portion; and a control structure configured to control brightness of the auxiliary light-emitting portion according to brightness of the main light-emitting portion to compensate the brightness of the main light-emitting portion, so that brightness of the organic ligh

Abstract: A method for forming a film layer includes: a substrate is provided; a pretreatment step is performed, in which the pretreatment step includes providing a reaction source gas, which forms attachment points on the substrate; and a deposition step is performed, in which the reaction source gas is formed into a plasma, which is deposited on the substrate based on the attachment points to form a first film layer.

Abstract: The present disclosure provides semiconductor devices with asymmetric source/drain structures. In one example, a semiconductor device includes a first group of source/drain structures on a first group of fin structures on a substrate, a second group of source/drain structures on a second group of fin structures on the substrate, and a first gate structure and a second gate structure over the first and the second group of fin structures, respectively, the first and second groups of source/drain structures being proximate the first and second gate structures, respectively, wherein the first group of source/drain structures on the first group of fin structures has a first source/drain structure having a first vertical height different from a second vertical height of a second source/drain structure of the second group of source/drain structures on the second group of fin structures.

Abstract: A display apparatus having a function of emitting visible light and infrared light and a light detection function is provided. The display apparatus includes a first light-emitting device, a second light-emitting device, and a light-receiving device in a display portion. The first light-emitting device emits both visible light and infrared light and the second light-emitting device emits visible light. The light-receiving device has a function of absorbing at least part of visible light and infrared light. The first light-emitting device includes a first pixel electrode, a first light-emitting layer, a second light-emitting layer, and a common electrode. The second light-emitting device includes a second pixel electrode, a third light-emitting layer, and the common electrode. The light-receiving device includes a third pixel electrode, an active layer, and the common electrode. The first light-emitting layer includes a light-emitting material emitting infrared light.

Abstract: The present invention has an object to enhance manufacturability of a pressure-contact-type semiconductor device. A pressure-contact-type semiconductor device according to the present invention includes: a semiconductor chip, the semiconductor chip including a guard ring and a gate signal input/output part in the first main surface; a first external electrode being formed on a side of the first main surface of the semiconductor chip; a conductive pattern being formed on the first external electrode; a contact pin connecting the gate signal input/output part and the conductive pattern; a plate-like electrode being provided on the second main surface of the semiconductor chip; a disc spring being provided on the plate-like electrode; and a second external electrode being provided on the disc spring, the second external electrode and the first external electrode interposing the semiconductor chip.

Abstract: According to one embodiment, a display device includes a lower electrode, a second insulating layer including an opening overlapping the lower electrode, an organic layer including a light-emitting layer and a functional layer, disposed in the opening and covering the lower electrode and an upper electrode covering the organic layer. The functional layer includes a first region located between the lower electrode and the light-emitting layer and a second region including an end surface located directly above the second insulating layer. A dopant concentration of a guest material in the second region is lower than the dopant concentration of the guest material in the first region.

Abstract: A display panel, a manufacturing method thereof and a display device are provided. The display panel includes a base substrate, the base substrate includes a display region and a peripheral region surrounding the display region, the base substrate includes a first substrate layer, a third substrate layer and a second substrate layer which are sequentially stacked, a material of the second substrate layer includes amorphous silicon. The display region includes a transparent display region, the transparent display region includes a pixel region and a light transmission region, and a thickness of the second substrate layer located in the light transmission region is less than a thickness of at least part of the second substrate layer located outside the transparent display region.

Abstract: An imaging device includes: a semiconductor substrate; pixel electrodes located above the semiconductor substrate and each electrically connected to the semiconductor substrate; a counter electrode located above the pixel electrodes; a first photoelectric conversion layer located between the counter electrode and the pixel electrodes; and at least one first light-shielding body located in or above the first photoelectric conversion layer. The first photoelectric conversion layer contains a semiconducting carbon nanotube that absorbs light in a first wavelength range and an organic molecule that covers the semiconducting carbon nanotube, absorbs light in a second wavelength range, and emits fluorescence in a third wavelength range. The at least one first light-shielding body absorbs or reflects light with a wavelength in at least part of the second wavelength range.

Abstract: A semiconductor memory device includes: a conductive line stack including a plurality of first conductive lines that are stacked over a substrate in a direction perpendicular to a surface of the substrate; conductive pads extending laterally from edge portions of the first conductive lines, respectively; and contact plugs coupled to the conductive pads, respectively.

Abstract: An imaging device including: a photoelectric converter that converts light into a charge; a first diffusion region of a first conductivity type to which the charge is input; a second diffusion region of the first conductivity type; a first plug that has a first surface directly connected to the first diffusion region; and a second plug that has a second surface directly connected to the second diffusion region, where an area of the second surface of the second plug is larger than an area of the first surface of the first plug in a plan view.

Abstract: A method for depositing a nitride layer over an oxide layer to form an oxide-nitride stack is provided. The method includes supplying an inert gas to a plasma enhanced chemical vapor deposition (PECVD) reactor that supports a substrate having said oxide layer. Then, providing power to an electrode of the PECVD reactor, where the power is configured to strike a plasma. Then, flowing reactant gases into the PECVD reactor. The reactant gases include a first percentage by volume of ammonia (NH3), a second percentage by volume of nitrogen (N2), a third percentage by volume of silane (SiH4) and a fourth percentage by volume of an oxidizer. The fourth percentage by volume of said oxidizer is at least 0.5 percent by volume and less than about 8 percent by volume. Then, continuing to flow the reactant gases into the PECVD reactor until the nitride layer is determined to achieve a target thickness over the oxide layer.