Abstract: Systems and methods include receiving blocks of data that has been Forward Error Correction (FEC) encoded via Open Forward Error Correction (OFEC) adaptation; decoding the blocks of data; processing Cyclic Redundancy Check (CRC) data that is included in padding data required in the OFEC adaptation, wherein the padding data is distributed across N rows of payload data; and determining a location of any errors in the payload data based on the processed CRC data. The OFEC adaptation is for mapping the blocks of data into any of a FlexO-x frame structure, a ZR frame structure, and variants thereof, and the location of any errors can be used for error marking.

Abstract: A memory controller is configured to perform first error correcting code (ECC) encoding on a plurality of first frames of data, generate a plurality of delta syndrome units corresponding, respectively, to the plurality of first frames of data, generate a delta syndrome codeword by performing second ECC encoding on the plurality of delta syndrome units, the delta syndrome codeword including one or more redundancy data units, perform third ECC encoding on at least one second frame of data such that the encoded at least one second frame of data is a first vector of bits, and determine a second vector of bits such that, adding the second vector of bits to the first vector of bits forms a combined vector of bits which is an ECC codeword having a delta syndrome a value of which is pre-fixed based on at least one of the one or more redundancy data units.

Abstract: Disclosed herein are methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing blockchain data. One of the methods includes determining, by a blockchain node, one or more blocks that are infrequently visited; performing error correction coding of the one or more blocks to generate one or more encoded blocks; dividing, based on one or more predetermined rules, each of the one or more encoded blocks to a plurality of data sets; selecting one or more data sets from the plurality of data sets of each of the one or more encoded blocks based on the one or more predetermined rules; hashing the one or more data sets to generate one or more hash values corresponding to the one or more data sets; storing the one or more hash values; and deleting the one or more data sets.

Abstract: Various embodiments provide for encoding and decoding control link information with polar codes where the frozen bits of the information block can be set to the device identification number instead of being set to null. The frozen bits can be identified based on the type of polar code being used, and while the non-frozen bits can be coded with the channel state information, the frozen bits can be coded with the device ID. In an example where there are more frozen bits than bits in the device ID, the most reliable of the frozen bits can be coded with the device ID. In another example, the frozen bits can be set to the CRC bits, which can then be masked by the device ID.

Abstract: A computer program product, a device, a functionally secure programmable controller and a method for processing data via coded operations in a number of cycles, wherein an uncoded variable x is coded with a cycle-specific signature D and a variable-specific signature Bx to form a coded variable xc in accordance with the relationship: xc=D·x+Bx.

Abstract: Systems, apparatuses and methods may provide for technology to receive a codeword containing an SC-LDPC code and conduct a min-sum decode of the SC-LDPC code based on a plurality of scaling factors. In an embodiment, the scaling factors are non-uniform across check nodes and multiple iterations of the min-sum decode.

Abstract: Several embodiments of systems incorporating memory devices are disclosed herein. In one embodiment, a memory device can include a controller and a memory component operably coupled to the controller. The controller can include a memory manager, a quality metrics first in first out (FIFO) circuit, and an error correction code (ECC) decoder. In some embodiments, the ECC decoder can generate quality metrics relating to one or more codewords saved in the memory component and read into the controller. In these and other embodiments, the ECC decoder can stream the quality metrics to the quality metrics FIFO circuit, and the quality metrics FIFO circuit can stream the quality metrics to the memory manager. In some embodiments, the memory manager can save all or a subset of the quality metrics in the memory component and/or can use the quality metrics in post-processing, such as in error avoidance operations of the memory device.

Abstract: A method and system to improve the link budget of a wireless system using fast Hybrid Automatic Repeat Request (HARQ) protocol. In one embodiment of the invention, the Medium Access Control (MAC) logic in a base station determines whether the quality of the communication link with a mobile station is bad. When the MAC logic in the base station determines that the quality is bad, the base station uses a fast Hybrid Automatic Repeat Request (HARQ) protocol to indicate to the mobile station to send identical information to the base station in each of a plurality of successive or consecutive communication intervals before processing any received identical information from the mobile station. The fast HARQ protocol reduces the latency of receiving the identical information correctly, as compared with the current HARQ protocol.

Abstract: The application relates to the adaption of the length of the cyclic redundancy check (CRC) code in the context of 3GPP NR. In 3GPP NR, the length of the uplink and downlink control information (UCI, DCI) significantly varies. Therefore, it is necessary to select a CRC code of appropriate size or length. Accordingly, a method (200) for use in a wireless transmitter comprises: determining an amount of data to transmit (212), determining a cyclic redundancy check (CRC) polynomial length based on the amount of data to transmit (214); encoding the data using a CRC of the determined polynomial length (216); and transmitting the encoded data (216). The data to transmit may not only comprise control channel data but also user data and may be encoded with a Polar code or a low-density parity check (LDPC) code.

Abstract: A particular overall architecture for transmission over a bonded channel system consisting of two interconnected MoCA (Multimedia over Coax Alliance) 2.0 SoCs (Systems on a Chip) and a method and apparatus for the case of a “bonded” channel network. With a bonded channel network, the data is divided into two segments, the first of which is transported over a primary channel and the second of which is transported over a secondary channel.

Abstract: Disclosed are devices, systems and methods for precoding and decoding polar codes using local feedback are described. One example method for improving an error correction capability of a decoder includes receiving a noisy codeword vector of length n, the codeword having been generated based on a concatenation of a convolutional encoding operation and a polar encoding operation and provided to a communication channel prior to reception by the decoder, performing a successive-cancellation decoding operation on the noisy codeword vector to generate a plurality of polar decoded symbols (n), generating a plurality of information symbols (k) by performing a convolutional decoding operation on the plurality of polar decoded symbols, wherein k/n is a rate of the concatenation of the convolutional encoding operation and the polar encoding operation, and performing a bidirectional communication between the successive-cancellation decoding operation and the convolutional decoding operation.

Abstract: A data communication device includes a host receive section for receiving incoming host data from a host device. The host receive section includes a plurality of host receive lanes. A host transmit section for transmitting outgoing host data to the host device includes a plurality of host transmit lanes and a host cross point section. A line receive section for receiving incoming line data from a line device includes a plurality of line receive lanes. A line transmit section for transmitting outing line data to the line device includes a plurality of line transmit lanes and a line cross point section. A link monitor section coupled to the host transmit section and the line receive section is configured to detect errors between the host transmit section and the line receive section.

Abstract: This application discloses an information processing method and apparatus, a communications device, and a communications system. The method includes: encoding an input sequence by using a low density parity check LDPC matrix to obtain a bit sequence D, where a base matrix of the LDPC matrix is represented by a matrix of m rows and n columns, each column corresponds to a group of Z continuous bits in the bit sequence D, and both n and Z are integers greater than 0; and obtaining an output bit sequence based on a bit sequence V, where the bit sequence V is obtained by permuting groups of bits corresponding to at least two parity check columns in the bit sequence D.

Abstract: Techniques are described for improving the decoding latency and throughput of an error correction system that includes a bit flipping (BF) decoder, where the BF decoder uses a bit flipping procedure. In an example, different decoding parameters are determined including any of a decoding number of a decoding iteration, a checksum of a codeword, a degree of a variable node, and a bit flipping threshold defined for the bit flipping procedure. Based on one or more of these decoding parameters, a decision can be generated to skip the bit flipping decoding procedure, thereby decreasing the decoding latency and increasing the decoding throughput. Otherwise, the bit flipping decoding procedure can be performed to compute a bit flipping energy and determine whether particular bits are to be flipped or not. Hence, the overall performance (e.g., bit error rate) is not significantly impacted.

Abstract: Methods and apparatus for transmitting and receiving broadcast signals are provided. The method for transmitting a broadcast signal includes encoding mobile data for forward error correction (FEC), encoding signaling data, forming data groups including the encoded mobile data and the encoded signaling data and transmitting a signal frame that includes the data groups.

Abstract: Apparatuses, systems, and methods to perform continuous read operations are described. A system configured to perform such continuous read operations enables improved access to and processing of data for performance of associated functions. For instance, one apparatus described herein includes a memory device having an array that includes a plurality of pages of memory cells. The memory device includes a page buffer coupled to the array and a continuous read buffer. The continuous read buffer includes a first cache to receive a first segment of data values and a second cache to receive a second segment of the data values from the page buffer. The memory device is configured to perform a continuous read operation on the first and second segments of data from the first cache and the second cache of the continuous read buffer.

Abstract: A signal comprising a succession of first bit sequences Xn is generated. Each Xn with n?1 is determined from the preceding Xn?1 using a deterministic algorithm P. The signal is transmitted from a transmitter through the communication system and received as a second bit sequence Xn? by a receiver. For each received Xn?, the method comprises determining a first group of candidates corresponding to a plurality of possible first bit sequences Xn,i that could have been sent from the transmitter device and changed into the second bit sequence Xn? according to an acceptable modification in the communication system; determining a second group of candidates from candidates determined for the preceding index n?1 and using P; determining a third group of candidates by intersecting the first group of candidates and the second group of candidates; checking the third group.

Abstract: A method is performed by a wireless communications device of transmitting measurement reports to an infrastructure equipment. The method comprises receiving signals transmitted by the infrastructure equipment, measuring a characteristic associated with the received signals, and selecting an index value from one of a plurality of index values. Each of the index values represents a range of values of the characteristic for which communications parameters of a transmitter in the infrastructure equipment and a receiver in the communication device should have to achieve an acceptable communications performance for values of the characteristic within the range of values of the characteristic. The method further comprises, subject to the selected index value, transmitting the selected index value to the infrastructure equipment.

Abstract: Aspects of a storage device including a memory and a controller are provided which allow for data associated with a media stream and having high entropy to be stored in healthier memory locations, with improved data protection, and with more optimal NAND parameters than for data having low entropy. After receiving data associated with a media stream, the controller identifies an entropy level of the data. When the entropy level meets an entropy threshold, the controller stores the data in a first block of the memory associated with a lower BER, and/or with a higher write latency or a first, more discrete voltage. Alternatively, when the entropy level does not meet the entropy threshold, the controller stores the data in a second block of the memory associated with a higher BER, and/or with a lower write latency or a second, less discrete voltage.

Abstract: Various implementations described herein relate to systems and methods for decoding data stored in a non-volatile storage device, including determining features for each of a plurality of component codes corresponding to the data by decoding each of the plurality of component codes, determining an extrinsic value output for each of the component codes based on the features, and after the extrinsic value output for each of the component codes is determined, decoding each of the plurality of component codes based on the extrinsic value outputs of all other component codes of the component codes. Each of the component codes depends on all other component codes.