Patents Examined by Nicholas Ieva
  • Patent number: 9203286
    Abstract: A magnetic shielding arrangement, including: at least one magnetic flux source; a superconductor magnetic shield at least partially surrounding the magnetic flux source; a second shield at least partially surrounding the superconductor magnetic shield.
    Type: Grant
    Filed: September 26, 2012
    Date of Patent: December 1, 2015
    Assignee: ROLLS-ROYCE plc
    Inventor: Huw Llewelyn Edwards
  • Patent number: 9184740
    Abstract: A power circuit including a current-limiting semi-conductor switch and a control system connected to the current-limiting semi-conductor switch and configured to bias the semi-conductor switch into conduction and into cut-off. The control system further comprises a short-circuit protection circuit configured to detect and evaluate the voltage drop via the current-limiting semi-conductor switch.
    Type: Grant
    Filed: November 10, 2008
    Date of Patent: November 10, 2015
    Inventor: Uwe Prüssmeier
  • Patent number: 9117586
    Abstract: A circuit arrangement includes a coreless transformer. A trimming device is connected to the transformer and includes a variable capacitance and/or inductance.
    Type: Grant
    Filed: March 9, 2009
    Date of Patent: August 25, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Roderick McConnell, Bernhard Strzalkowski
  • Patent number: 9112310
    Abstract: Circuits, methods, and apparatus that may provide low-capacitance protection from electrostatic discharges. One example protects a circuit in a cable connector that is connected to cable connector contacts. This example may include a number of spark gaps that may be used for electrostatic discharge protection. These spark gaps may be formed using traces a printed circuit board. Signal traces to be protected may be routed such that they pass in close proximity to a ground pad, line, plane, area, or connection. When excessive electrostatic energy builds up on the signal trace, the energy may spark across a gap from the signal trace to the ground pad. The gap and parts of the signal traces and ground may be uncovered such that the electrostatic discharge may dissipate through the air.
    Type: Grant
    Filed: February 23, 2011
    Date of Patent: August 18, 2015
    Assignee: Apple Inc.
    Inventors: Erik James Shahohian, Vince Duperron
  • Patent number: 9076831
    Abstract: An electrostatic chuck includes an electrically conductive baseplate and an electrically non-conductive substrate support member disposed on the baseplate. First and second sets of clamp electrodes are disposed within the support member. A power supply system includes a clamp power supply, a center tap power supply, and a baseplate power supply. The clamp power supply generates a positive output voltage and a negative output voltage, each of which is equidistant from a center tap voltage. The positive output voltage is electrically connected to the first set of clamp electrodes. The negative output voltage is electrically connected to the second set of clamp electrodes. The center tap power supply is defined to control the center tap voltage of the clamp power supply. The baseplate power supply is defined to generate a baseplate output voltage independent from the center tap voltage. The baseplate output voltage is electrically connected to the baseplate.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: July 7, 2015
    Assignee: Lam Research Corporation
    Inventor: John Drewery
  • Patent number: 9076654
    Abstract: A semiconductor device has: a power supply line; a ground line; a signal line for transmitting a signal; a signal pad connected to the signal line; a protection element connected between the signal line and the ground line; and a trigger circuit configured to supply a trigger current to the protection element. The trigger circuit has: a PMOS transistor whose gate and backgate are connected to the power supply line and whose source is connected to the protection element; and an amplifier circuit part configured to amplify a first current flowing through the PMOS transistor to generate a second current. The trigger current includes the second current.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: July 7, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Mototsugu Okushima
  • Patent number: 9053844
    Abstract: An electrical device that includes a first electrode and a second electrode that are separated from one another so as to form a gap structure. A layer of protective material spans the gap structure to contact the first electrode and the second electrode. A dimension of the gap structure, corresponding to a separation distance between the first electrode and the second electrode, is varied and includes a minimum separation distance that coincides with a critical path of the layer of protective material between the first electrode and the second electrode.
    Type: Grant
    Filed: September 9, 2010
    Date of Patent: June 9, 2015
    Assignee: Littelfuse, Inc.
    Inventors: Lex Kosowsky, Robert Fleming
  • Patent number: 9046901
    Abstract: A device for reducing a magnetic unidirectional flux fraction in the core of a transformer is provided. The device has a measuring device that provides a sensor signal corresponding to the magnetic unidirectional flux fraction, a compensation winding that is magnetically coupled to the core of the transformer, a switching unit arranged electrically in a current path in series with the compensation winding in order to feed a current into the compensation winding. The action of the current is directed opposite to the unidirectional flux fraction. The switching unit can be controlled by a regulating variable provided by a control device and can be switched into a conductive state during a predefined time interval and in accordance with the regulating variable, the switch-on time being mains-synchronous. A device for limiting the current in the current path is provided and the sensor signal is fed to the control device.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: June 2, 2015
    Inventors: Peter Hamberger, Albert Leikermoser
  • Patent number: 9036313
    Abstract: Disclosed is an apparatus for protecting an analog input module from overvoltage, the apparatus including an analog input module and a stabilization unit. The analog input module converts one of a plurality of positive/negative analog signals inputted from the outside thereof into a digital signal and insulates the converted digital signal. The stabilization unit supplies voltages of the positive/negative analog signals to the analog input module when the voltage levels of the plurality of positive/negative analog signals are higher than the levels of positive/negative operating voltages in the analog input module.
    Type: Grant
    Filed: July 7, 2011
    Date of Patent: May 19, 2015
    Assignee: LSIS Co., Ltd.
    Inventor: Jae Il Kwon
  • Patent number: 9030793
    Abstract: A circuit protection device for monitoring a current flowing from an electrical distribution line through a trip mechanism to a load includes an input conductor configured to receive a current signal from a sensor. At least one resistor is arranged to receive the current signal from the input conductor, and provides a voltage signal proportional to the current signal. The circuit protection device includes a control circuit coupled in parallel with the resistor and a power supply that receives the current signal from the resistor and supplies power to the control circuit based on the current signal. The control circuit is configured to receive the voltage signal and determine an amplitude of the current flowing through the trip mechanism based on the voltage signal. The control circuit is also configured to determine whether a predetermined current threshold is exceeded and to generate a control signal to activate the trip mechanism.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: May 12, 2015
    Assignee: General Electric Company
    Inventors: Zachary Herman Cull, Craig Benjamin Williams
  • Patent number: 9013849
    Abstract: A ground protection circuit (36) includes: a sensing resistor (R3), disposed on a path which a charging current (IB) of a bootstrap circuit (D1, C1) flows through; a comparator (361), for comparing a voltage (?V) between two ends of the sensing resistor (R3) and a specific threshold voltage (Vth) to generate a ground protection signal (S1); and a logic gate (362), for enabling the ground protection signal (S1) to be invalid in a normal charging operation of the bootstrap circuit.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: April 21, 2015
    Assignee: Rohm Co., Ltd.
    Inventor: Motohiro Ando
  • Patent number: 8982529
    Abstract: A substrate mounting and demounting method that can prevent fine particles from getting stuck in a rear surface of a substrate. A substrate processing apparatus that implements the substrate mounting and demounting method has an electrostatic chuck that has therein an electrode plate to which a DC voltage is applied, and attracts and holds a substrate through an electrostatic force generated due to the applied DC voltage, and a heat-transmitting gas supply unit that supplies a heat-transmitting gas into a gap between the attracted and held substrate and the electrostatic chuck. When the DC voltage applied to the electrode plate is increased while being gradually changed, the pressure of the supplied heat-transmitting gas is increased in stages in response to the increase in the DC voltage.
    Type: Grant
    Filed: March 16, 2011
    Date of Patent: March 17, 2015
    Assignee: Tokyo Electron Limited
    Inventor: Yoshiyuki Kobayashi
  • Patent number: 8982520
    Abstract: A system and method for efficient input/output (I/O) port overvoltage protection of a high-speed port. An interfacing system for connecting peripheral devices to a computing system comprises ports for conveying serial communications bi-directional signals and an overvoltage protection circuit. The protection circuit prevents an overvoltage condition on one port in response to an overvoltage event on a corresponding second port. In one embodiment, the interfacing system connects USB peripheral devices to an automotive infotainment system comprising an automotive battery potiential greater than a USB power supply. In addition, the overvoltage protection circuit is able to transmit signals between the two ports without signal attenuation defined by an industry standard specification such as Universal Serial Bus (USB) Implementers Forum (IF) eye pattern diagram test.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: March 17, 2015
    Assignee: Standard Microsystems Corporation
    Inventors: Alexei A. Predtetchenski, Hans L. Magnusson
  • Patent number: 8982524
    Abstract: A low forward voltage drop transient voltage suppressor utilizes a low-reverse-voltage-rated PN diode electrically connected in parallel to a high-reverse-voltage-rated Schottky rectifier in a single integrated circuit device. The transient voltage suppressor is ideally suited to fix the problem of high forward voltage drop of PN diodes and high leakage of low reverse breakdown of Schottky rectifiers. The low-reverse-voltage PN rectifier can be fabricated through methods such as 1) double layers of epi (with higher concentration layer epi in the bottom) or 2) punch through design of PN diode by base with compression.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: March 17, 2015
    Assignee: Vishay General Semiconductor, LLC
    Inventors: Lung-Ching Kao, Pu-Ju Kung, Yu-Ju Yu
  • Patent number: 8976499
    Abstract: An electronic fuse system includes plural current paths, each operable to be coupled between a power source and a load, and each including a switching element and a current sensing resistor in series with the path such that the path passes current when the switching element is turned on and does not pass current when the switching element is turned off. A controller has two sense inputs and a control output. The control output is coupled to the switching elements in each of the plural current paths and is operable to turn them all on or off simultaneously responsive at least in part to the sense inputs. A summing resistor is connected across the two sense inputs, and coupling circuitry is operable to couple voltages appearing across the current sensing resistors to the summing resistor.
    Type: Grant
    Filed: April 27, 2010
    Date of Patent: March 10, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Kelly Pracht, Samuel M Babb
  • Patent number: 8947839
    Abstract: Enhanced electrostatic discharge (“ESD”) protection for an integrated circuit is described. An embodiment relates generally to a circuit for protection against ESD. The circuit has an input/output node and a driver. The driver has a first transistor and a second transistor. A first source/drain node of the first transistor is coupled to the input/output node. A second source/drain node of the first transistor forms a first interior node capable of accumulating charge when electrically floating. A first current flow control circuit is coupled to a discharge node and the second source/drain node of the first transistor. The first current flow control circuit is electrically oriented in a bias direction for allowing accumulated charge to discharge from the first interior node via the first current flow control circuit to the discharge node.
    Type: Grant
    Filed: July 30, 2009
    Date of Patent: February 3, 2015
    Assignee: Xilinx, Inc.
    Inventor: James Karp
  • Patent number: 8891212
    Abstract: RC-trigger circuits for a semiconductor controlled rectifier (SCR), methods of providing electrostatic discharge (ESD) protection, and design structures for a RC-trigger circuit. The RC-trigger circuit is coupled to an input/output (I/O) signal pad by an isolation diode and is coupled to a power supply voltage by a power supply diode. Under normal operating conditions, the isolation diode is reverse biased, isolating the RC-trigger circuit from the input/output (I/O) pad, and the power supply diode is forward biased so that the RC-trigger circuit is supplied with power. The isolation diode may become forward biased during ESD events while the chip is unpowered, causing the RC-trigger circuit to trigger an SCR configured protect the signal pad from ESD into a conductive state. The power supply diode may become reverse biased during the ESD event, which isolates the power supply rail from the ESD voltage pulse.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Michel J. Abou-Khalil, Robert J. Gauthier, Jr., Tom C. Lee, Junjun Li, Souvick Mitra, Christopher S. Putnam
  • Patent number: 8848323
    Abstract: A superconducting fault current limiter comprises a superconducting element having a plurality of superconducting portions and at least one connector. Each superconducting portion has end regions and each connector is connected to the end regions of adjacent superconducting portions to electrically and thermally connect adjacent superconducting portions of the superconducting fault current limiter together. Each connector provides a local reduction in the critical current and quench current of the end regions of the superconducting portions in contact with the at least one connector. This provides a phased transition of the superconducting fault current limiter in relation to the severity of a fault current.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: September 30, 2014
    Assignee: Rolls-Royce plc
    Inventors: Stephen M. Husband, Alexander C. Smith
  • Patent number: 8842402
    Abstract: A control circuit for a protection circuit device includes first and second voltage boosters, a comparator coupled thereto, and a MOSFET for bypassing a direct current (DC) source. The control circuit may include a control logic circuit having a first input coupled to an output of the comparator, a second input receiving a disable command signal, a first output coupled to an enable input of the first voltage booster, and a second output, and a four terminal path inversion switch. The control circuit may include a supply voltage line, a sensor coupled to the second input of the control logic circuit, to generate the disable command signal, and to force the MOSFET into a conduction mode, and an external command terminal coupled to the second input of the control logic circuit, to receive the disable command signal, and to force the MOSFET into the conduction mode.
    Type: Grant
    Filed: May 12, 2011
    Date of Patent: September 23, 2014
    Assignee: STMicroelectronics S.R.L.
    Inventors: Tiziana Teresa Signorelli, Francesco Pulvirenti, Natale Aiello
  • Patent number: 8810978
    Abstract: Disclosed herein is a Superconducting Fault Current Limiter (SFCL) for suppressing a bus voltage drop in an electric power system. A primary winding, a secondary winding, and a tertiary winding are wound around an identical iron core, and a superconductor is connected to any one of the primary winding and the secondary winding. A first switch is connected to any one of the primary winding and the secondary winding and is configured to be opened so as to separate a faulty section when a fault current is generated and to be shorted when the fault current is eliminated. A second switch is connected in series to the tertiary winding and is configured to be shorted so as to stably supply power when the fault current is generated and to be opened when the fault current is eliminated.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: August 19, 2014
    Assignee: Foundation of Soongsil University-Industry Cooperation
    Inventors: Sung-Hun Lim, Jae-Chul Kim, Il-Kyoung You, Jin-Seok Kim, Myoung-Hoo Kim