Patents Examined by Nicholas Ieva
  • Patent number: 8804289
    Abstract: A protection circuit (100, 700) is disclosed for protecting an integrated circuit having a first supply rail (Vcc) and a second supply rail (Vss) from exposure to an excessive voltage. The protection circuit (100, 700) comprises a sensor (120) for sensing a voltage increase on the first supply rail (Vcc). Such a sensor may be implemented as an RC element. The sensor (120) has an output coupled to a signal path for providing a detection signal on said path. The sensor (120) triggers a clamping circuit (180) to clamp the first supply rail (Vcc) to the second supply rail (Vss) in response to the detection signal, which typically signals an ESD event on the supply rails. A pre-amplifying stage (160) is coupled between the sensor (120) and the clamping circuit (180) to amplify the detection signal for the clamping circuit (180). The protection circuit further comprises a hold circuit (140) for holding the control input of the pre-amplifying stage (160) in an enabled state upon termination of the detection signal.
    Type: Grant
    Filed: October 13, 2008
    Date of Patent: August 12, 2014
    Assignee: NXP, B.V.
    Inventors: Denis Crespo, Herve Marie, Nguyen Trieu Luan Le, Mickael Lucas
  • Patent number: 8780510
    Abstract: A superconducting magnet apparatus that in one embodiment includes at least one superconducting coil and a passive quench protection circuit electrically coupled to the coil in parallel. The circuit includes a heater and a current limiter connected in series. The heater is thermally coupled to the coil and the current limiter blocks current through the circuit at a current lower than the current rating of the heater.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: July 15, 2014
    Assignee: General Electric Company
    Inventors: Xianrui Huang, Anbo Wu, Yan Zhao, Chao Yang
  • Patent number: 8749941
    Abstract: A residual-current circuit breaker includes at least one summation current transformer through which are guided at least one first conductor and one second conductor of an electric network to be protected. At least one secondary winding is arranged on the summation current transformer and connected in terms of circuitry to a trip element. A test circuit connects the first conductor with the second conductor and includes at least one first test resistor, a second test resistor arranged serially in relation to the first test resistor in terms of circuitry, and a test button. The second test resistor is bridged by a shunt line which is guided through the summation current transformer. Arranged in the shunt line in terms of circuitry is at least one first voltage-dependent resistor.
    Type: Grant
    Filed: March 18, 2011
    Date of Patent: June 10, 2014
    Assignee: Moeller Gebäudeautomation GmbH
    Inventor: Gerhard Dobusch
  • Patent number: 8730635
    Abstract: If a power supply path is in an abnormal state, a power-supply-path protection circuit of a power supply controller inhibits a switching circuit that switches on/off power supply from a power source to a load from power supply, using data related to a protection-current temperature characteristic line set by a characteristic setting circuit. The protection-current temperature characteristic line has a characteristic in which a protection current value is constant corresponding to increase in an ambient temperature or a negative characteristic in which the protection current value reduces corresponding to increase in the ambient temperature. Within a temperature range equal to or lower than an supposed maximum ambient temperature around the power-supply-path, the protection-current temperature characteristic line and a power-supply-path temperature characteristic line have a relation that the protection-current value is equal to or lower than an allowable current value at an identical ambient temperature.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: May 20, 2014
    Assignees: Autonetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Seiji Takahashi, Yutaka Higuchi
  • Patent number: 8705224
    Abstract: A method for generating ions is disclosed. The method includes generating AC high voltage using a stationary AC generator, applying the AC high voltage to one or more AC/DC voltage converters via capacitive air coupling between a high voltage terminal of the AC generator and one or more high voltage terminals of the AC/DC voltage converters. The method also includes rotating the AC/DC voltage converters, each AC/DC voltage converter connected to an air ionizing electrode that rotates with the AC/DC voltage converter it is connected to when that AC/DC voltage converter is rotated, relative to the AC generator, in an air flow. The method further includes providing additional capacitive air coupling between a low voltage terminal of the AC generator and one or more low voltage terminals of the AC/DC voltage converters, and multiplying the voltage output of the AC/DC converters. An ion generator is also disclosed.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: April 22, 2014
    Inventor: Yefim Riskin
  • Patent number: 8705217
    Abstract: An integrated circuit includes an electrostatic discharge (ESD) detection circuit which detects an ESD event and generates an event signal. In response to that event signal, a control circuit controls the operation of a buffer circuit to function in an additional mode wherein the normal differential operation of the buffer circuit is disabled and the buffer circuit is instead configured to form a conduction path between supply rails to discharge the ESD event. Preferably, a plurality of buffer circuits are driven in parallel by the control circuit to function in the additional mode to form parallel discharge paths for the ESD event. Multiple ESD detection circuits may be provided, and any one of those detection circuits can trigger the control circuitry to place all of the buffer circuits in the additional mode.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: April 22, 2014
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Yannick Guedon, Meiliana Leow, Sze-Kwang Tan, Mariano Dissegna, Lorenzo Cerati
  • Patent number: 8699192
    Abstract: The invention relates to a method for providing short-circuit protection for a resistive AC load, wherein the load is connected with an AC power supply through an active controlled switch controlled by a controller. The method for providing short-circuit protection for the resistive AC load comprises the following steps of: turning on the active controlled switch within a first conduction angle range; obtaining the mean current value of the load through a current detection circuit; and determining whether the mean current value of the load is greater than a default value or not, wherein, if so, the active controlled switch is controlled to be turned off, and if not, the active controlled switch is controlled to be turned on. The invention also relates to a device and a switch for providing short-circuit protection for the resistive AC load.
    Type: Grant
    Filed: December 30, 2009
    Date of Patent: April 15, 2014
    Assignee: Shenzhen H & T Intelligent Control Co., Ltd.
    Inventors: Xianfang Wang, Yonglian Yang, Baoning Deng, Gang Zhou, Jianwei Liu, Xiaoyong Dong, Linlin Pi
  • Patent number: 8693149
    Abstract: In one embodiment, a semiconductor device to provide protection for electronic circuits, the semiconductor device typically includes a vertical MOS transistor, a reference circuit, and an amplifier. The amplifier amplifies the reference voltage to enable the vertical MOS transistor responsively to a transient event.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: April 8, 2014
    Assignee: Semiconductor Components Industries, LLC.
    Inventors: Alan R. Ball, Stephen P. Robb
  • Patent number: 8681462
    Abstract: A circuit testing closer is capable of closing a power distribution circuit and interrupting the resulting current at the next current zero. Upon detecting a fault, the circuit testing closer is operable to open contacts to isolate the fault. Next, the circuit testing closer tests the faulted line to determine whether the fault has cleared. The circuit testing closer may generate a first test signal having a first polarity and a second test signal having a second polarity opposite the first polarity. Generation of the second test signal may be limited to occur when the first test signal indicates a fault.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: March 25, 2014
    Assignee: S&C Electric Company
    Inventors: Raymond P. O'Leary, Christopher R. Lettow, Alejandro Montenegro, John C. Opfer
  • Patent number: 8654492
    Abstract: An electrostatic discharge (ESD) protection apparatus includes a clamp circuit, a detection circuit and a control circuit. The clamp circuit has a first terminal and a second terminal respectively coupled to a first rail line and a second rail line. In response to an ESD event, the clamp circuit generates a first coupling potential at its coupling terminal. The detection circuit, coupled to the coupling terminal of the clamp circuit and the second rail line, outputs a detection signal in response to the first coupling potential. The control circuit, coupled to the first and second rail lines, the detection circuit and the clamp circuit, outputs a conduction signal to a control terminal of the clamp circuit in response to the detection signal. The clamp circuit is conducted in response to the conduction signal so that ESD between the first and second rail lines is performed through the clamp circuit.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: February 18, 2014
    Assignee: Industrial Technology Research Institute
    Inventor: Chih-Ting Yeh
  • Patent number: 8654496
    Abstract: A circuit breaker includes separable contacts, an operating mechanism to open and close the contacts, and a trip unit cooperating with the operating mechanism to trip open the contacts. The trip unit includes a first component having a processor and a first memory storing a first set of a plurality of trip unit settings, and a second component of the trip unit. The second component is separable from the first component or the trip unit, and includes a second memory storing a second set of a plurality of trip unit settings. The second component saves the first set of the plurality of trip unit settings as the second set of the plurality of trip unit settings in the second memory, and restores the second set of the plurality of trip unit settings in the first memory of the first component or of another first component of another trip unit.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: February 18, 2014
    Assignee: Eaton Corporation
    Inventors: John C. Schlotterer, Arthur A. Anderson, Randal P. Shvach
  • Patent number: 8649152
    Abstract: A circuit configuration for recording the resistance of a coil of a magnetic valve, having at least one magnetic valve, having at least one valve coil that is to be actuated, a current source for applying a current to the at least one valve coil and generating a voltage drop at the at least one valve coil, and an evaluation circuit for outputting the voltage drop generated at the at least one valve coil as the output signal of the circuit configuration.
    Type: Grant
    Filed: May 9, 2008
    Date of Patent: February 11, 2014
    Assignee: Knorr-Bremse Systeme Fuer Nutzfahrzeuge GmbH
    Inventors: Markus Schoeneck, Michael Haug, Wolfgang Gscheidle, Markus Deeg, Dieter Woerner
  • Patent number: 8649141
    Abstract: A by-pass circuit includes a first power MOS with an intrinsic diode, a first conduction terminal coupled to a cathode, a second conduction terminal coupled to an anode, and a control terminal. A tank capacitor is coupled to the anode. A second MOS has a first and second conduction terminals, a control terminal, and a turn-on threshold smaller than that of the intrinsic diode, the first conduction terminal thereof coupled to the cathode and the control terminal coupled to the anode, so the first MOS turns on when the array of cells are sub-illuminated. An oscillator and charge pump are supplied through the second conduction terminal of the second MOS to charge the tank capacitor. A control circuit is coupled to the control terminal of the first power MOS to switch it based upon a voltage of the tank capacitor and sign of the voltage between the cathode and anode.
    Type: Grant
    Filed: June 24, 2009
    Date of Patent: February 11, 2014
    Assignee: STMicroelectronics S.R.L.
    Inventors: Amedeo La Scala, Francesco Pulvirenti
  • Patent number: 8643994
    Abstract: If a power supply path is in an abnormal state, a power-supply-path protection circuit of a power supply controller inhibits a switching circuit that switches on/off power supply from a power source to a load from power supply, using data related to a protection-current temperature characteristic line set by a characteristic setting circuit. The protection-current temperature characteristic line has a characteristic in which a protection current value is constant corresponding to increase in an ambient temperature or a negative characteristic in which the protection current value reduces corresponding to increase in the ambient temperature. Within a temperature range equal to or lower than an supposed maximum ambient temperature around the power-supply-path, the protection-current temperature characteristic line and a power-supply-path temperature characteristic line have a relation that the protection-current value is equal to or lower than an allowable current value at an identical ambient temperature.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: February 4, 2014
    Assignees: Autonetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Seiji Takahashi, Yutaka Higuchi
  • Patent number: 8611063
    Abstract: Devices, such as mobile devices, may be exposed to short circuit and output overload events. To protect against such events, mobile devices typically include circuitry to limit currents so as not to exceed a pre-programmed current limit. Various embodiments of the present invention include devices and methods for detecting pre-programmed current limits and for limiting currents in response to such detection. In some embodiments, both the current limit detector and the current limit controller circuitry include scaled current switches. The scaling may be substantially similar between the programmed-current limit detector and the current limit controller circuitry.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: December 17, 2013
    Assignee: Advanced Analogic Technologies Incorporated
    Inventor: John So
  • Patent number: 8576533
    Abstract: A discharge gap device includes a first discharge pattern connected to a first wiring pattern and a second discharge pattern connected to a second wiring pattern which is electrically insulated from the first wiring pattern and the first discharge pattern, the second discharge pattern projecting from the second wiring pattern. The first and second discharge patterns are opposed to each other, and a gap between the first discharge pattern and the second discharge pattern is set to a predetermined interval, so that the discharge gap device discharges a lightning surge or static electricity from the gap. The first discharge pattern includes a first side face which confronts the second discharge pattern, the second discharge pattern includes a second side face which confronts the first side face, and the first side face and the second side face are arranged in parallel.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: November 5, 2013
    Assignee: Mitsumi Electric Co., Ltd.
    Inventor: Takayuki Katayama
  • Patent number: 8526147
    Abstract: In an LVTSCR, an avalanche diode based control circuit controls both the base of the internal PNP of the LVTSCR as well as the gate of the LVTSCR.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: September 3, 2013
    Assignee: National Semiconductor Corporation
    Inventors: Antonio Gallerano, Vladislav Vashchenko
  • Patent number: 8422183
    Abstract: A voltage (V1?V2) between a predetermined point P2 on a copper foil pattern 4 connected to a source of a switching FET (T1) and a drain P1 of the FET (T1) is input into an input terminal of a comparator CMP1 as an overcurrent determination voltage for comparison with a reference voltage V3. As this occurs, since there exists a voltage that is to be dropped by a resistor Rp possessed by the copper foil 4, the voltage (V1?V2) becomes larger than an inter-terminal voltage VDS of the FET (T1), and as a result, the effect imposed by an offset voltage Voff possessed by the comparator CMP1 can be reduced.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: April 16, 2013
    Assignee: Yazaki Corporation
    Inventor: Shunzou Ohshima
  • Patent number: 8422186
    Abstract: An improved programmable logic control device for monitoring the current of a circuit and for signalling a circuit control device, the programmable logic control device including electrical power circuitry for activating the circuit control device and electrical circuitry for monitoring the current in the electrical circuit, the electrical circuitry including: adjustable electrical signal input circuitry to monitor the electrical current in the circuit; adjustable pick-up circuitry for adjusting the level of the current monitored in the electrical circuit, the pick-up circuitry having a thermister means for improved stabilization; adjustable time circuitry to command the electrical power circuitry to activate the circuit control device when the electrical current in the electrical circuit reaches the selected level and time duration, the time circuitry having an increased time duration to minimize nuisance tripping; and a zener diode in reverse mode for controlling the level of voltage applied to the adjustab
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: April 16, 2013
    Inventor: William K. Penniston
  • Patent number: 8400748
    Abstract: In a magnetic coupler device comprising: a magnetic field generation circuit generating a magnetic field according to an input current; and a detection bridge circuit including a pair of magnetoresistance effect devices, a resistance value of each of the magnetoresistance effect devices changing by applying a magnetic field generated by said magnetic field generation circuit to each of the magnetoresistance effect devices, and having two outputs between which a voltage difference is generated according to an intensity of the magnetic field generated by said magnetic field generation circuit, by forming a geometric shape of each of said magnetic field generation circuit and said detection bridge circuit in line symmetric or point symmetric, a high S/N ratio is obtained even with high frequency.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: March 19, 2013
    Assignees: OMRON Corporation, The Research Institute for Electric and Magnetic Materials
    Inventors: Masaaki Yamamoto, Yuichi Kariya, Katsuhisa Toshima, Nobukiyo Kobayashi, Takeshi Yano