Patents Examined by Nicholas Ieva
  • Patent number: 8373957
    Abstract: A load driving circuit includes a first transistor and a second transistor that are bipolar transistors connected in series between a first fixed voltage (Vdd) and a second fixed voltage (GND), and supplies a drive current, according to ON-OFF states of the two transistors, to a load connected to an output terminal that is a connection point of the two transistors. A current source controls a base current supplying the first transistor. A protection circuit compares output voltage of the output terminal with a predetermined threshold voltage, and additionally monitors ON and OFF states of the first transistor. In a state in which Vout<Vth, and the first transistor is ON, the protection circuit reduces the base current of the first transistor.
    Type: Grant
    Filed: August 1, 2007
    Date of Patent: February 12, 2013
    Assignee: Rohm Co., Ltd.
    Inventor: Kenichi Niiyama
  • Patent number: 8345404
    Abstract: A conductive layer mainly made of gold is formed on an upper surface of an insulating substrate. Plural electrodes facing each other via a gap is formed by forming the gap in the conductive layer. An overvoltage protective layer covering the gap and a portion of each of the plurality of electrodes is formed. This method can provide the gap with a narrow width precisely, and thereby, provide an electrostatic (ESD) protector with a low peak voltage, stable characteristics of suppressing electrostatic discharge, and a high resistance to sulfidation.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: January 1, 2013
    Assignee: Panasonic Corporation
    Inventors: Kenji Nozoe, Takeshi Iseki, Takashi Morino, Hideaki Tokunaga
  • Patent number: 8339758
    Abstract: A transient voltage suppressor and a method for protecting against surge and electrostatic discharge events. A semiconductor substrate of a first conductivity type has gate and anode regions of a second conductivity type formed therein. A PN junction diode is formed from a portion of the gate region and the semiconductor substrate. A cathode is formed adjacent to another portion of the gate region. A thyristor is formed from the cathode, the gate region, the substrate, and the anode region. Zener diodes are formed from other portions of the gate region and the semiconductor substrate. A second Zener diode has a breakdown voltage that is greater than a breakdown voltage of a first Zener diode and that is greater than a breakover voltage of the thyristor. The first Zener diode protects against a surge event and the second Zener diode protects against an electrostatic discharge event.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: December 25, 2012
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Mingjiao Liu, Ali Salih, Emmanuel Saucedo-Flores, Suem Ping Loo
  • Patent number: 8335065
    Abstract: A method for protecting against over voltage in a power supply comprises monitoring current amplitude and direction on an output connection of a power source that combines power from a plurality of power sources, and determining occurrence of a fault condition of the monitored power source based on the current amplitude and direction. In a fault condition of the monitored power source, operation of the monitored power source subject to the fault condition is terminated while continuing operation of the plurality of power sources exclusive of the monitored power source.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: December 18, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Robert B. Smith
  • Patent number: 8331071
    Abstract: A distributed energy resource (DER) switching system and method for connecting a DER to an electrical power system (EPS) protector, wherein the DER has a reactance-to-resistance ratio higher than the reactance-to-resistance ratio of the EPS protector. The DER switching system includes an input for receiving power from the DER, and an output for providing power from the DER to the EPS protector. The DER switching system is designed to effectively lower the higher reactance-to-resistance ratio of the DER during an over-current fault so that, during the fault, the effective reactance-to-resistance ratio at the output of the DER switching system is lower than the reactance-to-resistance ratio of the EPS protector. The method includes effectively lowering the reactance-to-resistance ratio of the DER by varying the operating state of a switching device in a controlled manner during the fault.
    Type: Grant
    Filed: June 12, 2009
    Date of Patent: December 11, 2012
    Assignee: Northern Power Systems Utility Scale, Inc.
    Inventors: Eric L. Benedict, Vinod John
  • Patent number: 8320087
    Abstract: The present invention discloses a switching regulator control circuit which distinguishes the output short-circuit condition, which imposes immediate danger, from other mild over current conditions. The switching regulator control circuit includes: an over current judgment circuit comparing a current sense signal with a current limit to generate an over current indication signal; a time comparison circuit comparing the over current indication signal with a clock signal to generate an output short-circuit indication signal; and a timer receiving the over current indication signal and the output short-circuit indication signal, wherein when the output short-circuit indication signal does not indicate output short-circuit, the timer counts a first time period, and when the output short-circuit indication signal indicates output short-circuit, the timer counts a second time period shorter than the first time period, for better safety protection.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: November 27, 2012
    Assignee: Richpower Microelectronics Corporation
    Inventor: Hung-Lin Lin
  • Patent number: 8289669
    Abstract: A semiconductor device includes an output transistor which controls a power supply to a load according to a control voltage applied to a gate thereof, a voltage control circuit coupled between the gate and a drain of the output transistor, the voltage control circuit having a conduction state controlled according to a potential difference between a source and the drain of the output transistor, and a voltage control detection circuit which outputs a voltage control detection signal on a basis of the conduction state of the voltage control circuit.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: October 16, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Akihiro Nakahara
  • Patent number: 8284530
    Abstract: An electrostatic discharge (ESD) protection circuit includes a control circuit configured to generate a signal indicating whether an input voltage on an input/output pad is excessive. The protection circuit also includes a voltage divider configured to receive the signal from the control circuit and to divide the input voltage to produce a divided voltage. The protection circuit further includes an inverter chain having multiple inverters, where a first inverter is configured to receive the divided voltage and at least two inverters are configured to generate transistor control signals. In addition, the protection circuit includes a plurality of transistors configured to receive the transistor control signals and, when the input voltage is excessive, to prevent the input voltage from being provided to a protected circuit.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: October 9, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Vladislav Vashchenko, James Di Sarro
  • Patent number: 8284538
    Abstract: An electrostatic chuck device includes an electrostatic chuck section, a metal base section, and a dielectric plate. The electrostatic chuck section has a substrate, a main surface of which serves as a mounting surface for a plate-like sample, an electrostatic-adsorption inner electrode built in the substrate, and a power supply terminal for applying a DC voltage to the electrostatic-adsorption inner electrode. Here, a dielectric plate is fixed to a concave portion formed in the metal base section. The dielectric plate and the electrostatic chuck section are adhesively bonded to each other with an insulating adhesive bonding layer interposed therebetween. The dielectric plate and the concave portion are adhesively bonded to each other with a conductive adhesive bonding layer interposed therebetween, the volume resistivity of which is 1.0×10?2 ?cm or less.
    Type: Grant
    Filed: August 8, 2007
    Date of Patent: October 9, 2012
    Assignees: Tokyo Electron Limited, Sumitomo Osaka Cement Co., Ltd.
    Inventors: Shinji Himori, Shoichiro Matsuyama, Atsushi Matsuura, Hiroshi Inazumachi, Mamoru Kosakai, Yukio Miura, Keigo Maki
  • Patent number: 8270132
    Abstract: A protection circuit that includes a first power supply system including a first power supply and a first ground, a second power supply system including a second power supply and a second ground, the second power supply system being connected to the first power supply system via a signal line through which signal transfer is performed between a circuit in the first power supply system and a circuit in the second power supply system, and a control circuit that, when coupled to an electro-static discharge (ESD) stress being applied to the first power supply system controls a switch, the switch being provided between the signal line and the first power supply.
    Type: Grant
    Filed: January 7, 2011
    Date of Patent: September 18, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Masanori Tanaka, Morihisa Hirata, Hitoshi Okamoto
  • Patent number: 8254069
    Abstract: An ESD protection circuit is described that protects the output transistors of a target circuit, usually an integrated circuit, that has an output enable, OE, or similar control input. An OE signal turns off the output transistors allowing the target circuit output, or outputs, to electrically float. Such a condition is commonly called a three state condition. The inventive protection circuit is not connected to the output directly, it senses an ESD voltage spike at the +Vdd contact to the circuit and produces a timed signal. The timed signal is converted to logic levels and gated with the OE signal (that the system previously provided to the OE control input). The output of gate forms a new OE control input signal that forces the target circuit into its three state condition during the period of the timed signal.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: August 28, 2012
    Assignee: Fairchild Semiconductor Corporation
    Inventor: Myron J. Miske
  • Patent number: 8254070
    Abstract: A vehicle on-board electric power system is disclosed including at least one field-effect-controlled power transistor which applies a vehicle on-board electric power system supply voltage VBB to a load when actuated by a logic circuit. The power transistor has a drain-source breakdown voltage VDS with a positive temperature coefficient TKDS and is provided with a clamping means for protecting against overvoltages VO occurring in the vehicle on-board electric power system. The clamping means has a clamping voltage VCLAMP with a positive temperature coefficient TKCLAMP?TKDS, the clamping voltage VCLAMP being lower than or equal to an anticipated maximum overvoltage VOmax in the vehicle on-board electric power system.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: August 28, 2012
    Assignee: Infineon Technologies AG
    Inventors: Christian Arndt, Alfons Graf
  • Patent number: 8238072
    Abstract: A bipolar electrostatic chuck which has excellent dielectric breakdown strength and provides excellent attracting performance. The bipolar electrostatic chuck eliminates difficulty in dismounting a sample from a sample attracting plane as much as possible after application of a voltage to electrodes is finished. The bipolar electrostatic chuck is provided with a first electrode and a second electrode in an insulator and permits a surface of the insulator to be the sample attracting plane. The insulator has the first electrode, an interelectrode insulating layer and the second electrode in this order from the sample attracting plane in the depth direction. The second electrode has a region not overlapping with the first electrode in a normal line direction of the sample attracting plane.
    Type: Grant
    Filed: January 21, 2010
    Date of Patent: August 7, 2012
    Assignee: Creative Technology Corporation
    Inventors: Hiroshi Fujisawa, Kinya Miyashita
  • Patent number: 8223470
    Abstract: An apparatus includes a processing chamber having a plasma containing region, a dielectric plate secured on top of the processing chamber, a power source separated from the plasma containing region by the dielectric plate, and a chuck supported within the processing chamber. The chuck is operable and configured to move with respect to the power source.
    Type: Grant
    Filed: October 10, 2006
    Date of Patent: July 17, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Cheng Chang, Ying-Lin Chen
  • Patent number: 8213134
    Abstract: A positive temperature coefficient device is configured in parallel with a bypass switch and implemented at an input to a switching regulation stage of a switching power supply. A monitoring module determines that a voltage across the regulation switch in the switching power supply is below a predefined threshold voltage for greater than a predefined threshold time period. A control module controls operation of the bypass switch. The control module opens the bypass switch in response to the monitoring module determining that the voltage across the regulation switch is below the predefined threshold voltage for greater than the predefined threshold time period such that substantially all of the current entering the switching regulation stage passes through the PTC device. By causing substantially all of the current to pass through the PTC device, the device will enter a high impedance state thereby preventing smoke and smell from occurring.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: July 3, 2012
    Assignee: International Business Machines Corporation
    Inventors: C. Charles Dishman, Jen-Ching Lin, Randhir S. Malik
  • Patent number: 8169756
    Abstract: An alternating current system 10 has a primary circuit 11 which forms a primary winding 18 on a core 16. A secondary winding 24 is connected with a current source 26 or, alternatively, with an impedance 60. The core 16 is threaded by a superconducting coil 20 having a current source 22. In normal use, current in the coil 20 provides a DC bias level of flux in the core 16, and the source 26 is varied to maintain substantially constant flux, thereby minimising losses in the primary circuit 11. In fault conditions, current in the coil 20 is reduced or removed to increase voltage losses across the coil 18, thereby limiting fault current. The impedance 60 can also be switched into circuit, creating further current limiting by virtue of the transformer effect of the windings 18, 24.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: May 1, 2012
    Assignee: Rolls-Royce plc
    Inventors: Stephen M Husband, David R Trainer
  • Patent number: 8159799
    Abstract: This invention mainly involves in the consumer electronic product fields, especially in the protective devices against abnormality for positive and negative power circuits of TV and audio technology field. In one embodiment, in the last stage output port load (RL) circuit of the dual power supply, a series current negative feedback resistor R371 is added or used as the detection source, by the integration of Resistor R46V and Capacitor C46V, and then through the pressure-sensitive switching unit VD46 or Diode D46 branch circuit, is connected with normally closed and overload conducting overload shutdown devices so as to perform timely and effective protection against OCL circuit over current or other abnormalities in the positive and negative power supply.
    Type: Grant
    Filed: January 26, 2010
    Date of Patent: April 17, 2012
    Assignee: Shenzhen Skyworth-RGB Electronic Co., Ltd.
    Inventor: Jun Dai
  • Patent number: 8159808
    Abstract: An apparatus and method for suppressing voltage fluctuations across a relay coil is disclosed. The method includes the steps of monitoring a voltage drop across a relay coil by a difference amplifier; providing an output of a reference source and an output of the difference amplifier to an integrator amplifier; providing an output of the integrator amplifier to a transistor; and driving the relay coil by controlling an output of the transistor based on the output of the integrator amplifier, wherein the output of the reference source is selectively applied to the integrator amplifier in response to a monitored undesired voltage fluctuations across the relay coil.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: April 17, 2012
    Assignee: Raytheon Company
    Inventor: Roland Torres
  • Patent number: 8154831
    Abstract: A leakage current detection interrupter with fire protection means comprising: (i) a movable assembly housing; (ii) two fixed contact holders each having a fixed contact point; (iii)) two movable contact holders each having a fixed end and a movable end with a movable contact point; (iv) a movable assembly that moves between a first position and a second position; (v) a resetting component; (vi) a resetting component spring; (vii) an electromagnetic tripping component, which, when energized, which is responsive to a fault condition, causes the movable assembly to be in the second position from the first position; (viii) an leakage current protection circuit assembled on a printed circuit board for detecting the fault condition; and (ix) a set of three electrical wires: a first wire, a second wire, and a third wire to an appliance, wherein the first wire and the second wire are protected by a plurality of protective shields.
    Type: Grant
    Filed: October 27, 2009
    Date of Patent: April 10, 2012
    Assignee: General Protecht Group, Inc.
    Inventors: Fu Wang, Xiangfa Ye, Yong Dai, Xiaoyong Li
  • Patent number: 8111491
    Abstract: An overvoltage protection circuit includes an output transistor coupled between a power supply and an output terminal, the output terminal including a terminal for being coupled to a load and a dynamic clamping circuit and a clamp selection transistor coupled in series between the power supply terminal and a control terminal of the output transistor. The clamp selection transistor is coupled between the dynamic clamping circuit and a control terminal of the output transistor. In addition, the clamp selector transistor includes an N-channel type transistor, a control terminal of the N-channel type transistor being coupled to a ground potential.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: February 7, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Osamu Souma